static INT ate_bbp_set_ctrlch(struct _RTMP_ADAPTER *pAd, INT ext_ch)
{
UINT32 agc, agc_r0 = 0;
UINT32 be, be_r0 = 0;
RTMP_BBP_IO_READ32(pAd, AGC1_R0, &agc_r0);
agc = agc_r0 & (~0x300);
RTMP_BBP_IO_READ32(pAd, TXBE_R0, &be_r0);
be = (be_r0 & (~0x03));
switch (ext_ch)
{
case EXTCHA_BELOW:
agc |= 0x100;
be |= 0x01;
break;
case EXTCHA_ABOVE:
agc &= (~0x300);
be &= (~0x03);
break;
case EXTCHA_NONE:
default:
agc &= (~0x300);
be &= (~0x03);
break;
}
if (agc != agc_r0)
RTMP_BBP_IO_WRITE32(pAd, AGC1_R0, agc);
if (be != be_r0)
RTMP_BBP_IO_WRITE32(pAd, TXBE_R0, be);
return TRUE;
}
VOID CoexFDDRXAGCGain(
IN PRTMP_ADAPTER pAd,
IN CHAR rssi)
{
//the following block should not be used.
#if 0
CHAR LMthreshold, MHthreshold = 0;
UCHAR idx = 0;
UINT32 bbp_val, bbp_reg = AGC1_R8;
if (pAd->coexRXManualAGCGain.bEnable)
{
LMthreshold = pAd->coexRXManualAGCGain.LMthreshold;
MHthreshold = pAd->coexRXManualAGCGain.MHthreshold;
}
else
{
LMthreshold = -pAd->CommonCfg.CoexRXAGCLMTreshold;
MHthreshold = -pAd->CommonCfg.CoexRXAGCMHTreshold;
}
//DBGPRINT(RT_DEBUG_TRACE, ("COEX: LMthreshold = %d, MHthreshold = %d\n",LMthreshold,MHthreshold));
if (pAd->coexRXManualAGCGain.bStopAGC)
{
DBGPRINT(RT_DEBUG_TRACE, ("COEX: Stop AGC "));
}
else
{
if (rssi > LMthreshold)
{
RTMP_BBP_IO_READ32(pAd, bbp_reg, &bbp_val);
BTCOEX_BB_BITWISE_WRITE(bbp_val, (BIT6+BIT7), BIT6);
RTMP_BBP_IO_WRITE32(pAd, bbp_reg, bbp_val);
}
else if ((rssi <= LMthreshold) &&(rssi > MHthreshold))
{
RTMP_BBP_IO_READ32(pAd, bbp_reg, &bbp_val);
BTCOEX_BB_BITWISE_WRITE(bbp_val, (BIT6+BIT7), BIT7);
RTMP_BBP_IO_WRITE32(pAd, bbp_reg, bbp_val);
}
else
{
RTMP_BBP_IO_READ32(pAd, bbp_reg, &bbp_val);
BTCOEX_BB_BITWISE_WRITE(bbp_val, (BIT6+BIT7), (BIT6+BIT7));
RTMP_BBP_IO_WRITE32(pAd, bbp_reg, bbp_val);
}
}
#endif
}
VOID CoexTDDRXAGCGain(
IN PRTMP_ADAPTER pAd
)
{
UINT32 bbp_val, bbp_reg = AGC1_R8;
if (pAd->coexRXManualAGCGain.bStopAGC)
{
DBGPRINT(RT_DEBUG_TRACE, ("COEX: Stop AGC "));
}
else
{
DBGPRINT(RT_DEBUG_TRACE, ("COEX: %s --> Adjust AGC\n ", __FUNCTION__));
RTMP_BBP_IO_READ32(pAd, bbp_reg, &bbp_val);
BTCOEX_BB_BITWISE_WRITE(bbp_val, (BIT6+BIT7), (BIT6+BIT7));
RTMP_BBP_IO_WRITE32(pAd, bbp_reg, bbp_val);
}
}
static VOID mt76x0_ate_switch_channel(
IN PRTMP_ADAPTER pAd)
{
PATE_INFO pATEInfo = &(pAd->ate);
UINT32 idx = 0, rf_phy_mode, rf_bw = RF_BW_20;
UCHAR channel = 0;
SYNC_CHANNEL_WITH_QA(pATEInfo, &channel);
mt76x0_ate_bbp_adjust(pAd);
DBGPRINT(RT_DEBUG_TRACE, ("%s::Channel = %d, TXWI_N.BW = %d , RFFreqOffset = %d, TxPower0 = %d\n",
__FUNCTION__, channel, pATEInfo->TxWI.TXWI_N.BW, pATEInfo->RFFreqOffset, pATEInfo->TxPower0));
if (channel > 14)
rf_phy_mode = RF_A_BAND;
else
rf_phy_mode = RF_G_BAND;
if (pATEInfo->TxWI.TXWI_N.BW == BW_80)
rf_bw = RF_BW_80;
else if (pATEInfo->TxWI.TXWI_N.BW == BW_40)
rf_bw = RF_BW_40;
else
rf_bw = RF_BW_20;
/*
Configure 2.4/5GHz before accessing other MAC/BB/RF registers
*/
SelectBandMT76x0(pAd, channel);
/*
Set RF channel frequency parameters (Rdiv, N, K, D and Ksd)
*/
SetRfChFreqParametersMT76x0(pAd, channel);
for (idx = 0; idx < MT76x0_BPP_SWITCH_Tab_Size; idx++)
{
if (((rf_phy_mode | rf_bw) & MT76x0_BPP_SWITCH_Tab[idx].BwBand) == (rf_phy_mode | rf_bw))
{
if ((MT76x0_BPP_SWITCH_Tab[idx].RegDate.Register == AGC1_R8))
{
UINT32 eLNAgain = (MT76x0_BPP_SWITCH_Tab[idx].RegDate.Value & 0x0000FF00) >> 8;
if (channel > 14)
{
if (channel < 100)
eLNAgain -= (pAd->ALNAGain0*2);
else if (channel < 137)
eLNAgain -= (pAd->ALNAGain1*2);
else
eLNAgain -= (pAd->ALNAGain2*2);
}
else
eLNAgain -= (pAd->BLNAGain*2);
RTMP_BBP_IO_WRITE32(pAd, MT76x0_BPP_SWITCH_Tab[idx].RegDate.Register,
(MT76x0_BPP_SWITCH_Tab[idx].RegDate.Value&(~0x0000FF00))|(eLNAgain << 8));
}
else
{
RTMP_BBP_IO_WRITE32(pAd, MT76x0_BPP_SWITCH_Tab[idx].RegDate.Register,
MT76x0_BPP_SWITCH_Tab[idx].RegDate.Value);
}
}
