INT rtv_InitSystem(void)
{
int i;
U8 read0, read1;
U8 rev_num;
U8 ALDO_OUT = 0, DLDO_OUT = 0;
#ifdef RTV_DUAL_DIVERISTY_ENABLE
U8 S_ALDO_OUT = 0, S_DLDO_OUT = 0;
#endif
g_bRtvIntrMaskReg = 0x3F;
#if defined(RTV_IF_SPI) || defined(RTV_IF_SPI_TSIFx) || defined(RTV_IF_EBI2)
#define WR27_VAL (0x50|SPI_INTR_POL_ACTIVE)
#define WR29_VAL 0x10
for (i = 0; i < 100; i++) {
RTV_REG_MAP_SEL(SPI_CTRL_PAGE);
RTV_REG_SET(0x29, WR29_VAL); /* BUFSEL first! */
RTV_REG_SET(0x27, WR27_VAL);
read0 = RTV_REG_GET(0x27);
read1 = RTV_REG_GET(0x29);
#if defined(RTV_SPI_HIGH_SPEED_ENABLE)
RTV_REG_MAP_SEL(RF_PAGE);
#if (RTV_SRC_CLK_FREQ_KHz == 19200)
RTV_REG_SET(0xB6, 0x04);
RTV_REG_SET(0xB6, 0x24); /* DIV8 */
#else
RTV_REG_SET(0xB6, 0x05);
RTV_REG_SET(0xB6, 0x25); /* DIV8 */
#endif
#endif
RTV_REG_MAP_SEL(TOP_PAGE);
RTV_REG_SET(0x0C, 0xC3);
RTV_DBGMSG2("read0(0x%02X), read1(0x%02X)\n", read0, read1);
if ((read0 == WR27_VAL) && (read1 == WR29_VAL)) {
RTV_REG_MAP_SEL(SPI_CTRL_PAGE);
RTV_REG_SET(0x21, 0x87);
RTV_REG_SET(0x22, 0x00);
goto RTV_POWER_ON_SUCCESS;
}
RTV_DBGMSG1("[rtv_InitSystem] Power On wait: %d\n", i);
RTV_DELAY_MS(5);
}
#else
RTV_REG_MAP_SEL(TOP_PAGE);
RTV_REG_SET(0x0C, 0xC3);
for (i = 0; i < 100; i++) {
read0 = RTV_REG_GET(0x00);
read1 = RTV_REG_GET(0x01);
RTV_DBGMSG2("read0(0x%02X), read1(0x%02X)\n", read0, read1);
if ((read0 == 0xC6))
goto RTV_POWER_ON_SUCCESS;
RTV_DBGMSG1("[rtv_InitSystem] Power On wait: %d\n", i);
RTV_DELAY_MS(5);
}
#endif
RTV_DBGMSG1("rtv_InitSystem: Power On Check error: %d\n", i);
return RTV_POWER_ON_CHECK_ERROR;
RTV_POWER_ON_SUCCESS:
#if 1
RTV_REG_MAP_SEL(RF_PAGE);
rev_num = (RTV_REG_GET(0x10) & 0xF0) >> 4 ;
#ifdef CHECK_REV_NUM
RTV_DBGMSG1("[rtv_InitSystem] REV number (%d)\n", rev_num);
#endif
if (rev_num >= 0x04) {
RTV_REG_MASK_SET(0x3B, 0x01, 0x01);
RTV_REG_MASK_SET(0x32, 0x01, 0x01);
}
#endif
#ifdef INTERFACE_TEST
#if defined(RTV_IF_SPI) || defined(RTV_IF_SPI_TSIFx) || defined(RTV_IF_EBI2)
RTV_REG_MAP_SEL(SPI_CTRL_PAGE);
for (i = 0; i < 100; i++) {
RTV_REG_SET(0x22, 0x55);
read0 = RTV_REG_GET(0x22);
RTV_REG_SET(0x22, 0xAA);
read1 = RTV_REG_GET(0x22);
RTV_DBGMSG2("Before Power Setup :readSPI22_55(0x%02X), readSPI22_AA(0x%02X)\n",
read0, read1);
}
RTV_REG_MAP_SEL(RF_PAGE);
for (i = 0; i < 100; i++) {
RTV_REG_SET(0x20, 0x55);
read0 = RTV_REG_GET(0x20);
RTV_REG_SET(0x20, 0xAA);
read1 = RTV_REG_GET(0x20);
RTV_DBGMSG2("Before Power Setup :readRF20_55(0x%02X), readRF20_AA(0x%02X)\n",
read0, read1);
}
#else
RTV_REG_MAP_SEL(RF_PAGE);
for (i = 0; i < 100; i++) {
RTV_REG_SET(0x20, 0x55);
read0 = RTV_REG_GET(0x20);
RTV_REG_SET(0x20, 0xAA);
read1 = RTV_REG_GET(0x20);
RTV_DBGMSG2("Before Power Setup :readRF20_55(0x%02X), readRF20_AA(0x%02X)\n",
read0, read1);
}
#endif
#endif /* INTERFACE_TEST */
ALDO_OUT = 6;
DLDO_OUT = 1;
#ifdef RTV_DUAL_DIVERISTY_ENABLE
S_ALDO_OUT = 6;
S_DLDO_OUT = 1;
#endif
RTV_REG_MAP_SEL(RF_PAGE);
#ifdef RTV_DUAL_DIVERISTY_ENABLE
if (rtvMTV23x_Get_Diversity_Current_path() == DIVERSITY_MASTER) {
#endif
RTV_REG_MASK_SET(0xC8, 0x80, ((ALDO_OUT & 0x04) << 5));
RTV_REG_MASK_SET(0xD1, 0x80, ((ALDO_OUT & 0x02) << 6));
RTV_REG_MASK_SET(0xD2, 0x80, ((ALDO_OUT & 0x01) << 7));
RTV_REG_MASK_SET(0xD3, 0x80, ((DLDO_OUT & 0x04) << 5));
RTV_REG_MASK_SET(0xD5, 0x80, ((DLDO_OUT & 0x02) << 6));
RTV_REG_MASK_SET(0xD6, 0x80, ((DLDO_OUT & 0x01) << 7));
#ifdef RTV_DUAL_DIVERISTY_ENABLE
} else {
RTV_REG_MASK_SET(0xC8, 0x80, ((S_ALDO_OUT & 0x04) << 5));
RTV_REG_MASK_SET(0xD1, 0x80, ((S_ALDO_OUT & 0x02) << 6));
RTV_REG_MASK_SET(0xD2, 0x80, ((S_ALDO_OUT & 0x01) << 7));
RTV_REG_MASK_SET(0xD3, 0x80, ((S_DLDO_OUT & 0x04) << 5));
RTV_REG_MASK_SET(0xD5, 0x80, ((S_DLDO_OUT & 0x02) << 6));
RTV_REG_MASK_SET(0xD6, 0x80, ((S_DLDO_OUT & 0x01) << 7));
}
#endif
RTV_DELAY_MS(10);
RTV_REG_MASK_SET(0xC9, 0x80, 0x80);
#if defined(RTV_EXT_POWER_MODE)
RTV_REG_SET(0xCD, 0xCF);
#ifdef RTV_DUAL_DIVERISTY_ENABLE
RTV_REG_SET(0xCE, 0x35);
#else
RTV_REG_SET(0xCE, 0xB5);
#endif
#else /* Internal LDO Mode */
RTV_REG_SET(0xCD, 0x4F);
RTV_REG_SET(0xCE, 0x35);
#endif
#ifdef INTERFACE_TEST
#if defined(RTV_IF_SPI) || defined(RTV_IF_SPI_TSIFx) || defined(RTV_IF_EBI2)
RTV_REG_MAP_SEL(SPI_CTRL_PAGE);
for (i = 0; i < 100; i++) {
RTV_REG_SET(0x22, 0x55);
read0 = RTV_REG_GET(0x22);
RTV_REG_SET(0x22, 0xAA);
read1 = RTV_REG_GET(0x22);
RTV_DBGMSG2("After Power Setup :readSPI22_55(0x%02X), readSPI22_AA(0x%02X)\n",
read0, read1);
}
RTV_REG_MAP_SEL(RF_PAGE);
for (i = 0; i < 100; i++) {
RTV_REG_SET(0x20, 0x55);
read0 = RTV_REG_GET(0x20);
RTV_REG_SET(0x20, 0xAA);
read1 = RTV_REG_GET(0x20);
RTV_DBGMSG2("After Power Setup :readRF20_55(0x%02X), readRF20_AA(0x%02X)\n",
read0, read1);
}
#else
RTV_REG_MAP_SEL(RF_PAGE);
for (i = 0; i < 100; i++) {
RTV_REG_SET(0x20, 0x55);
read0 = RTV_REG_GET(0x20);
RTV_REG_SET(0x20, 0xAA);
read1 = RTV_REG_GET(0x20);
RTV_DBGMSG2("After Power Setup :readRF20_55(0x%02X), readRF20_AA(0x%02X)\n",
read0, read1);
}
#endif
#endif /* INTERFACE_TEST */
return RTV_SUCCESS;
}
static int mtv250_ioctl(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg)
#endif
{
int ret = 0;
void __user *argp = (void __user *)arg;
RTV_IOCTL_REGISTER_ACCESS ioctl_register_access;
RTV_IOCTL_TEST_GPIO_INFO gpio_info;
U8 reg_page = 0;
UINT lock_mask;
UINT isdbt_ch_num;
RTV_ISDBT_TMCC_INFO isdbt_tmcc_info;
IOCTL_ISDBT_SIGNAL_INFO isdbt_signal_info;
IOCTL_ISDBT_LGE_TUNER_INFO lge_tuner_info;
switch( cmd )
{
case IOCTL_ISDBT_POWER_ON: // with adc clk type
mtv250_cb_ptr->tv_mode = DMB_TV_MODE_1SEG;
mtv250_cb_ptr->country_band_type = RTV_COUNTRY_BAND_JAPAN;
DMBMSG("[mtv] IOCTL_ISDBT_POWER_ON: country_band_type(%d)\n", mtv250_cb_ptr->country_band_type);
ret = mtv250_power_on();
if(ret != 0)
{
ret = -EFAULT;
goto IOCTL_EXIT;
}
break;
case IOCTL_ISDBT_POWER_OFF:
DMBMSG("[mtv] IOCTL_ISDBT_POWER_OFF\n");
mtv250_power_off();
break;
case IOCTL_ISDBT_SCAN_FREQ:
if (copy_from_user(&isdbt_ch_num, argp, sizeof(UINT)))
{
ret = -EFAULT;
goto IOCTL_EXIT;
}
ret = rtvISDBT_ScanFrequency(isdbt_ch_num);
// DMBMSG("[mtv] ISDBT SCAN(%d) result: %d\n", isdbt_ch_num, ret);
if(ret != RTV_SUCCESS)
{
ret = -EFAULT;
goto IOCTL_EXIT;
}
break;
case IOCTL_ISDBT_SET_FREQ:
if (copy_from_user(&isdbt_ch_num, argp, sizeof(UINT)))
{
ret = -EFAULT;
goto IOCTL_EXIT;
}
// DMBMSG("[mtv] IOCTL_ISDBT_SET_FREQ: %d\n", isdbt_ch_num);
ret=rtvISDBT_SetFrequency(isdbt_ch_num);
if(ret != RTV_SUCCESS)
{
DMBERR("[mtv] IOCTL_ISDBT_SET_FREQ error %d\n", ret);
ret = -EFAULT;
goto IOCTL_EXIT;
}
break;
case IOCTL_ISDBT_GET_LOCK_STATUS:
// DMBMSG("[mtv] IOCTL_ISDBT_GET_LOCK_STATUS\n");
lock_mask=rtvISDBT_GetLockStatus();
if (copy_to_user(argp,&lock_mask, sizeof(UINT)))
{
ret = -EFAULT;
goto IOCTL_EXIT;
}
break;
case IOCTL_ISDBT_GET_TMCC:
// DMBMSG("[mtv] IOCTL_ISDBT_GET_TMCC\n");
rtvISDBT_GetTMCC(&isdbt_tmcc_info);
if (copy_to_user(argp,&isdbt_tmcc_info, sizeof(RTV_ISDBT_TMCC_INFO)))
{
ret = -EFAULT;
goto IOCTL_EXIT;
}
break;
case IOCTL_ISDBT_GET_SIGNAL_INFO:
// DMBMSG("[mtv] IOCTL_ISDBT_GET_SIGNAL_INFO\n");
isdbt_signal_info.ber = rtvISDBT_GetBER();
if(isdbt_signal_info.ber > 1500)
isdbt_signal_info.ber = 100000;
isdbt_signal_info.cnr = rtvISDBT_GetCNR() / RTV_ISDBT_CNR_DIVIDER;
isdbt_signal_info.cnr = 10 * isdbt_signal_info.cnr;
isdbt_signal_info.per = rtvISDBT_GetPER() * 3125;
isdbt_signal_info.rssi = rtvISDBT_GetRSSI() / RTV_ISDBT_RSSI_DIVIDER;
if (copy_to_user(argp, &isdbt_signal_info, sizeof(IOCTL_ISDBT_SIGNAL_INFO)))
{
ret = -EFAULT;
goto IOCTL_EXIT;
}
break;
case IOCTL_ISDBT_LGE_GET_TUNER_INFO:
//
lge_tuner_info.LOCK = rtvISDBT_GetLockStatus() == RTV_ISDBT_CHANNEL_LOCK_OK ? 1: 0;
lge_tuner_info.CNo = rtvISDBT_GetCNR() / RTV_ISDBT_CNR_DIVIDER;
lge_tuner_info.CNo = 10 * lge_tuner_info.CNo;
lge_tuner_info.BER = rtvISDBT_GetBER();
if(lge_tuner_info.BER > 1500)
lge_tuner_info.BER = 100000;
lge_tuner_info.PER = rtvISDBT_GetPER() * 3125;
#if 1
if(lge_tuner_info.LOCK == 0)
lge_tuner_info.BER = lge_tuner_info.PER = 100000;
#endif
lge_tuner_info.AGC= rtvISDBT_GetAGC();
lge_tuner_info.RSSI= rtvISDBT_GetRSSI() / RTV_ISDBT_RSSI_DIVIDER;
// temp!!!!
lge_tuner_info.start_ts_int_cnt = mtv250_cb_ptr->start_ts_int_cnt;
lge_tuner_info.ovf_err_cnt = mtv250_cb_ptr->ovf_err_cnt;
if (copy_to_user(argp, &lge_tuner_info, sizeof(IOCTL_ISDBT_LGE_TUNER_INFO)))
{
ret = -EFAULT;
goto IOCTL_EXIT;
}
break;
case IOCTL_ISDBT_START_TS:
RTV_GUARD_LOCK;
mtv250_cb_ptr->start_ts_int_cnt = 0;
mtv250_cb_ptr->ovf_err_cnt = 0;
mtv250_cb_ptr->max_read_jiffies = 0;
rtv_StreamEnable();
RTV_GUARD_FREE;
break;
case IOCTL_ISDBT_STOP_TS:
rtvISDBT_DisableStreamOut();
mtv250_reset_tsp();
break;
case IOCTL_TEST_DMB_POWER_ON:
DMBMSG("[mtv250_ioctl] IOCTL_TEST_DMB_POWER_ON\n");
RTV_MASTER_CHIP_SEL;
rtvOEM_PowerOn(1);
mtv250_cb_ptr->is_power_on = TRUE;
break;
case IOCTL_TEST_DMB_POWER_OFF:
RTV_MASTER_CHIP_SEL;
rtvOEM_PowerOn(0);
mtv250_cb_ptr->is_power_on = FALSE;
break;
case IOCTL_REGISTER_READ:
if(mtv250_cb_ptr->is_power_on == FALSE)
{
DMBMSG("[mtv] Power Down state!Must Power ON\n");
ret = -EFAULT;
goto IOCTL_EXIT;
}
if (copy_from_user(&ioctl_register_access, argp, sizeof(RTV_IOCTL_REGISTER_ACCESS)))
{
ret = -EFAULT;
goto IOCTL_EXIT;
}
//DMBMSG("[mtv] IOCTL_REGISTER_READ: [%d] 0x%02X\n", ioctl_register_access.page, ioctl_register_access.Addr);
switch( mtv250_cb_ptr->tv_mode )
{
case DMB_TV_MODE_TDMB:
case DMB_TV_MODE_FM:
switch( ioctl_register_access.page )
{
case 6: reg_page = 0x06; break; // OFDM
case 7: reg_page = 0x09; break; // FEC
case 8: reg_page = 0x0A; break; // FEC
default: reg_page = mtv_reg_page_addr[ioctl_register_access.page];
}
break;
case DMB_TV_MODE_1SEG:
switch( ioctl_register_access.page )
{
case 6: reg_page = 0x02; break; // OFDM
case 7: reg_page = 0x03; break; // FEC
default: reg_page = mtv_reg_page_addr[ioctl_register_access.page];
}
break;
default: break;
}
RTV_REG_MAP_SEL(reg_page);
ioctl_register_access.data[0] = RTV_REG_GET(ioctl_register_access.Addr);
if (copy_to_user(argp, &ioctl_register_access, sizeof(RTV_IOCTL_REGISTER_ACCESS)))
{
ret = -EFAULT;
goto IOCTL_EXIT;
}
break;
case IOCTL_REGISTER_WRITE:
if(mtv250_cb_ptr->is_power_on == FALSE)
{
DMBMSG("[mtv] Power Down state!Must Power ON\n");
ret = -EFAULT;
goto IOCTL_EXIT;
}
if (copy_from_user(&ioctl_register_access, argp, sizeof(RTV_IOCTL_REGISTER_ACCESS)))
{
ret = -EFAULT;
goto IOCTL_EXIT;
}
switch( mtv250_cb_ptr->tv_mode )
{
case DMB_TV_MODE_TDMB:
case DMB_TV_MODE_FM:
switch( ioctl_register_access.page )
{
case 6: reg_page = 0x06; break; // OFDM
case 7: reg_page = 0x09; break; // FEC
case 8: reg_page = 0x0A; break; // FEC
default: reg_page = mtv_reg_page_addr[ioctl_register_access.page];
}
break;
case DMB_TV_MODE_1SEG:
switch( ioctl_register_access.page )
{
case 6: reg_page = 0x02; break; // OFDM
case 7: reg_page = 0x03; break; // FEC
default: reg_page = mtv_reg_page_addr[ioctl_register_access.page];
}
break;
default: break;
}
RTV_REG_MAP_SEL(reg_page);
RTV_REG_SET(ioctl_register_access.Addr, ioctl_register_access.data[0]);
break;
case IOCTL_TEST_GPIO_SET:
if(mtv250_cb_ptr->is_power_on == FALSE)
{
DMBMSG("[mtv] Power Down state!Must Power ON\n");
ret = -EFAULT;
goto IOCTL_EXIT;
}
if (copy_from_user(&gpio_info, argp, sizeof(RTV_IOCTL_TEST_GPIO_INFO)))
{
ret = -EFAULT;
goto IOCTL_EXIT;
}
gpio_set_value(gpio_info.pin, gpio_info.value);
break;
case IOCTL_TEST_GPIO_GET:
if(mtv250_cb_ptr->is_power_on == FALSE)
{
DMBMSG("[mtv] Power Down state!Must Power ON\n");
ret = -EFAULT;
goto IOCTL_EXIT;
}
if (copy_from_user(&gpio_info, argp, sizeof(RTV_IOCTL_TEST_GPIO_INFO)))
{
ret = -EFAULT;
goto IOCTL_EXIT;
}
gpio_info.value = gpio_get_value(gpio_info.pin);
if(copy_to_user(argp, &gpio_info, sizeof(RTV_IOCTL_TEST_GPIO_INFO)))
{
ret = -EFAULT;
goto IOCTL_EXIT;
}
break;
default:
DMBERR("[mtv] Invalid ioctl command: %d\n", cmd);
ret = -ENOTTY;
break;
}
IOCTL_EXIT:
return ret;
}