void s5p64x0_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
{
struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
/* */
if (soc_is_s5p6450())
s3c_gpio_cfgrange_nopull(S5P6450_GPH(0), 2, S3C_GPIO_SFN(2));
else
s3c_gpio_cfgrange_nopull(S5P6440_GPH(0), 2 , S3C_GPIO_SFN(2));
switch (width) {
case 8:
/* */
if (soc_is_s5p6450())
s3c_gpio_cfgrange_nopull(S5P6450_GPH(6), 4,
S3C_GPIO_SFN(2));
else
s3c_gpio_cfgrange_nopull(S5P6440_GPH(6), 4,
S3C_GPIO_SFN(2));
case 4:
/* */
if (soc_is_s5p6450())
s3c_gpio_cfgrange_nopull(S5P6450_GPH(2), 4,
S3C_GPIO_SFN(2));
else
s3c_gpio_cfgrange_nopull(S5P6440_GPH(2), 4,
S3C_GPIO_SFN(2));
default:
break;
}
/* */
if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
if (soc_is_s5p6450()) {
s3c_gpio_setpull(S5P6450_GPG(6), S3C_GPIO_PULL_UP);
s3c_gpio_cfgpin(S5P6450_GPG(6), S3C_GPIO_SFN(3));
} else {
s3c_gpio_setpull(S5P6440_GPG(6), S3C_GPIO_PULL_UP);
s3c_gpio_cfgpin(S5P6440_GPG(6), S3C_GPIO_SFN(3));
}
}
}
static int config_gpio(void)
{
int err = 0;
if ((err = gpio_request(TT_VGPIO_TILT_OUT, "TT_VGPIO_TILT_OUT"))) {
printk("%s: Can't request TT_VGPIO_TILT_OUT\n",
__func__);
goto err_free1;
}
if ((err = gpio_request(TT_VGPIO_TILT_PWR, "TT_VGPIO_TILT_PWR"))) {
printk("%s: Can't request TT_VGPIO_TILT_PWR\n",
__func__);
goto err_free2;
}
/* config TILT_OUT pin as input */
gpio_direction_input(TT_VGPIO_TILT_OUT);
tilt_resources[0].start = gpio_to_irq(TT_VGPIO_TILT_OUT);
tilt_resources[0].end = tilt_resources[0].start;
if (machine_is_valdez()) {
s3c_gpio_cfgpin(S5P6450_GPH(7), S5P64XX_GPH7_EINT_G6_7);
s3c_gpio_setpull(S5P6450_GPH(7), S3C_GPIO_PULL_NONE);
}
/* config TILT_PWR pin as output */
/* power off tilt first */
tilt_power_set(0);
return 0;
err_free2:
gpio_free(TT_VGPIO_TILT_OUT);
err_free1:
return err;
}
};
static struct s3c_gpio_chip s5p6450_gpio_4bit2[] = {
{
.base = S5P64X0_GPG_BASE + 0x4,
.config = &s5p64x0_gpio_cfgs[1],
.chip = {
.base = S5P6450_GPG(0),
.ngpio = S5P6450_GPIO_G_NR,
.label = "GPG",
},
}, {
.base = S5P64X0_GPH_BASE + 0x4,
.config = &s5p64x0_gpio_cfgs[1],
.chip = {
.base = S5P6450_GPH(0),
.ngpio = S5P6450_GPIO_H_NR,
.label = "GPH",
},
},
};
static struct s3c_gpio_chip s5p6450_gpio_rbank_4bit2[] = {
{
.base = S5P64X0_GPR_BASE + 0x4,
.config = &s5p64x0_gpio_cfgs[2],
.chip = {
.base = S5P6450_GPR(0),
.ngpio = S5P6450_GPIO_R_NR,
.label = "GPR",
},
