int s3cfb_backlight_on(struct platform_device *pdev)
{
#if !defined(CONFIG_HAVE_PWM)
int err;
err = gpio_request(S5PC1XX_GPD(0), "GPD");
if (err) {
printk(KERN_ERR "failed to request GPD for "
"lcd backlight control\n");
return err;
}
gpio_direction_output(S5PC1XX_GPD(0), 1);
gpio_free(S5PC1XX_GPA1(3));
err = gpio_request(S5PC1XX_GPD(0), "GPA1");
if (err) {
printk(KERN_ERR "failed to request GPA1 for "
"lcd backlight control\n");
return err;
}
gpio_direction_output(S5PC1XX_GPA1(3), 1);
gpio_free(S5PC1XX_GPA1(3));
#endif
return 0;
}
int s3cfb_set_gpio(void)
{
int i, err;
/* LCD_HSYNC, LCD_VSYNC, LCD_VDEN, LCD_VCLK, VD[23:0] */
for (i = 0; i < 8; i++)
s3c_gpio_cfgpin(S5PC1XX_GPF0(i), S3C_GPIO_SFN(2));
for (i = 0; i < 8; i++)
s3c_gpio_cfgpin(S5PC1XX_GPF1(i), S3C_GPIO_SFN(2));
for (i = 0; i < 8; i++)
s3c_gpio_cfgpin(S5PC1XX_GPF2(i), S3C_GPIO_SFN(2));
for (i = 0; i < 4; i++)
s3c_gpio_cfgpin(S5PC1XX_GPF3(i), S3C_GPIO_SFN(2));
#ifndef CONFIG_BACKLIGHT_PWM
/* backlight ON */
if (gpio_is_valid(S5PC1XX_GPD(0))) {
err = gpio_request(S5PC1XX_GPD(0), "GPD");
if (err) {
printk(KERN_ERR "failed to request GPD for "
"lcd backlight control\n");
return err;
}
gpio_direction_output(S5PC1XX_GPD(0), 1);
}
#endif
/* module reset */
if (gpio_is_valid(S5PC1XX_GPH0(6))) {
err = gpio_request(S5PC1XX_GPH0(6), "GPH0");
if (err) {
printk(KERN_ERR "failed to request GPH0 for "
"lcd reset control\n");
return err;
}
gpio_direction_output(S5PC1XX_GPH0(6), 1);
}
mdelay(100);
gpio_set_value(S5PC1XX_GPH0(6), 0);
mdelay(10);
gpio_set_value(S5PC1XX_GPH0(6), 1);
mdelay(10);
gpio_free(S5PC1XX_GPH0(6));
#ifndef CONFIG_BACKLIGHT_PWM
gpio_free(S5PC1XX_GPD(0));
#endif
return 0;
}
static void s5pc100_idle(void)
{
#if !defined(CONFIG_MMC_SDHCI_S3C) && !defined(CONFIG_MMC_SDHCI_MODULE)
unsigned int tmp;
#if defined(T32_PROBE_DEBUGGING)
/* debugging with T32 GPIO port GPD1 which is connected with 2 pin of J1 connector */
gpio_direction_output(S5PC1XX_GPD(1), 0);
#endif
/*
* 1. Set CFG_STANDBYWFI field of PWR_CFG to 2¡¯b01.
* 2. Set PMU_INT_DISABLE bit of OTHERS register to 1¡¯b1 to prevent interrupts from
* occurring while entering IDLE mode.
* 3. Execute Wait For Interrupt instruction (WFI).
*/
tmp = __raw_readl(S5P_PWR_CFG);
tmp &= S5P_CFG_WFI_CLEAN;
tmp |= S5P_CFG_WFI_IDLE;
__raw_writel(tmp, S5P_PWR_CFG);
cpu_do_idle();
#if defined(T32_PROBE_DEBUGGING)
gpio_direction_output(S5PC1XX_GPD(1), 1);
#endif
#endif
}
static int smdkc100_backlight_on(struct platform_device *pdev)
{
int err;
err = gpio_request(S5PC1XX_GPD(0), "GPD");
if (err) {
printk(KERN_ERR "failed to request GPD for "
"lcd backlight control\n");
return err;
}
gpio_direction_output(S5PC1XX_GPD(0), 1);
gpio_free(S5PC1XX_GPD(0));
return 0;
}
int s3c_fimd_reset_lcd(struct platform_device *dev)
{
int err;
if (gpio_is_valid(S5PC1XX_GPH0(6))) {
err = gpio_request(S5PC1XX_GPH0(6), "GPH0");
if (err) {
printk(KERN_ERR "failed to request GPH0 for "
"lcd reset control\n");
return err;
}
gpio_direction_output(S5PC1XX_GPH0(6), 1);
}
mdelay(100);
gpio_set_value(S5PC1XX_GPH0(6), 0);
mdelay(10);
gpio_set_value(S5PC1XX_GPH0(6), 1);
mdelay(10);
gpio_free(S5PC1XX_GPH0(6));
gpio_free(S5PC1XX_GPD(0));
return 0;
}
int s3c_fimd_backlight_on(struct platform_device *dev)
{
int err;
if (gpio_is_valid(S5PC1XX_GPD(0))) {
err = gpio_request(S5PC1XX_GPD(0), "GPD");
if (err) {
printk(KERN_ERR "failed to request GPD for "
"lcd backlight control\n");
return err;
}
gpio_direction_output(S5PC1XX_GPD(0), 1);
}
return 0;
}
/*
static void beep_timer_handler( unsigned long data )
{
if( timer_count & 0x1 )
writel( readl(gpddat) | (0x1<<1), gpddat );
else
writel( readl(gpddat) & ~(0x1<<1), gpddat );
printk( KERN_INFO "GPD1 = %d\n", readl(gpddat) & (0x1<<1) );
timer_count++;
mod_timer( &timer, jiffies + HZ/10 );
}
*/
static int beep_open( struct inode *inode, struct file *filp )
{
int ret;
printk( KERN_ERR "go to beep open\n");
/* do ioremap */
base_addr = ioremap( S5PC1XX_TIMER_BASE, MAP_SIZE );
if( NULL == base_addr ) {
printk( KERN_ERR "Failed to remap mem region for s5pc100 timer\n" );
ret = -ENOMEM;
return ret;
}
/* Initialize pwm timer1 */
// Set prescaler for timer 1, 0xff
writel( readl(base_addr+TCFG0_OFFSET) | 0xFF, base_addr+TCFG0_OFFSET );
// Set divider mux for timer 1, 1/8
writel( (readl(base_addr+TCFG1_OFFSET) & ~(0xF<<4)) | (0x3 << 4), base_addr+TCFG1_OFFSET );
writel( 0x1000, base_addr + TCNTB1_OFFSET );
writel( 0x500, base_addr + TCMPB1_OFFSET );
// Timer1: Stop; Manual Update : 1; Output Inverter On; Auto Reload On
writel( (readl(base_addr+TCON_OFFSET) & ~(0xF<<8)) | (0xE << 8), base_addr+TCON_OFFSET );
//writel( 0x1000, base_addr + TCNTB1_OFFSET );
//writel( 0x500, base_addr + TCMPB1_OFFSET );
printk( KERN_INFO "TCNTB1 = 0x%x\n", readl(base_addr+TCNTB1_OFFSET) );
printk( KERN_INFO "TCMPB1 = 0x%x\n", readl(base_addr+TCMPB1_OFFSET) );
printk( KERN_INFO "TCON = 0x%x\n", readl(base_addr+TCON_OFFSET) );
printk( KERN_INFO "TCFG0 = 0x%x\n", readl(base_addr+TCFG0_OFFSET) );
printk( KERN_INFO "TCFG1 = 0x%x\n", readl(base_addr+TCFG1_OFFSET) );
/* Config GPD1 as Tout1 */
s3c_gpio_cfgpin( S5PC1XX_GPD(1), S5PC1XX_GPD1_TOUT_1);
//s3c_gpio_cfgpin( S5PC1XX_GPD(1), S5PC1XX_GPD_OUTPUT(1) );
//gpdcon = ioremap( rGPDCON, 0x4 );
//gpddat = ioremap( rGPDDAT, 0x4 );
//printk( KERN_INFO "gpdcon = 0x%x", readl(gpdcon) );
//add_timer( &timer );
return 0;
}
