/*----------------------------------------------------------------------------
* Callback invoked when data has been received on the USB.
*----------------------------------------------------------------------------*/
static void _UsbDataReceived(uint32_t unused,
uint8_t status,
uint32_t received,
uint32_t remaining)
{
unused = unused;
Usart *pUs = BASE_USART;
/* Check that data has been received successfully */
if (status == USBD_STATUS_SUCCESS) {
SCB_InvalidateDCache_by_Addr((uint32_t *)usbBuffer, received);
/* Send back CDC data */
if (isCdcEchoON) {
while (CDCDSerialDriver_Write(usbBuffer, received, 0, 0)
!= USBD_STATUS_SUCCESS);
}
/* Send data through USART */
if (isCdcSerialON)
_UsartDmaTx((uint32_t)&pUs->US_THR, usbBuffer, received);
/* Check if bytes have been discarded */
if ((received == DATAPACKETSIZE) && (remaining > 0)) {
TRACE_WARNING(
"_UsbDataReceived: %u bytes discarded\n\r",
(unsigned int)remaining);
}
} else {
TRACE_WARNING("_UsbDataReceived: Transfer error\n\r");
}
}
/**
* \brief Callback function for DMA receiving.
*/
static void _DmaRxCallback(uint32_t status, void* pArg)
{
status = status;
pArg = pArg;
SCB_InvalidateDCache_by_Addr((uint32_t*)pRecvBufferUSART, BUFFER_SIZE - 1);
recvDone = 1;
}
/**
* \brief ILI9488_SPI xDMA Rx callback
*/
static void _ILI9488_Spi_Rx_CB(void)
{
if (!ili9488DmaCtlInSpiMode.cmdOrDataFlag) {
ili9488DmaCtlInSpiMode.rxDoneFlag = 1;
SCB_InvalidateDCache_by_Addr((uint32_t *)ili9488DmaSpiMode.xdmadRxCfg.mbr_da,
ili9488DmaSpiMode.xdmadRxCfg.mbr_ubc);
memory_barrier()
}
//{{{
uint8_t SD_Read (uint8_t* buf, uint32_t blk_addr, uint16_t blocks) {
if (HAL_SD_ReadBlocks (&uSdHandle, (uint32_t*)buf, blk_addr * 512, blocks) != SD_OK)
return MSD_ERROR;
SCB_InvalidateDCache_by_Addr ((uint32_t*)((uint32_t)buf & 0xFFFFFFE0), (blocks * 512) + 32);
return MSD_OK;
}
/**
* \brief USART xDMA Rx callback
* Invoked on USART DMA reception done.
* \param channel DMA channel.
* \param pArg Pointer to callback argument - Pointer to USARTDma instance.
*/
static void USARTD_Rx_Cb(uint32_t channel, UsartDma *pArg)
{
UsartChannel *pUsartdCh = pArg->pRxChannel;
if (channel != pUsartdCh->ChNum)
return;
/* Release the DMA channels */
XDMAD_FreeChannel(pArg->pXdmad, pUsartdCh->ChNum);
pUsartdCh->dmaProgress = 1;
SCB_InvalidateDCache_by_Addr((uint32_t *)pUsartdCh->pBuff, pUsartdCh->BuffSize);
}
/**
* \brief SPI xDMA Rx callback
* Invoked on SPi DMA reception done.
* \param channel DMA channel.
* \param pArg Pointer to callback argument - Pointer to Spid instance.
*/
static void QSPID_Spi_Cb(uint32_t channel, QspiDma_t *pArg)
{
Qspi *pQspiHw = pArg->Qspid.pQspiHw;
if (channel != pArg->RxChNum)
return;
/* Release the semaphore */
ReleaseMutex(pArg->progress);
QSPI_EndTransfer(pQspiHw);
SCB_InvalidateDCache_by_Addr((uint32_t *)pArg->Qspid.qspiBuffer.pDataRx,
pArg->Qspid.qspiBuffer.RxDataSize);
memory_sync();
}
/**
* USART interrupt handler
*/
void USART2_Handler(void)
{
Usart *pUs = BASE_USART;
uint32_t status;
uint16_t serialState;
uint32_t count;
status = USART_GetStatus(pUs);
status &= USART_GetItMask(pUs);
/* If USB device is not configured, do nothing */
if (!isCdcSerialON) {
USART_DisableIt(pUs, 0xFFFFFFFF);
return;
}
if (status & US_CSR_TIMEOUT) {
/*Clear TIMEOUT Flag and Start Time-out After Next Character Received*/
USART_AcknowledgeRxTimeOut(BASE_USART, 0);
/* Flush the DMA FIFO */
XDMAC_SoftwareFlushReq(dmad.pXdmacs, usartDmaRxChannel);
/* Transfer the last pack through USB */
count = dmad.pXdmacs->XDMAC_CHID[usartDmaRxChannel].XDMAC_CUBC;
SCB_InvalidateDCache_by_Addr((uint32_t *)usartBuffers, DATAPACKETSIZE - count);
while (CDCDSerialDriver_Write(usartBuffers, DATAPACKETSIZE - count, 0, 0)
!= USBD_STATUS_SUCCESS);
/*Reset DMA transfer*/
XDMAD_StopTransfer(&dmad, usartDmaRxChannel);
_UsartDmaRx();
} else {
/* Errors */
serialState = CDCDSerialDriver_GetSerialState();
/* Overrun */
if ((status & US_CSR_OVRE) != 0) {
TRACE_WARNING("USART_IrqHandler: Overrun\n\r");
serialState |= CDCSerialState_OVERRUN;
}
/* Framing error */
if ((status & US_CSR_FRAME) != 0) {
TRACE_WARNING("USART_IrqHandler: Framing error\n\r");
serialState |= CDCSerialState_FRAMING;
}
CDCDSerialDriver_SetSerialState(serialState);
}
}
/**
* @brief Reads Sector(s)
* @param lun : not used
* @param *buff: Data buffer to store read data
* @param sector: Sector address (LBA)
* @param count: Number of sectors to read (1..128)
* @retval DRESULT: Operation result
*/
DRESULT SD_read(BYTE lun, BYTE *buff, DWORD sector, UINT count)
{
DRESULT res = RES_ERROR;
ReadStatus = 0;
uint32_t timeout;
#if (ENABLE_SD_DMA_CACHE_MAINTENANCE == 1)
uint32_t alignedAddr;
#endif
if(BSP_SD_ReadBlocks_DMA((uint32_t*)buff,
(uint32_t) (sector),
count) == MSD_OK)
{
/* Wait for the Rading process is completed or a timeout occurs */
timeout = HAL_GetTick();
while((ReadStatus == 0) && ((HAL_GetTick() - timeout) < SD_TIMEOUT))
{
}
/* incase of a timeout return error */
if (ReadStatus == 0)
{
res = RES_ERROR;
}
else
{
ReadStatus = 0;
timeout = HAL_GetTick();
while((HAL_GetTick() - timeout) < SD_TIMEOUT)
{
if (BSP_SD_GetCardState() == SD_TRANSFER_OK)
{
res = RES_OK;
#if (ENABLE_SD_DMA_CACHE_MAINTENANCE == 1)
/*
the SCB_InvalidateDCache_by_Addr() requires a 32-Bit aligned address,
adjust the address and the D-Cache size to invalidate accordingly.
*/
alignedAddr = (uint32_t)buff & ~3;
SCB_InvalidateDCache_by_Addr((uint32_t*)alignedAddr, count*BLOCKSIZE + ((uint32_t)buff - alignedAddr));
#endif
break;
}
}
}
}
return res;
}
/**
* \brief Decodes the HID mouse report received
*
* \param add USB address used by the transfer
* \param status Transfer status
* \param nb_transfered Number of data transferred
*/
static void uhi_hid_mouse_report_reception(
USBHS_Add_t add,
USBHS_Ep_t ep,
USBH_XfrStatus_t status,
uint32_t nb_transfered)
{
uint8_t state_prev;
uint8_t state_new;
UNUSED(ep);
if ((status == UHD_TRANS_NOTRESPONDING) || (status == UHD_TRANS_TIMEOUT)) {
uhi_hid_mouse_start_trans_report(add);
return; // HID mouse transfer restart
}
if ((status != UHD_TRANS_NOERROR) || (nb_transfered < 4)) {
return; // HID mouse transfer aborted
}
SCB_InvalidateDCache_by_Addr((uint32_t *)uhi_hid_mouse_dev.report,
nb_transfered);
// Decode buttons
state_prev = uhi_hid_mouse_dev.report_btn_prev;
state_new = uhi_hid_mouse_dev.report[UHI_HID_MOUSE_BTN];
if ((state_prev & 0x01) != (state_new & 0x01))
UHI_HID_MOUSE_EVENT_BTN_LEFT((state_new & 0x01) ? true : false);
if ((state_prev & 0x02) != (state_new & 0x02))
UHI_HID_MOUSE_EVENT_BTN_RIGHT((state_new & 0x02) ? true : false);
if ((state_prev & 0x04) != (state_new & 0x04))
UHI_HID_MOUSE_EVENT_BTN_MIDDLE((state_new & 0x04) ? true : false);
uhi_hid_mouse_dev.report_btn_prev = state_new;
// Decode moves
if ((uhi_hid_mouse_dev.report[UHI_HID_MOUSE_MOV_X] != 0)
|| (uhi_hid_mouse_dev.report[UHI_HID_MOUSE_MOV_Y] != 0)
|| (uhi_hid_mouse_dev.report[UHI_HID_MOUSE_MOV_SCROLL] != 0)) {
UHI_HID_MOUSE_EVENT_MOUVE(
(int8_t)uhi_hid_mouse_dev.report[UHI_HID_MOUSE_MOV_X],
(int8_t)uhi_hid_mouse_dev.report[UHI_HID_MOUSE_MOV_Y],
(int8_t)uhi_hid_mouse_dev.report[UHI_HID_MOUSE_MOV_SCROLL]);
}
uhi_hid_mouse_start_trans_report(add);
}
/**
* \brief Callback function for DMA receiving.
*/
static void _DmaRxCallback( uint8_t status, void* pArg )
{
/*dummy*/
status = status;
pArg = pArg;
mutexTimeout = 0x7FF;
while (LockMutex(semaphore, mutexTimeout)); // lock semaphore
_UpdateCount();
SCB_InvalidateDCache_by_Addr((uint32_t *)pRxBuffer,sizeof(pRxBuffer));
if (__LDREXW(&pUsartBuffer->Count) >= MAX_FREE_BYTES) {
/* Send signal to Tx side to stop sending data after filling all
* except one block of buffer
*/
BASE_USART->US_CR = US_CR_RTSEN;
}
ReleaseMutex(semaphore);
}
/**
* \brief DMA RX callback function
*/
static void _UsDmaRxCallback(uint32_t channel, void *pArg)
{
pArg = pArg;
if (channel != usartDmaRxChannel)
return;
/*Clear TIMEOUT Flag and Start Time-out After Next Character Received*/
USART_AcknowledgeRxTimeOut(BASE_USART, 0);
SCB_InvalidateDCache_by_Addr((uint32_t *)(usartBuffers[usartCurrentBuffer]),
DATABUFFERSIZE);
/* Send buffer through the USB */
while (CDCDSerialDriver_Write(usartBuffers[usartCurrentBuffer],
DATAPACKETSIZE, 0, 0) != USBD_STATUS_SUCCESS);
/* Restart read on buffer */
_UsartDmaRx();
}
/**
* \brief AFE xDMA Rx callback
* Invoked on AFE DMA reception done.
* \param channel DMA channel.
* \param pArg Pointer to callback argument - Pointer to AfeDma instance.
*/
static void Afe_Rx_Cb(uint32_t channel, AfeDma *pArg)
{
AfeCmd *pAfedCmd = pArg->pCurrentCommand;
if (channel != afeDmaRxChannel)
return;
/* Configure and enable interrupt on RC compare */
NVIC_ClearPendingIRQ(XDMAC_IRQn);
NVIC_DisableIRQ(XDMAC_IRQn);
/* Release the DMA channels */
XDMAD_FreeChannel(pArg->pXdmad, afeDmaRxChannel);
SCB_InvalidateDCache_by_Addr(pAfedCmd->pRxBuff, pAfedCmd->RxSize);
/* Release the dataflash semaphore */
pArg->semaphore++;
/* Invoke the callback associated with the current command */
if (pAfedCmd && pAfedCmd->callback)
pAfedCmd->callback(0, pAfedCmd->pArgument);
}
/**
* \brief SPI xDMA Rx callback
* Invoked on SPi DMA reception done.
* \param channel DMA channel.
* \param pArg Pointer to callback argument - Pointer to Spid instance.
*/
static void SPID_Rx_Cb(uint32_t channel, Spid *pArg)
{
SpidCmd *pSpidCmd = pArg->pCurrentCommand;
Spi *pSpiHw = pArg->pSpiHw;
if (channel != spiDmaRxChannel)
return;
/* Disable the SPI TX & RX */
SPI_Disable (pSpiHw);
TRACE_INFO("SPI Rx DMA Callback has been called %d bytes received\n\r",
pArg->pCurrentCommand->RxSize);
/* Configure and enable interrupt on RC compare */
NVIC_ClearPendingIRQ(XDMAC_IRQn);
NVIC_DisableIRQ(XDMAC_IRQn);
/* Disable the SPI Peripheral */
PMC_DisablePeripheral (pArg->spiId);
/* Release CS */
SPI_ReleaseCS(pSpiHw);
/* Release the DMA channels */
XDMAD_FreeChannel(pArg->pXdmad, spiDmaRxChannel);
XDMAD_FreeChannel(pArg->pXdmad, spiDmaTxChannel);
SCB_InvalidateDCache_by_Addr((uint32_t *)pArg->pCurrentCommand->pRxBuff,
pArg->pCurrentCommand->RxSize);
/* Release the dataflash semaphore */
pArg->semaphore++;
printf(" %s\n\r", pArg->pCurrentCommand->pRxBuff);
/* Invoke the callback associated with the current command */
if (pSpidCmd && pSpidCmd->callback) {
//printf("p %d", pArg->semaphore);
pSpidCmd->callback(0, pSpidCmd->pArgument);
}
}
