/**
* @brief 初始化配置使用SDRAM的FMC及GPIO接口，
* 本函数在SDRAM读写操作前需要被调用
* @param None
* @retval None
*/
void SDRAM_Init(void)
{
FMC_SDRAMInitTypeDef FMC_SDRAMInitStructure;
FMC_SDRAMTimingInitTypeDef FMC_SDRAMTimingInitStructure;
/* 配置FMC接口相关的 GPIO*/
SDRAM_GPIO_Config();
/* 使能 FMC 时钟 */
RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FMC, ENABLE);
/* SDRAM时序结构体，根据SDRAM参数表配置----------------*/
/* SDCLK： 90 Mhz (HCLK/2 :180Mhz/2) 1个时钟周期Tsdclk =1/90MHz=11.11ns*/
/* TMRD: 2 Clock cycles */
FMC_SDRAMTimingInitStructure.FMC_LoadToActiveDelay = 2;
/* TXSR: min=70ns (7x11.11ns) */
FMC_SDRAMTimingInitStructure.FMC_ExitSelfRefreshDelay = 7;
/* TRAS: min=42ns (4x11.11ns) max=120k (ns) */
FMC_SDRAMTimingInitStructure.FMC_SelfRefreshTime = 4;
/* TRC: min=70 (7x11.11ns) */
FMC_SDRAMTimingInitStructure.FMC_RowCycleDelay = 7;
/* TWR: min=1+ 7ns (1+1x11.11ns) */
FMC_SDRAMTimingInitStructure.FMC_WriteRecoveryTime = 2;
/* TRP: 15ns => 2x11.11ns */
FMC_SDRAMTimingInitStructure.FMC_RPDelay = 2;
/* TRCD: 15ns => 2x11.11ns */
FMC_SDRAMTimingInitStructure.FMC_RCDDelay = 2;
/* FMC SDRAM 控制配置 */
/*选择存储区域*/
FMC_SDRAMInitStructure.FMC_Bank = FMC_BANK_SDRAM;
/* 行地址线宽度: [7:0] */
FMC_SDRAMInitStructure.FMC_ColumnBitsNumber = FMC_ColumnBits_Number_8b;
/* 列地址线宽度: [11:0] */
FMC_SDRAMInitStructure.FMC_RowBitsNumber = FMC_RowBits_Number_12b;
/* 数据线宽度 */
FMC_SDRAMInitStructure.FMC_SDMemoryDataWidth = SDRAM_MEMORY_WIDTH;
/* SDRAM内部bank数量*/
FMC_SDRAMInitStructure.FMC_InternalBankNumber = FMC_InternalBank_Number_4;
/* CAS潜伏期 */
FMC_SDRAMInitStructure.FMC_CASLatency = SDRAM_CAS_LATENCY;
/* 禁止写保护*/
FMC_SDRAMInitStructure.FMC_WriteProtection = FMC_Write_Protection_Disable;
/* SDCLK时钟分频因子，SDCLK = HCLK/SDCLOCK_PERIOD*/
FMC_SDRAMInitStructure.FMC_SDClockPeriod = SDCLOCK_PERIOD;
/* 突发读模式设置*/
FMC_SDRAMInitStructure.FMC_ReadBurst = SDRAM_READBURST;
/* 读延迟配置 */
FMC_SDRAMInitStructure.FMC_ReadPipeDelay = FMC_ReadPipe_Delay_0;
/* SDRAM时序参数 */
FMC_SDRAMInitStructure.FMC_SDRAMTimingStruct = &FMC_SDRAMTimingInitStructure;
/* 调用初始化函数，向寄存器写入配置 */
FMC_SDRAMInit(&FMC_SDRAMInitStructure);
/* 执行FMC SDRAM的初始化流程*/
SDRAM_InitSequence();
}
/*******************************************************************************************
* @函数名：SDRAM_Init()
* @参数 ：void
* @返回值：void
* @描述 ：SDRAM管脚配置函数，在使用SDRAM前先调用
*********************************************************************************************/
void lpc1788_SDRAM_Init( void )
{
volatile uint32_t i;
volatile unsigned long Dummy;
SDRAM_GPIO_Config();
LPC_SC->PCONP |= 0x00000800;
/*Init SDRAM controller*/
LPC_SC->EMCDLYCTL |= (8<<0);
/*Set data read delay*/
LPC_SC->EMCDLYCTL |=(8<<8);
LPC_SC->EMCDLYCTL |= (0x08 <<16);
LPC_EMC->Control =1;
LPC_EMC->DynamicReadConfig = 1;
LPC_EMC->DynamicRasCas0 = 0;
LPC_EMC->DynamicRasCas0 |=(3<<8);
LPC_EMC->DynamicRasCas0 |= (3<<0);
LPC_EMC->DynamicRP = P2C(SDRAM_TRP);
LPC_EMC->DynamicRAS = P2C(SDRAM_TRAS);
LPC_EMC->DynamicSREX = P2C(SDRAM_TXSR);
LPC_EMC->DynamicAPR = SDRAM_TAPR;
LPC_EMC->DynamicDAL = SDRAM_TDAL+P2C(SDRAM_TRP);
LPC_EMC->DynamicWR = SDRAM_TWR;
LPC_EMC->DynamicRC = P2C(SDRAM_TRC);
LPC_EMC->DynamicRFC = P2C(SDRAM_TRFC);
LPC_EMC->DynamicXSR = P2C(SDRAM_TXSR);
LPC_EMC->DynamicRRD = P2C(SDRAM_TRRD);
LPC_EMC->DynamicMRD = SDRAM_TMRD;
#if SDRAM_TYPE==SDRAM_32BIT
// 13 row, 9 - col, SDRAM
LPC_EMC->DynamicConfig0 = 0x0004680;
// JEDEC General SDRAM Initialization Sequence
// DELAY to allow power and clocks to stabilize ~100 us
// NOP
#else
LPC_EMC->DynamicConfig0 = 0x000680;
#endif
LPC_EMC->DynamicControl = 0x0183;
for(i= 200*30; i;i--);
// PALL
LPC_EMC->DynamicControl = 0x0103;
LPC_EMC->DynamicRefresh = 2;
for(i= 256; i; --i); // > 128 clk
LPC_EMC->DynamicRefresh = P2C(SDRAM_REFRESH) >> 4;
// COMM
LPC_EMC->DynamicControl = 0x00000083; /* Issue MODE command */
#if SDRAM_TYPE==SDRAM_32BIT
Dummy = *((volatile uint32_t *)(SDRAM_BASE| (0x32<<13)));
#else
Dummy = *((volatile uint32_t *)(SDRAM_BASE| (0x33<<12)));
#endif
// NORM
LPC_EMC->DynamicControl = 0x0000;
LPC_EMC->DynamicConfig0 |=(1<<19);
for(i = 100000; i;i--);
}
/*********************************************************************//**
* @brief Initialize external SDRAM memory Micron sdram_h57v2562gtr
* 256Mbit(16M x 16)
* @param[in] None
* @return None
**********************************************************************/
void SDRAMInit( void )
{
volatile uint32_t i;
volatile unsigned long Dummy;
TIM_TIMERCFG_Type TIM_ConfigStruct;
TIM_ConfigStruct.PrescaleOption = TIM_PRESCALE_USVAL;
TIM_ConfigStruct.PrescaleValue = 1;
// Set configuration for Tim_config and Tim_MatchConfig
TIM_Init(LPC_TIM0, TIM_TIMER_MODE,&TIM_ConfigStruct);
/* Enable External Memory Controller power/clock */
LPC_SC->PCONP |= 0x00000800;
LPC_SC->EMCDLYCTL = 0x00001010;
LPC_EMC->Control = 0x00000001;
LPC_EMC->Config = 0x00000000;
SDRAM_GPIO_Config();
LPC_SC->EMCCLKSEL=1;
LPC_EMC->DynamicRP=EMC_NS2CLK(SDRAM_TRP); /* 20ns, */
LPC_EMC->DynamicRAS = EMC_NS2CLK(SDRAM_TRAS); /* 42ns to 100K ns, */
LPC_EMC->DynamicSREX = 1 - 1; /* tSRE, 1clk, */
LPC_EMC->DynamicAPR = SDRAM_TAPR - 1; /* Not found!!! Estimated as 2clk, */
LPC_EMC->DynamicDAL = EMC_NS2CLK(SDRAM_TRP) + 2; /* tDAL = tRP + tDPL = 20ns + 2clk */
LPC_EMC->DynamicWR = SDRAM_TWR - 1; /* 2CLK, */
LPC_EMC->DynamicRC = EMC_NS2CLK(63); /* H57V2562GTR-75C tRC=63ns(min)*/
LPC_EMC->DynamicRFC = EMC_NS2CLK(63); /* H57V2562GTR-75C tRFC=tRC */
LPC_EMC->DynamicXSR = SDRAM_TXSR-1; /* exit self-refresh to active*/
LPC_EMC->DynamicRRD = EMC_NS2CLK(63); /* 3clk, tRRD=15ns(min) */
LPC_EMC->DynamicMRD = SDRAM_TMRD - 1; /* 2clk, tMRD=2clk(min) */
LPC_EMC->DynamicReadConfig = 0x00000001; /* Command delayed strategy, using EMCCLKDELAY */
/* H57V2562GTR-75C: tCL=3CLK, tRCD=20ns(min), 3 CLK=24ns */
LPC_EMC->DynamicRasCas0 = 0x303;
LPC_EMC->DynamicConfig0 = 0x680;
TIM_Waitms(100);
LPC_EMC->DynamicControl = 0x00000183; /* Issue NOP command */
TIM_Waitms(200); /* wait 200ms */
LPC_EMC->DynamicControl = 0x00000103; /* Issue PALL command */
LPC_EMC->DynamicRefresh = 0x00000002; /* ( n * 16 ) -> 32 clock cycles */
for(i = 0; i < 0x80; i++); /* wait 128 AHB clock cycles */
/* 64ms/8192=7.8125us, nx16x8.33ns<7.8125us, n<58.6*/
LPC_EMC->DynamicRefresh = EMC_SDRAM_REFRESH(64);
LPC_EMC->DynamicControl = 0x00000083; /* Issue MODE command */
Dummy = *((volatile uint16_t *)(SDRAM_BASE_ADDR | (0x33<<12))); /* 8 burst, 3 CAS latency */
LPC_EMC->DynamicControl = 0x00000000; /* Issue NORMAL command */
LPC_EMC->DynamicConfig0 |= 0x80000; /* enable buffer */
TIM_Waitms(1);
TIM_DeInit(LPC_TIM0);
}
