static inline cmph_uint8 chd_ph_check_bin_hashing(chd_ph_config_data_t *chd_ph, chd_ph_bucket_t *buckets, chd_ph_item_t *items,
cmph_uint32 * disp_table, chd_ph_sorted_list_t * sorted_lists,cmph_uint32 max_bucket_size)
{
register cmph_uint32 bucket_size, i, j;
register cmph_uint32 position, probe0_num, probe1_num;
register cmph_uint32 m = 0;
register chd_ph_item_t * item;
if(chd_ph->keys_per_bin > 1)
memset(chd_ph->occup_table, 0, chd_ph->n);
else
memset(chd_ph->occup_table, 0, ((chd_ph->n + 31)/32) * sizeof(cmph_uint32));
for(bucket_size = 1; bucket_size <= max_bucket_size; bucket_size++)
for(i = sorted_lists[bucket_size].buckets_list; i < sorted_lists[bucket_size].size +
sorted_lists[bucket_size].buckets_list; i++)
{
j = bucket_size;
item = items + buckets[i].items_list;
probe0_num = disp_table[buckets[i].bucket_id] % chd_ph->n;
probe1_num = disp_table[buckets[i].bucket_id] / chd_ph->n;
for(; j > 0; j--)
{
m++;
position = (cmph_uint32)((item->f + ((cmph_uint64 )item->h) * probe0_num + probe1_num) % chd_ph->n);
if(chd_ph->keys_per_bin > 1)
{
if(chd_ph->occup_table[position] >= chd_ph->keys_per_bin)
{
return 0;
}
(chd_ph->occup_table[position])++;
}
else
{
if(GETBIT32(((cmph_uint32*)chd_ph->occup_table), position))
{
return 0;
}
SETBIT32(((cmph_uint32*)chd_ph->occup_table), position);
};
item++;
};
};
DEBUGP("We were able to place m = %u keys\n", m);
return 1;
};
/**
* @fn PwrCon_set_USB_phy(BOOL bOn)
* @param bOn TRUE(turn on) or FALSE(turn off)
* @note This funciton turn on and off USB phy module's clock
*/
void PwrCon_set_USB_phy(BOOL bOn)
{
assert(g_pSysConReg);
RETAILMSG(PWC_ZONE_ENTER, (_T("[PWRCON]++%s(%d)\n"), _T(__FUNCTION__), bOn));
if (bOn)
{
SETBIT32(g_pSysConReg->OTHERS, BIT_USB_SIG_MASK);
}
else
{
CLEARBIT32(g_pSysConReg->OTHERS, BIT_USB_SIG_MASK);
}
RETAILMSG(PWC_ZONE_ENTER, (_T("[PWRCON]--%s()\n"), _T(__FUNCTION__)));
}
static inline cmph_uint8 place_bucket_probe(chd_ph_config_data_t *chd_ph, chd_ph_bucket_t *buckets,
chd_ph_item_t *items, cmph_uint32 probe0_num, cmph_uint32 probe1_num,
cmph_uint32 bucket_num, cmph_uint32 size)
{
register cmph_uint32 i;
register chd_ph_item_t * item;
register cmph_uint32 position;
item = items + buckets[bucket_num].items_list;
// try place bucket with probe_num
if(chd_ph->keys_per_bin > 1)
{
for(i = 0; i < size; i++) // placement
{
position = (cmph_uint32)((item->f + ((cmph_uint64)item->h)*probe0_num + probe1_num) % chd_ph->n);
if(chd_ph->occup_table[position] >= chd_ph->keys_per_bin)
{
break;
}
(chd_ph->occup_table[position])++;
item++;
};
} else
{
for(i = 0; i < size; i++) // placement
{
position = (cmph_uint32)((item->f + ((cmph_uint64)item->h)*probe0_num + probe1_num) % chd_ph->n);
if(GETBIT32(((cmph_uint32 *)chd_ph->occup_table), position))
{
break;
}
SETBIT32(((cmph_uint32*)chd_ph->occup_table), position);
item++;
};
};
if(i != size) // Undo the placement
{
item = items + buckets[bucket_num].items_list;
if(chd_ph->keys_per_bin > 1)
{
while(1)
{
if(i == 0)
{
break;
}
position = (cmph_uint32)((item->f + ((cmph_uint64 )item->h) * probe0_num + probe1_num) % chd_ph->n);
(chd_ph->occup_table[position])--;
item++;
i--;
};
} else
{
while(1)
{
if(i == 0)
{
break;
}
position = (cmph_uint32)((item->f + ((cmph_uint64 )item->h) * probe0_num + probe1_num) % chd_ph->n);
UNSETBIT32(((cmph_uint32*)chd_ph->occup_table), position);
// ([position/32]^=(1<<(position%32));
item++;
i--;
};
};
return 0;
}
return 1;
};
/**
* @fn PwrCon_set_block_power_on(BLKPWR_DOMAIN eDomain)
* @param eDomain The IP Block number in NORMAL_CFG Register to turn on
* @note This funciton turn on specific IP Block's power
* when the system is in NORMAL Mode, not in other Power mode
*/
BOOL PwrCon_set_block_power_on(BLKPWR_DOMAIN eDomain)
{
UINT32 TimeOut;
assert(g_pSysConReg);
RETAILMSG(PWC_ZONE_ENTER, (_T("[PWRCON]++%s(%d)\n"), _T(__FUNCTION__), eDomain));
TimeOut = 10000000L; // This is big value.
switch(eDomain)
{
case BLKPWR_DOMAIN_IROM: // Internal ROM
SETBIT32(g_pSysConReg->NORMAL_CFG, BIT_IROM);
break;
case BLKPWR_DOMAIN_G: // 3D
SETBIT32(g_pSysConReg->NORMAL_CFG, BIT_DOMAIN_G);
while(!(GETBIT32(g_pSysConReg->BLK_PWR_STAT, BIT_BLK_G)) || (TimeOut-- == 0));
if(TimeOut == 0) goto Block_Pwr_ON_FAIL;
break;
case BLKPWR_DOMAIN_ETM: // ETM
SETBIT32(g_pSysConReg->NORMAL_CFG, BIT_DOMAIN_ETM);
while(!(GETBIT32(g_pSysConReg->BLK_PWR_STAT, BIT_BLK_ETM)) || (TimeOut-- == 0));
if(TimeOut == 0) goto Block_Pwr_ON_FAIL;
break;
case BLKPWR_DOMAIN_S: // SDMA, Security System
SETBIT32(g_pSysConReg->NORMAL_CFG, BIT_DOMAIN_S);
while(!(GETBIT32(g_pSysConReg->BLK_PWR_STAT, BIT_BLK_S)) || (TimeOut-- == 0));
if(TimeOut == 0) goto Block_Pwr_ON_FAIL;
break;
case BLKPWR_DOMAIN_F: // Display Controller, Post Processor, Rotator
SETBIT32(g_pSysConReg->NORMAL_CFG, BIT_DOMAIN_F);
while(!(GETBIT32(g_pSysConReg->BLK_PWR_STAT, BIT_BLK_F)) || (TimeOut-- == 0));
if(TimeOut == 0) goto Block_Pwr_ON_FAIL;
break;
case BLKPWR_DOMAIN_P: // FIMG-2D, TV Encoder, TV Scaler
SETBIT32(g_pSysConReg->NORMAL_CFG, BIT_DOMAIN_P);
while(!(GETBIT32(g_pSysConReg->BLK_PWR_STAT, BIT_BLK_P)) || (TimeOut-- == 0));
if(TimeOut == 0) goto Block_Pwr_ON_FAIL;
break;
case BLKPWR_DOMAIN_I: // Camera interface, Jpeg
SETBIT32(g_pSysConReg->NORMAL_CFG, BIT_DOMAIN_I);
while(!(GETBIT32(g_pSysConReg->BLK_PWR_STAT, BIT_BLK_I)) || (TimeOut-- == 0));
if(TimeOut == 0) goto Block_Pwr_ON_FAIL;
break;
case BLKPWR_DOMAIN_V: // MFC
SETBIT32(g_pSysConReg->NORMAL_CFG, BIT_DOMAIN_V);
while(!(GETBIT32(g_pSysConReg->BLK_PWR_STAT, BIT_BLK_V)) || (TimeOut-- == 0));
if(TimeOut == 0) goto Block_Pwr_ON_FAIL;
break;
default:
RETAILMSG(PWC_ZONE_ERROR, (_T("[PWRCON:ERR] %s() : Unknown Domain = %d\n"), _T(__FUNCTION__), eDomain));
return FALSE;
}
RETAILMSG(PWC_ZONE_ENTER, (_T("[PWRCON]--%s()\n"), _T(__FUNCTION__)));
return TRUE;
Block_Pwr_ON_FAIL:
RETAILMSG(TRUE, (_T("[PWRCON:ERR] %s() : Time OUT!! Domain = %d\n"), _T(__FUNCTION__), eDomain));
return FALSE;
}
