SOC_DAPM_ENUM_EXT("Input Source", txsrc,
snd_soc_dapm_get_enum_double, txsrc_put),
};
static const struct snd_soc_dapm_widget wm8804_dapm_widgets[] = {
SND_SOC_DAPM_OUTPUT("SPDIF Out"),
SND_SOC_DAPM_INPUT("SPDIF In"),
SND_SOC_DAPM_PGA("SPDIFTX", WM8804_PWRDN, 2, 1, NULL, 0),
SND_SOC_DAPM_PGA("SPDIFRX", WM8804_PWRDN, 1, 1, NULL, 0),
SND_SOC_DAPM_MUX("Tx Source", SND_SOC_NOPM, 6, 0, wm8804_tx_source_mux),
SND_SOC_DAPM_AIF_OUT_E("AIFTX", NULL, 0, SND_SOC_NOPM, 0, 0, wm8804_aif_event,
SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
SND_SOC_DAPM_AIF_IN_E("AIFRX", NULL, 0, SND_SOC_NOPM, 0, 0, wm8804_aif_event,
SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
};
static const struct snd_soc_dapm_route wm8804_dapm_routes[] = {
{ "AIFRX", NULL, "Playback" },
{ "Tx Source", "AIF", "AIFRX" },
{ "SPDIFRX", NULL, "SPDIF In" },
{ "Tx Source", "S/PDIF RX", "SPDIFRX" },
{ "SPDIFTX", NULL, "Tx Source" },
{ "SPDIF Out", NULL, "SPDIFTX" },
{ "AIFTX", NULL, "SPDIFRX" },
{ "Capture", NULL, "AIFTX" },
};
regmap_update_bits(priv->regmap, CS35L33_PWRCTL2,
mask, val);
regmap_update_bits(priv->regmap, CS35L33_CLK_CTL,
mask2, val2);
return 0;
}
static const struct snd_soc_dapm_widget cs35l33_dapm_widgets[] = {
SND_SOC_DAPM_OUTPUT("SPK"),
SND_SOC_DAPM_OUT_DRV_E("SPKDRV", CS35L33_PWRCTL1, 7, 1, NULL, 0,
cs35l33_spkrdrv_event,
SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
SND_SOC_DAPM_AIF_IN_E("SDIN", NULL, 0, CS35L33_PWRCTL2,
2, 1, cs35l33_sdin_event, SND_SOC_DAPM_PRE_PMU |
SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
SND_SOC_DAPM_INPUT("MON"),
SND_SOC_DAPM_ADC("VMON", NULL,
CS35L33_PWRCTL2, CS35L33_PDN_VMON_SHIFT, 1),
SND_SOC_DAPM_ADC("IMON", NULL,
CS35L33_PWRCTL2, CS35L33_PDN_IMON_SHIFT, 1),
SND_SOC_DAPM_ADC("VPMON", NULL,
CS35L33_PWRCTL2, CS35L33_PDN_VPMON_SHIFT, 1),
SND_SOC_DAPM_ADC("VBSTMON", NULL,
CS35L33_PWRCTL2, CS35L33_PDN_VBSTMON_SHIFT, 1),
SND_SOC_DAPM_AIF_OUT_E("SDOUT", NULL, 0, SND_SOC_NOPM, 0, 0,
cs35l33_sdout_event, SND_SOC_DAPM_PRE_PMU |
SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
SND_SOC_DAPM_SUPPLY("AUDIF_CK", MT6351_TOP_CKPDN_CON0,
RG_AUDIF_CK_PDN_BIT, 1,
mt_reg_set_clr_event,
SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
SND_SOC_DAPM_SUPPLY("AUDNCP_CK", MT6351_TOP_CKPDN_CON0,
RG_AUDNCP_CK_PDN_BIT, 1,
mt_reg_set_clr_event,
SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
SND_SOC_DAPM_SUPPLY("AFE_ON", MT6351_AFE_UL_DL_CON0, RG_AFE_ON_BIT, 0,
NULL, 0),
/* AIF Rx*/
SND_SOC_DAPM_AIF_IN_E("AIF_RX", "AIF1 Playback", 0,
MT6351_AFE_DL_SRC2_CON0_L,
RG_DL_2_SRC_ON_TMP_CTL_PRE_BIT, 0,
mt_aif_in_event, SND_SOC_DAPM_PRE_PMU),
/* DL Supply */
SND_SOC_DAPM_SUPPLY("DL Power Supply", SND_SOC_NOPM,
0, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY("NV Regulator", MT6351_AUDDEC_ANA_CON10,
RG_NVREG_EN_VAUDP32_BIT, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY("AUD_CLK", MT6351_AUDDEC_ANA_CON9,
RG_RSTB_DECODER_VA32_BIT, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY("IBIST", MT6351_AUDDEC_ANA_CON9,
RG_AUDIBIASPWRDN_VAUDP32_BIT, 1, NULL, 0),
SND_SOC_DAPM_SUPPLY("LDO", MT6351_AUDDEC_ANA_CON9,
RG_LCLDO_DEC_EN_VA32_BIT, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY("LDO_REMOTE_SENSE", MT6351_AUDDEC_ANA_CON9,
RG_LCLDO_DEC_REMOTE_SENSE_VA18_BIT, 0, NULL, 0),
