void NVMRead (BYTE *dest, WORD src, BYTE count)
{
#if !defined(__C30__)
BYTE oldGIEH;
#endif
#ifdef ENABLE_DEBUG
ConsolePut('r');
PrintChar( (BYTE)(((WORD)src>>8)&0xFF) );
PrintChar( (BYTE)((WORD)src&0xFF) );
ConsolePut('-');
PrintChar( count );
#endif
#if !defined(__C30__)
oldGIEH = 0;
if ( INTCONbits.GIEH )
{
oldGIEH = 1;
}
INTCONbits.GIEH = 0;
#endif
SPISelectEEPROM();
SPIPut( SPIREAD );
SPIPut( (BYTE)(((WORD)src>>8) & 0xFF) );
SPIPut( (BYTE)((WORD)src & 0xFF) );
while( count )
{
*dest = SPIGet();
#ifdef ENABLE_DEBUG
#endif
dest++;
count--;
}
SPIUnselectEEPROM();
#if !defined(__C30__)
if (oldGIEH)
{
INTCONbits.GIEH = 1;
}
#endif
#ifdef ENABLE_DEBUG
ConsolePutROMString((ROM char * const)"\r\n");
#endif
}
void NVMRead (BYTE *dest, WORD src, BYTE count)
{
#if !defined(__C30__) && !defined (__C32__)
BYTE oldGIEH;
#endif
#if !defined(__C30__) && !defined(__C32__)
oldGIEH = 0;
if ( INTCONbits.GIEH )
{
oldGIEH = 1;
}
INTCONbits.GIEH = 0;
#endif
SPISelectEEPROM();
SPIPut( SPIREAD );
SPIPut( (BYTE)(((WORD)src>>8) & 0xFF) );
SPIPut( (BYTE)((WORD)src & 0xFF) );
while( count )
{
*dest = SPIGet();
#ifdef ENABLE_DEBUG
#endif
dest++;
count--;
}
SPIUnselectEEPROM();
#if !defined(__C30__) && !defined(__C32__)
if (oldGIEH)
{
INTCONbits.GIEH = 1;
}
#endif
}
void NVMWrite( WORD dest, BYTE *src, BYTE count )
{
BYTE bytesOnPage;
BYTE bytesOnPageCounter;
#if !defined(__C30__)
BYTE oldGIEH;
#endif
BYTE *srcCounter;
BYTE status;
WORD writeStart;
if (!count)
{
return;
}
#if !defined(__C30__)
oldGIEH = 0;
if ( INTCONbits.GIEH )
{
oldGIEH = 1;
}
INTCONbits.GIEH = 0;
#endif
// Make sure the chip is unlocked.
SPISelectEEPROM(); // Enable chip select
SPIPut( SPIWRSR ); // Send WRSR - Write Status Register opcode
SPIPut( 0x00 ); // Write the status register
SPIUnselectEEPROM(); // Disable Chip Select
#ifdef ENABLE_DEBUG
ConsolePut('w');
PrintChar( (BYTE)(((WORD)dest>>8)&0xFF) );
PrintChar( (BYTE)((WORD)dest&0xFF) );
ConsolePut('-');
PrintChar( count );
#endif
writeStart = dest;
while (count)
{
bytesOnPage = EEPROM_PAGE_SIZE - (writeStart & (EEPROM_PAGE_SIZE-1));
if (bytesOnPage > count)
{
bytesOnPage = count;
}
#ifdef PRINT_MULTIPLE_WRITE_ATTEMPTS
flag = 0;
#endif
CLRWDT();
#if defined(VERIFY_WRITE)
while (ComparePage( writeStart, src, bytesOnPage ))
#elif defined(CHECK_BEFORE_WRITE)
if (ComparePage( writeStart, src, bytesOnPage ))
#endif
{
#ifdef PRINT_MULTIPLE_WRITE_ATTEMPTS
flag = 1;
#endif
SPISelectEEPROM(); // Enable chip select
SPIPut( SPIWREN ); // Transmit the write enable instruction
SPIUnselectEEPROM(); // Disable Chip Select to enable Write Enable Latch
SPISelectEEPROM(); // Enable chip select
SPIPut( SPIWRITE ); // Transmit write instruction
SPIPut( (BYTE)((writeStart>>8) & 0xFF) ); // Transmit address high byte
SPIPut( (BYTE)((writeStart) & 0xFF) ); // Trabsmit address low byte
// Loop until the required number of bytes have been written or
// until the maximum number of bytes per write cycle have been written
bytesOnPageCounter = bytesOnPage;
srcCounter = src;
do
{
SPIPut (*srcCounter++); // Write the source byte
bytesOnPageCounter--;
}
while (bytesOnPageCounter);
// Disable chip select to start write cycle. We'll let it finish in the background if we can.
SPIUnselectEEPROM();
// Wait for the write to complete. We have to wait here, because we can't
// do a read of the memory while the write is in progress.
do
{
SPISelectEEPROM(); // Enable chip select
SPIPut( SPIRDSR ); // Send RDSR - Read Status Register opcode
status = SPIGet();; // Read the status register
SPIUnselectEEPROM(); // Disable Chip Select
}
while (status & WIP_MASK);
}
count -= bytesOnPage;
writeStart += bytesOnPage;
src = &src[bytesOnPage];
}
#if !defined(__C30__)
if (oldGIEH) // If interrupts were enabled before this function
{
INTCONbits.GIEH = 1; // re-enable them
}
#endif
#ifdef ENABLE_DEBUG
ConsolePut('.');
ConsolePutROMString((ROM char * const)"\r\n");
#endif
}
