/**
Sends a Module Synchronous Request (SREQ) message and retrieves the response. A SREQ is a message to
the Module that is immediately followed by a Synchronous Response (SRSP) message from the Module. As
opposed to an Asynchronous Request (AREQ) message, which does not have a SRSP. This is a private
method that gets wrapped by sendMessage() and spiPoll().
@pre Module has been initialized
@pre zmBuf contains a properly formatted message. No validation is done.
@post received data is written to zmBuf
@return if FAST_PROCESSOR is defined then MODULE_SUCCESS, else an error code. If FAST_PROCESSOR is not defined, then MODULE_SUCCESS.
*/
moduleResult_t sendSreq()
{
#ifdef FAST_PROCESSOR //NOTE: only enable if using a processor with sufficient speed (25MHz+)
uint32_t timeLeft1 = CHIP_SELECT_TO_SRDY_LOW_TIMEOUT;
uint32_t timeLeft2 = WAIT_FOR_SRSP_TIMEOUT;
SPI_SS_SET(); // Assert SS
while (SRDY_IS_HIGH() && (timeLeft1 != 0)) //wait until SRDY goes low
timeLeft1--;
if (timeLeft1 == 0) //SRDY did not go low in time, so return an error
return ZM_PHY_CHIP_SELECT_TIMEOUT;
timeFromChipSelectToSrdyLow = (CHIP_SELECT_TO_SRDY_LOW_TIMEOUT - timeLeft1);
spiWrite(zmBuf, (*zmBuf + 3)); // *bytes (first byte) is length after the first 3 bytes, all frames have at least the first 3 bytes
*zmBuf = 0; *(zmBuf+1) = 0; *(zmBuf+2) = 0; //poll message is 0,0,0
//NOTE: MRDY must remain asserted here, but can de-assert SS if the two signals are separate
/* Now: Data was sent, so we wait for Synchronous Response (SRSP) to be received.
This will be indicated by SRDY transitioning to high */
while (SRDY_IS_LOW() && (timeLeft2 != 0)) //wait for data
timeLeft2--;
if (timeLeft2 == 0)
return ZM_PHY_SRSP_TIMEOUT;
timeWaitingForSrsp = (WAIT_FOR_SRSP_TIMEOUT - timeLeft2);
//NOTE: if SS & MRDY are separate signals then can re-assert SS here.
spiWrite(zmBuf, 3);
if (*zmBuf > 0) // *bytes (first byte) contains number of bytes to receive
spiWrite(zmBuf+3, *zmBuf); //write-to-read: read data into buffer
SPI_SS_CLEAR();
return 0;
#else // In a slow processor there's not enough time to set up the timeout so there will be errors
SPI_SS_SET();
while (SRDY_IS_HIGH()) ; //wait until SRDY goes low
spiWrite(zmBuf, (*zmBuf + 3)); // *bytes (first byte) is length after the first 3 bytes, all frames have at least the first 3 bytes
*zmBuf = 0; *(zmBuf+1) = 0; *(zmBuf+2) = 0; //poll message is 0,0,0
//NOTE: MRDY must remain asserted here, but can de-assert SS if the two signals are separate
//Now: Data was sent, wait for Synchronous Response (SRSP)
while (SRDY_IS_LOW()) ; //wait for data
//NOTE: if SS & MRDY are separate signals then can re-assert SS here.
spiWrite(zmBuf, 3);
if (*zmBuf > 0) // *bytes (first byte) contains number of bytes to receive
spiWrite(zmBuf+3, *zmBuf); //write-to-read: read data into buffer
SPI_SS_CLEAR(); // re-assert MRDY and SS
return MODULE_SUCCESS;
#endif
}
/**
Initializes the Serial Peripheral Interface (SPI) interface to the Zigbee Module (ZM).
@note Maximum module SPI clock speed is 4MHz. SPI port configured for clock polarity of 0, clock
phase of 0, and MSB first.
@note The Stellaris LaunchPad uses SSI2 to communicate with module
@pre SPI pins configured correctly:
- Clock, MOSI, MISO configured as SPI function
- Chip Select configured as an output
- SRDY configured as an input.
@post SPI port is configured for communications with the module.
*/
void halSpiInitModule()
{
// Disable the SSI Port
//SSIDisable(SSI2_BASE);
// Reconfigure the SSI Port for Module operation.
// Clock polarity = inactive is LOW (CPOL=0); Clock Phase = 0; MSB first; Master Mode, 2MHz, data is 8bits wide;
SSIConfigSetExpClk(SSI2_BASE, SysCtlClockGet(), SSI_FRF_MOTO_MODE_0, SSI_MODE_MASTER, 1000000, 8);
// Enable the SSI Port
SSIEnable(SSI2_BASE);
//
// Read any residual data from the SSI port. This makes sure the receive
// FIFOs are empty, so we don't read any unwanted junk. This is done here
// because the SPI SSI mode is full-duplex, which allows you to send and
// receive at the same time. The SSIDataGetNonBlocking function returns
// "true" when data was returned, and "false" when no data was returned.
// The "non-blocking" function checks if there is any data in the receive
// FIFO and does not "hang" if there isn't.
//
uint32_t ulDataRx[5];
while(SSIDataGetNonBlocking(SSI2_BASE, &ulDataRx[0]))
{
}
// Don't select the module
SPI_SS_CLEAR();
}
/**
Initializes the Serial Peripheral Interface (SPI) interface to the Zigbee Module (ZM).
@note Maximum module SPI clock speed is 4MHz. SPI port configured for clock polarity of 0, clock phase of 0, and MSB first.
@note On the GW the Stellaris uses SSI0 to communicate with module
@pre SPI pins configured correctly:
- Clock, MOSI, MISO configured as SPI function
- Chip Select configured as an output
- SRDY configured as an input.
@post SPI port is configured for communications with the module.
*/
void halSpiInitModule()
{
SSIDisable(SSI0_BASE);
// Reconfigure the SSI Port for Module operation.
// Clock polarity = inactive is LOW (CPOL=0); Clock Phase = 0; MSB first; Master Mode, 2mHz, data is 8bits wide;
SSIConfigSetExpClk(SSI0_BASE, SysCtlClockGet(), SSI_FRF_MOTO_MODE_0, SSI_MODE_MASTER, 1000000, 8);
// Enable the SSI Port.
SSIEnable(SSI0_BASE);
// Hold the module in reset
SPI_SS_CLEAR();
}
/** From znp_interface_spi.c, implemented here to avoid pesky dependencies */
signed int sendSreq()
{
SPI_SS_SET();
while (SRDY_IS_HIGH()) ; //wait until SRDY goes low
spiWrite(znpBuf, (*znpBuf + 3)); // *bytes (first byte) is length after the first 3 bytes, all frames have at least the first 3 bytes
*znpBuf = 0; *(znpBuf+1) = 0; *(znpBuf+2) = 0; //poll message is 0,0,0
//SPI_SS_CLEAR(); //NOTE: MRDY must remain asserted here, but can de-assert SS if the two signals are separate
while (SRDY_IS_LOW()) ; //wait for data
//SPI_SS_SET(); //NOTE: if SS & MRDY are separate signals then can re-assert SS here.
spiWrite(znpBuf, 3);
if (*znpBuf > 0) // *bytes (first byte) contains number of bytes to receive
spiWrite(znpBuf+3, *znpBuf); //write-to-read: read data into buffer
SPI_SS_CLEAR();
return 0;
}
/**
* Configures hardware for the particular board
* - Initializes clocks
* - Ports: including purpose, direction, pullup/pulldown resistors etc.
* - Holds radio in reset (active-low)
*/
void halInit()
{
oscInit();
portInit();
DEBUG_CONSOLE_INIT(BAUD_RATE_19200);
AUX_SERIAL_PORT_INIT(BAUD_RATE_115200); //Module uses 115,200 8N1 WITH FLOW CONTROL
//
// Deselect SPI peripherals:
//
SPI_SS_CLEAR(); // Deselect Module
// Stop Timer A:
TACTL = MC_0;
debugConsoleIsr = &doNothing;
buttonIsr = &doNothing;
halSpiInitModule();
}
/** Initializes Ports/Pins: sets direction, interrupts, pullup/pulldown resistors etc. */
void portInit()
{
//Configure SPI port
//PRECONDITIONS: GPIO PORTS HAVE BEEN ENABLED & PINS WERE CONFIGURED: PC4, PD5 as outputs; PD6 as input
//SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC); //FOR Module Control ????
//SysCtlDelay(10); //delay by (3 * 10) 30 clock cycles
/* Port A
* PA0 U0Rx (Only for USB UART - N/A if using RS-232)
* PA1 U0Tx (Only for USB UART - N/A if using RS-232)
* PA2 SSI0CLK
* PA3 SSI0 ChipSelect for OLED screen on LM3S6965 board (NOT USED in our application - leave as input in case R25 mistakenly populated)
* PA4 SSI0Rx (MISO)
* PA5 SSI0Tx (MOSI)
* PA6 USB Sleep input
* PA7
*/
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
SysCtlDelay(10); //delay by (3 * 10) 30 clock cycles
SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
SysCtlDelay(10); //delay by (3 * 10) 30 clock cycles
/* SSI */
GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_4 | GPIO_PIN_5);
GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_4 | GPIO_PIN_5, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);
SysCtlDelay(10); //delay by (3 * 10) 30 clock cycles
/* Inputs */
GPIOPinTypeGPIOInput(GPIO_PORTA_BASE, GPIO_PIN_6);
GPIOPinTypeGPIOInput(GPIO_PORTA_BASE, GPIO_PIN_3);
/* UART */
GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
// If interrupts are desired, then enable interrupts on this UART
IntEnable(INT_UART0);
UARTIntEnable(UART0_BASE, UART_INT_RX | UART_INT_RT);
UARTStdioInit(0); //configures this UART0 as the uart to use for UARTprintf
/* Port B
* Pb0 Internal LED1 - "D2" Blue
* Pb1 Internal LED2 - "D3" Green
* Pb2 I2C SCL (connected to EEPROM)
* Pb3 I2C SDA (connected to EEPROM)
* Pb4 Spare 1 (on header)
* Pb5 Status LED - Green
* Pb6 Status LED - Red
* Pb7 TRSTn - not used
*/
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
SysCtlDelay(10); //delay by (3 * 10) 30 clock cycles
/* Outputs */
GPIOPadConfigSet(GPIO_PORTB_BASE, (GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_5 | GPIO_PIN_6), GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD);
GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, (GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_5 | GPIO_PIN_6)); //configure LEDs
// I2C:
#ifdef HAL_I2C
GPIOPinTypeI2C(GPIO_PORTB_BASE, GPIO_PIN_2 | GPIO_PIN_3);
delayMs(2);
#endif
/* Port C
* PC0 JTAG TCK
* PC1 JTAG TMS
* PC2 JTAG TDI
* PC3 JTAG TD0
* PC4 Module Chip Select
* PC5 SPI Flash Chip Select
* PC6 USB RTS (not used)
* PC7 USB CTS (not used)
*/
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);
SysCtlDelay(10); //delay by (3 * 10) 30 clock cycles
/* Outputs */
GPIOPinTypeGPIOOutput(GPIO_PORTC_BASE, (GPIO_PIN_4 | GPIO_PIN_5));
//GPIOPadConfigSet(GPIO_PORTC_BASE, (GPIO_PIN_4 | GPIO_PIN_5), GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD);
/* Port D
* PD0 Spare 0
* PD1
* PD2 Spare Rx
* PD3 Spare Tx
* PD4
* PD5 Module Reset
* PD6 SRDY
* PD7
*/
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD); //FOR Module CONTROL
SysCtlDelay(10); //delay by (3 * 10) 30 clock cycles
/* Outputs */
GPIOPinTypeGPIOOutput(GPIO_PORTD_BASE, GPIO_PIN_5);
//GPIOPadConfigSet(GPIO_PORTD_BASE, GPIO_PIN_5, GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD);
/* Inputs */
GPIOPinTypeGPIOInput(GPIO_PORTD_BASE, GPIO_PIN_6);
RADIO_OFF();
SPI_SS_CLEAR();
/* Port E
* PE0 Spare
* PE1 Spare
* PE2 Spare
* PE3 Internal button
*/
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
SysCtlDelay(10); //delay by (3 * 10) 30 clock cycles
/* Inputs */
GPIOPadConfigSet(GPIO_PORTE_BASE, GPIO_PIN_3 , GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD_WPD);
GPIODirModeSet(GPIO_PORTE_BASE, GPIO_PIN_3, GPIO_DIR_MODE_IN);
GPIOIntTypeSet(GPIO_PORTE_BASE, GPIO_PIN_3, GPIO_RISING_EDGE); // Make button a falling-edge triggered interrupt
GPIOPinIntEnable(GPIO_PORTE_BASE, GPIO_PIN_3); // Enable the interrupt on this pin
GPIOPinIntClear(GPIO_PORTE_BASE, GPIO_PIN_3); //Clear interrupts
IntEnable(INT_GPIOE); //enable interrupt 18
/* Port F
* PF0 Internal LED0 - "D1" Red
* PF1 External button
* PF2 Ethernet LED1 (Rx or Tx Activity)
* PF3 Ethernet LED0 (Link Ok)
*/
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
SysCtlDelay(10); //delay by (3 * 10) 30 clock cycles
/* Outputs */
GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_0); //configure LED
/* Inputs */
GPIOPadConfigSet(GPIO_PORTF_BASE, GPIO_PIN_1 , GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD_WPD);
GPIODirModeSet(GPIO_PORTF_BASE, GPIO_PIN_1, GPIO_DIR_MODE_IN);
GPIOIntTypeSet(GPIO_PORTF_BASE, GPIO_PIN_1, GPIO_RISING_EDGE); // Make button a falling-edge triggered interrupt
GPIOPinIntEnable(GPIO_PORTF_BASE, GPIO_PIN_1); // Enable the interrupt on this pin
GPIOPinIntClear(GPIO_PORTF_BASE, GPIO_PIN_1); //Clear interrupts
IntEnable(INT_GPIOF); //enable interrupt 18
/* Ethernet LEDs */
GPIODirModeSet(GPIO_PORTF_BASE, GPIO_PIN_2 | GPIO_PIN_3, GPIO_DIR_MODE_HW);
GPIOPadConfigSet(GPIO_PORTF_BASE,GPIO_PIN_2|GPIO_PIN_3,GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
return;
/* Port G
* PG0 UART2 Rx
* PG1 UART2 Tx
*/
#ifdef USE_UART2
SysCtlPeripheralEnable(SYSCTL_PERIPH_UART2);
SysCtlDelay(10); //delay by (3 * 10) 30 clock cycles
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOG);
SysCtlDelay(10); //delay by (3 * 10) 30 clock cycles
GPIOPinTypeUART(GPIO_PORTG_BASE, GPIO_PIN_0 | GPIO_PIN_1);
// Configure the UART for 115,200, 8-N-1 operation.
//UARTConfigSetExpClk(UART2_BASE, SysCtlClockGet(), 115200,
// (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));
// Enable the UART interrupt.
IntEnable(INT_UART2);
UARTIntEnable(UART2_BASE, UART_INT_RX | UART_INT_RT);
//UARTStdioInit(2); //configures this UART0 as the uart to use for UARTprintf
#else
//SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
/* already done in port A
GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
// If interrupts are desired, then enable interrupts on this UART
IntEnable(INT_UART0);
UARTIntEnable(UART0_BASE, UART_INT_RX | UART_INT_RT);
UARTStdioInit(0); //configures this UART0 as the uart to use for UARTprintf
*/
#endif
}
/**
* Initializes the SPI interface to the Module.
* @note Module SPI clock speed < 4MHz. SPI port configured for clock polarity of 0, clock phase of 0, and MSB first.
* @note On MDB the RFIC SPI port is USCIB1
* @note Modify this method for other hardware implementations.
* @pre SPI pins configured correctly: Clock, MOSI, MISO configured as SPI function; Chip Select configured as an output; SRDY configured as an input.
* @post SPI port is configured for RFIC communications.
*/
void halSpiInitModule()
{
halSpiInit(USCIB1, BAUD_RATE_2MHZ);
SPI_SS_CLEAR();
}
/** Initializes Ports/Pins: sets direction, interrupts, pullup/pulldown resistors etc. */
void portInit()
{
/* Port A
* PA0 U0Rx (Debug UART)
* PA1 U0Tx (Debug UART)
* PA2 Bit-Bang I2C SDA
* PA3 Bit-Bang I2C SCL
* PA4 BoosterPack RGB LED - Green
* PA5 Module SS & MRDY
* PA6 BoosterPack RGB LED - Red
* PA7 Module SRDY
*/
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
PERIPHERAL_ENABLE_DELAY();
/* Configure UART pins */
GPIOPinConfigure(GPIO_PA0_U0RX);
GPIOPinConfigure(GPIO_PA1_U0TX);
GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
/* Outputs */
GPIOPinTypeGPIOOutput(GPIO_PORTA_BASE, GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6);
GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_4 | GPIO_PIN_6, GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD); // For LEDs
/* Inputs */
GPIOPinTypeGPIOInput(GPIO_PORTA_BASE, GPIO_PIN_7);
/* Bit-bang I2C */
//GPIODirModeSet(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3, GPIO_DIR_MODE_OUT); //SDA & SCL
//GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3, GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_OD); //SDA & SCL open-drain
//GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_2 | GPIO_PIN_3, GPIO_PIN_2 | GPIO_PIN_3); //Set SDA & SCL high
/* Port B
* PB0
* PB1
* PB2 BoosterPack RGB LED - Blue
* PB3
* PB4 Module SCLK SSI2CLK
* PB5 LED0
* PB6 Module MISO SSI2Rx
* PB7 Module MOSI SSI2Tx
*/
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB); //FOR STATUS LED
PERIPHERAL_ENABLE_DELAY();
/* SSI2 Configuration for Module SPI */
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI2);
PERIPHERAL_ENABLE_DELAY();
GPIOPinConfigure(GPIO_PB4_SSI2CLK);
GPIOPinConfigure(GPIO_PB6_SSI2RX);
GPIOPinConfigure(GPIO_PB7_SSI2TX);
GPIOPinTypeSSI(GPIO_PORTB_BASE, GPIO_PIN_4 | GPIO_PIN_6 | GPIO_PIN_7);
/* Outputs */
GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_2 | GPIO_PIN_5);
GPIOPadConfigSet(GPIO_PORTB_BASE, GPIO_PIN_2 | GPIO_PIN_5, GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD);
/* Port C
* PC0 (JTAG TCK/SWCLK)
* PC1 (JTAG TMS/SWDIO)
* PC2 (JTAG TDI)
* PC3 (JTAG TDIO/SWO)
* PC4
* PC5
* PC6
* PC7
*/
// Note: no initialization needed for Port C required; using default configuration
/* Port D
* PD0 I2C3SCL
* PD1 I2C3SDA
* PD2
* PD3
* PD4 (USB D-)
* PD5 (USB D+)
* PD6
* PD7 (USB VBUS)
*/
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD); //FOR STATUS LED
PERIPHERAL_ENABLE_DELAY();
/* I2C Configuration */
SysCtlPeripheralEnable(SYSCTL_PERIPH_I2C3); //requires 5 clock cycles to initialize
PERIPHERAL_ENABLE_DELAY();
GPIOPinTypeI2CSCL(GPIO_PORTD_BASE, GPIO_PIN_0); //NOTE: Only required for blizzard (LM4F) parts
GPIOPinTypeI2C(GPIO_PORTD_BASE, GPIO_PIN_1);
GPIOPinConfigure(GPIO_PD0_I2C3SCL);
GPIOPinConfigure(GPIO_PD1_I2C3SDA);
#ifdef TIVA
I2CMasterInitExpClk(I2C3_BASE, SysCtlClockGet(), false); //FALSE = 100kbps
#else
I2CMasterInitExpClk(I2C3_MASTER_BASE, SysCtlClockGet(), false); //FALSE = 100kbps
#endif
SysCtlDelay(10000); //otherwise portion of SlaveAddrSet() lost - only for blizzard
/* Port E - note this port is only 6 pins
* PE0 Module Reset
* PE1
* PE2
* PE3
* PE4 Switch S2 on BoosterPack - note has external 47k pullup on BoosterPack
* PE5 Current Sensor analog input
*/
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
PERIPHERAL_ENABLE_DELAY();
SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0);
PERIPHERAL_ENABLE_DELAY();
/* Outputs */
GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, GPIO_PIN_0);
/* Inputs */
GPIOPadConfigSet(GPIO_PORTE_BASE, GPIO_PIN_4 , GPIO_STRENGTH_4MA, GPIO_PIN_TYPE_STD);
GPIODirModeSet(GPIO_PORTE_BASE, GPIO_PIN_4, GPIO_DIR_MODE_IN);
GPIOIntTypeSet(GPIO_PORTE_BASE, GPIO_PIN_4, GPIO_FALLING_EDGE); // Make button a falling-edge triggered interrupt
#ifdef TIVA
GPIOIntEnable(GPIO_PORTE_BASE, GPIO_PIN_4); // Enable the interrupt on this pin
GPIOIntClear(GPIO_PORTE_BASE, GPIO_PIN_4); //Clear interrupts
#else
GPIOPinIntEnable(GPIO_PORTE_BASE, GPIO_PIN_4); // Enable the interrupt on this pin
GPIOPinIntClear(GPIO_PORTE_BASE, GPIO_PIN_4); //Clear interrupts
#endif
IntEnable(INT_GPIOE);//enable interrupt 18
/* ADC Inputs */
GPIOPinTypeADC(GPIO_PORTE_BASE, GPIO_PIN_5);
RADIO_OFF();
SPI_SS_CLEAR();
/* Port F
* PF0 Switch SW2 on Stellaris LaunchPad
* PF1 RGB LED on Stellaris LaunchPad - Red
* PF2 RGB LED on Stellaris LaunchPad - Green
* PF3 RGB LED on Stellaris LaunchPad - Blue
* PF4 Switch SW1 on Stellaris LaunchPad
*/
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
PERIPHERAL_ENABLE_DELAY();
/* Outputs */
// Note: PWM Outputs for LEDs are initialized separately if they are being used
/* Inputs */
// Unlock PF0 so we can change it to a GPIO input. see ButtonsInit() in buttons.c in example qs-rgb
// Once we have enabled (unlocked) the commit register then re-lock it
// to prevent further changes. PF0 is muxed with NMI thus a special case.
#ifdef TIVA
HWREG(GPIO_PORTF_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY;
#else
HWREG(GPIO_PORTF_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY_DD;
#endif
HWREG(GPIO_PORTF_BASE + GPIO_O_CR) |= 0x01;
HWREG(GPIO_PORTF_BASE + GPIO_O_LOCK) = 0;
GPIODirModeSet(GPIO_PORTF_BASE, ALL_BUTTONS, GPIO_DIR_MODE_IN);
GPIOPadConfigSet(GPIO_PORTF_BASE, ALL_BUTTONS, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD_WPU);
GPIOIntTypeSet(GPIO_PORTF_BASE, ALL_BUTTONS, GPIO_FALLING_EDGE); // Make button a falling-edge triggered interrupt
#ifdef TIVA
GPIOIntEnable(GPIO_PORTF_BASE, ALL_BUTTONS); // Enable the interrupt on this pin
GPIOIntClear(GPIO_PORTF_BASE, ALL_BUTTONS); //Clear interrupts
#else
GPIOPinIntEnable(GPIO_PORTF_BASE, ALL_BUTTONS); // Enable the interrupt on this pin
GPIOPinIntClear(GPIO_PORTF_BASE, ALL_BUTTONS); //Clear interrupts
#endif
IntEnable(INT_GPIOF);
}
