/* Handle the BREAK insn. */
void
frv_break (SIM_CPU *current_cpu)
{
IADDR pc;
SIM_DESC sd = CPU_STATE (current_cpu);
#ifdef SIM_HAVE_BREAKPOINTS
/* First try sim-break.c. If it's a breakpoint the simulator "owns"
it doesn't return. Otherwise it returns and let's us try. */
pc = GET_H_PC ();
sim_handle_breakpoint (sd, current_cpu, pc);
/* Fall through. */
#endif
if (STATE_ENVIRONMENT (sd) != OPERATING_ENVIRONMENT)
{
/* Invalidate the insn cache because the debugger will presumably
replace the breakpoint insn with the real one. */
#ifndef SIM_HAVE_BREAKPOINTS
pc = GET_H_PC ();
#endif
sim_engine_halt (sd, current_cpu, NULL, pc, sim_stopped, SIM_SIGTRAP);
}
frv_queue_break_interrupt (current_cpu);
}
SEM_PC
sim_engine_invalid_insn (SIM_CPU *current_cpu, IADDR cia, SEM_PC pc)
{
SIM_DESC sd = CPU_STATE (current_cpu);
#if 0
if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT)
{
h_bsm_set (current_cpu, h_sm_get (current_cpu));
h_bie_set (current_cpu, h_ie_get (current_cpu));
h_bcond_set (current_cpu, h_cond_get (current_cpu));
/* sm not changed */
h_ie_set (current_cpu, 0);
h_cond_set (current_cpu, 0);
h_bpc_set (current_cpu, cia);
sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL,
EIT_RSVD_INSN_ADDR);
}
else
#endif
sim_engine_halt (sd, current_cpu, NULL, cia, sim_stopped, SIM_SIGILL);
return pc;
}
void
fr30_core_signal (SIM_DESC sd, SIM_CPU *current_cpu, sim_cia cia,
unsigned int map, int nr_bytes, address_word addr,
transfer_type transfer, sim_core_signals sig)
{
#if 0
if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT)
{
h_bsm_set (current_cpu, h_sm_get (current_cpu));
h_bie_set (current_cpu, h_ie_get (current_cpu));
h_bcond_set (current_cpu, h_cond_get (current_cpu));
/* sm not changed */
h_ie_set (current_cpu, 0);
h_cond_set (current_cpu, 0);
h_bpc_set (current_cpu, cia);
sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL,
EIT_ADDR_EXCP_ADDR);
}
else
#endif
sim_core_signal (sd, current_cpu, cia, map, nr_bytes, addr,
transfer, sig);
}
void
sim_config_default (SIM_DESC sd)
{
/* Set the current environment to ALL_ENVIRONMENT to indicate none has been
selected yet. This is so that after parsing argv, we know whether the
environment was explicitly specified or not. */
STATE_ENVIRONMENT (sd) = ALL_ENVIRONMENT;
}
int
cec_get_ivg (SIM_CPU *cpu)
{
switch (STATE_ENVIRONMENT (CPU_STATE (cpu)))
{
case OPERATING_ENVIRONMENT:
return _cec_get_ivg (CEC_STATE (cpu));
default:
return IVG_USER;
}
}
bool
cec_is_supervisor_mode (SIM_CPU *cpu)
{
switch (STATE_ENVIRONMENT (CPU_STATE (cpu)))
{
case OPERATING_ENVIRONMENT:
return _cec_is_supervisor_mode (CEC_STATE (cpu));
case USER_ENVIRONMENT:
return false;
default:
return true;
}
}
void
cec_pop_reti (SIM_CPU *cpu)
{
/* XXX: Need to check hardware with popped RETI value
and bit 1 is set (when handling nested interrupts).
Also need to check behavior wrt SNEN in SYSCFG. */
struct bfin_cec *cec;
if (STATE_ENVIRONMENT (CPU_STATE (cpu)) != OPERATING_ENVIRONMENT)
return;
TRACE_EVENTS (cpu, "popping RETI");
cec = CEC_STATE (cpu);
cec_irpten_enable (cpu, cec);
}
void
cec_latch (SIM_CPU *cpu, int ivg)
{
struct bfin_cec *cec;
if (STATE_ENVIRONMENT (CPU_STATE (cpu)) != OPERATING_ENVIRONMENT)
{
bu32 oldpc = PCREG;
SET_PCREG (cec_read_ret_reg (cpu, ivg));
TRACE_BRANCH (cpu, oldpc, PCREG, -1, "CEC changed PC");
return;
}
cec = CEC_STATE (cpu);
cec->ilat |= (1 << ivg);
_cec_check_pending (cpu, cec);
}
bu32 cec_cli (SIM_CPU *cpu)
{
struct bfin_cec *cec;
bu32 old_mask;
if (STATE_ENVIRONMENT (CPU_STATE (cpu)) != OPERATING_ENVIRONMENT)
return 0;
cec = CEC_STATE (cpu);
_cec_require_supervisor (cpu, cec);
/* XXX: what about IPEND[4] ? */
old_mask = cec->imask;
_cec_imask_write (cec, 0);
TRACE_EVENTS (cpu, "CLI changed IMASK from %#x to %#x", old_mask, cec->imask);
return old_mask;
}
void cec_sti (SIM_CPU *cpu, bu32 ints)
{
struct bfin_cec *cec;
bu32 old_mask;
if (STATE_ENVIRONMENT (CPU_STATE (cpu)) != OPERATING_ENVIRONMENT)
return;
cec = CEC_STATE (cpu);
_cec_require_supervisor (cpu, cec);
/* XXX: what about IPEND[4] ? */
old_mask = cec->imask;
_cec_imask_write (cec, ints);
TRACE_EVENTS (cpu, "STI changed IMASK from %#x to %#x", old_mask, cec->imask);
/* Check for pending interrupts that are now enabled. */
_cec_check_pending (cpu, cec);
}
void
m32r_core_signal (SIM_DESC sd, SIM_CPU *current_cpu, sim_cia cia,
unsigned int map, int nr_bytes, address_word addr,
transfer_type transfer, sim_core_signals sig)
{
if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT)
{
m32rbf_h_cr_set (current_cpu, H_CR_BBPC,
m32rbf_h_cr_get (current_cpu, H_CR_BPC));
switch (MACH_NUM (CPU_MACH (current_cpu)))
{
case MACH_M32R:
m32rbf_h_bpsw_set (current_cpu, m32rbf_h_psw_get (current_cpu));
/* sm not changed. */
m32rbf_h_psw_set (current_cpu, m32rbf_h_psw_get (current_cpu) & 0x80);
break;
case MACH_M32RX:
m32rxf_h_bpsw_set (current_cpu, m32rxf_h_psw_get (current_cpu));
/* sm not changed. */
m32rxf_h_psw_set (current_cpu, m32rxf_h_psw_get (current_cpu) & 0x80);
break;
case MACH_M32R2:
m32r2f_h_bpsw_set (current_cpu, m32r2f_h_psw_get (current_cpu));
/* sm not changed. */
m32r2f_h_psw_set (current_cpu, m32r2f_h_psw_get (current_cpu) & 0x80);
break;
default:
abort ();
}
m32rbf_h_cr_set (current_cpu, H_CR_BPC, cia);
sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL,
EIT_ADDR_EXCP_ADDR);
}
else
sim_core_signal (sd, current_cpu, cia, map, nr_bytes, addr,
transfer, sig);
}
int
device_io_write_buffer (device *me, const void *source, int space,
address_word addr, unsigned nr_bytes,
SIM_DESC sd, SIM_CPU *cpu, sim_cia cia)
{
struct hw *dv_me = (struct hw *) me;
if (STATE_ENVIRONMENT (sd) != OPERATING_ENVIRONMENT)
return nr_bytes;
if (bfin_mmr_check (dv_me, cpu, addr, nr_bytes, true))
if (cpu)
{
sim_cpu_hw_io_write_buffer (cpu, cia, dv_me, source, space,
addr, nr_bytes);
return nr_bytes;
}
else
return sim_hw_io_write_buffer (sd, dv_me, source, space, addr, nr_bytes);
else
return 0;
}
SIM_RC
sim_create_inferior (SIM_DESC sd, struct bfd *abfd,
char **argv, char **env)
{
SIM_CPU *cpu = STATE_CPU (sd, 0);
SIM_ADDR addr;
/* Set the PC. */
if (abfd != NULL)
addr = bfd_get_start_address (abfd);
else
addr = 0;
sim_pc_set (cpu, addr);
/* Standalone mode (i.e. `bfin-...-run`) will take care of the argv
for us in sim_open() -> sim_parse_args(). But in debug mode (i.e.
'target sim' with `bfin-...-gdb`), we need to handle it. */
if (STATE_OPEN_KIND (sd) == SIM_OPEN_DEBUG)
{
freeargv (STATE_PROG_ARGV (sd));
STATE_PROG_ARGV (sd) = dupargv (argv);
}
switch (STATE_ENVIRONMENT (sd))
{
case USER_ENVIRONMENT:
bfin_user_init (sd, cpu, abfd, (void *)argv, (void *)env);
break;
case OPERATING_ENVIRONMENT:
bfin_os_init (sd, cpu, (void *)argv);
break;
default:
bfin_virtual_init (sd, cpu);
break;
}
return SIM_RC_OK;
}
SIM_DESC
sim_open (SIM_OPEN_KIND kind,
host_callback *cb,
struct bfd *abfd,
char **argv)
{
int i;
SIM_DESC sd = sim_state_alloc (kind, cb);
mn10300_callback = cb;
SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
/* The cpu data is kept in a separately allocated chunk of memory. */
if (sim_cpu_alloc_all (sd, 1, /*cgen_cpu_max_extra_bytes ()*/0) != SIM_RC_OK)
return 0;
/* for compatibility */
simulator = sd;
/* FIXME: should be better way of setting up interrupts. For
moment, only support watchpoints causing a breakpoint (gdb
halt). */
STATE_WATCHPOINTS (sd)->pc = &(PC);
STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
STATE_WATCHPOINTS (sd)->interrupt_handler = NULL;
STATE_WATCHPOINTS (sd)->interrupt_names = NULL;
if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
return 0;
sim_add_option_table (sd, NULL, mn10300_options);
/* Allocate core managed memory */
sim_do_command (sd, "memory region 0,0x100000");
sim_do_command (sd, "memory region 0x40000000,0x200000");
/* getopt will print the error message so we just have to exit if this fails.
FIXME: Hmmm... in the case of gdb we need getopt to call
print_filtered. */
if (sim_parse_args (sd, argv) != SIM_RC_OK)
{
/* Uninstall the modules to avoid memory leaks,
file descriptor leaks, etc. */
sim_module_uninstall (sd);
return 0;
}
if ( NULL != board
&& (strcmp(board, BOARD_AM32) == 0 ) )
{
/* environment */
STATE_ENVIRONMENT (sd) = OPERATING_ENVIRONMENT;
sim_do_command (sd, "memory region 0x44000000,0x40000");
sim_do_command (sd, "memory region 0x48000000,0x400000");
/* device support for mn1030002 */
/* interrupt controller */
sim_hw_parse (sd, "/mn103int@0x34000100/reg 0x34000100 0x7C 0x34000200 0x8 0x34000280 0x8");
/* DEBUG: NMI input's */
sim_hw_parse (sd, "/glue@0x30000000/reg 0x30000000 12");
sim_hw_parse (sd, "/glue@0x30000000 > int0 nmirq /mn103int");
sim_hw_parse (sd, "/glue@0x30000000 > int1 watchdog /mn103int");
sim_hw_parse (sd, "/glue@0x30000000 > int2 syserr /mn103int");
/* DEBUG: ACK input */
sim_hw_parse (sd, "/glue@0x30002000/reg 0x30002000 4");
sim_hw_parse (sd, "/glue@0x30002000 > int ack /mn103int");
/* DEBUG: LEVEL output */
sim_hw_parse (sd, "/glue@0x30004000/reg 0x30004000 8");
sim_hw_parse (sd, "/mn103int > nmi int0 /glue@0x30004000");
sim_hw_parse (sd, "/mn103int > level int1 /glue@0x30004000");
/* DEBUG: A bunch of interrupt inputs */
sim_hw_parse (sd, "/glue@0x30006000/reg 0x30006000 32");
sim_hw_parse (sd, "/glue@0x30006000 > int0 irq-0 /mn103int");
sim_hw_parse (sd, "/glue@0x30006000 > int1 irq-1 /mn103int");
sim_hw_parse (sd, "/glue@0x30006000 > int2 irq-2 /mn103int");
sim_hw_parse (sd, "/glue@0x30006000 > int3 irq-3 /mn103int");
sim_hw_parse (sd, "/glue@0x30006000 > int4 irq-4 /mn103int");
sim_hw_parse (sd, "/glue@0x30006000 > int5 irq-5 /mn103int");
sim_hw_parse (sd, "/glue@0x30006000 > int6 irq-6 /mn103int");
sim_hw_parse (sd, "/glue@0x30006000 > int7 irq-7 /mn103int");
/* processor interrupt device */
/* the device */
sim_hw_parse (sd, "/mn103cpu@0x20000000");
sim_hw_parse (sd, "/mn103cpu@0x20000000/reg 0x20000000 0x42");
/* DEBUG: ACK output wired upto a glue device */
sim_hw_parse (sd, "/glue@0x20002000");
sim_hw_parse (sd, "/glue@0x20002000/reg 0x20002000 4");
sim_hw_parse (sd, "/mn103cpu > ack int0 /glue@0x20002000");
/* DEBUG: RESET/NMI/LEVEL wired up to a glue device */
sim_hw_parse (sd, "/glue@0x20004000");
sim_hw_parse (sd, "/glue@0x20004000/reg 0x20004000 12");
sim_hw_parse (sd, "/glue@0x20004000 > int0 reset /mn103cpu");
sim_hw_parse (sd, "/glue@0x20004000 > int1 nmi /mn103cpu");
sim_hw_parse (sd, "/glue@0x20004000 > int2 level /mn103cpu");
/* REAL: The processor wired up to the real interrupt controller */
sim_hw_parse (sd, "/mn103cpu > ack ack /mn103int");
sim_hw_parse (sd, "/mn103int > level level /mn103cpu");
sim_hw_parse (sd, "/mn103int > nmi nmi /mn103cpu");
/* PAL */
/* the device */
sim_hw_parse (sd, "/pal@0x31000000");
sim_hw_parse (sd, "/pal@0x31000000/reg 0x31000000 64");
sim_hw_parse (sd, "/pal@0x31000000/poll? true");
/* DEBUG: PAL wired up to a glue device */
sim_hw_parse (sd, "/glue@0x31002000");
sim_hw_parse (sd, "/glue@0x31002000/reg 0x31002000 16");
sim_hw_parse (sd, "/pal@0x31000000 > countdown int0 /glue@0x31002000");
sim_hw_parse (sd, "/pal@0x31000000 > timer int1 /glue@0x31002000");
sim_hw_parse (sd, "/pal@0x31000000 > int int2 /glue@0x31002000");
sim_hw_parse (sd, "/glue@0x31002000 > int0 int3 /glue@0x31002000");
sim_hw_parse (sd, "/glue@0x31002000 > int1 int3 /glue@0x31002000");
sim_hw_parse (sd, "/glue@0x31002000 > int2 int3 /glue@0x31002000");
/* REAL: The PAL wired up to the real interrupt controller */
sim_hw_parse (sd, "/pal@0x31000000 > countdown irq-0 /mn103int");
sim_hw_parse (sd, "/pal@0x31000000 > timer irq-1 /mn103int");
sim_hw_parse (sd, "/pal@0x31000000 > int irq-2 /mn103int");
/* 8 and 16 bit timers */
sim_hw_parse (sd, "/mn103tim@0x34001000/reg 0x34001000 36 0x34001080 100 0x34004000 16");
/* Hook timer interrupts up to interrupt controller */
sim_hw_parse (sd, "/mn103tim > timer-0-underflow timer-0-underflow /mn103int");
sim_hw_parse (sd, "/mn103tim > timer-1-underflow timer-1-underflow /mn103int");
sim_hw_parse (sd, "/mn103tim > timer-2-underflow timer-2-underflow /mn103int");
sim_hw_parse (sd, "/mn103tim > timer-3-underflow timer-3-underflow /mn103int");
sim_hw_parse (sd, "/mn103tim > timer-4-underflow timer-4-underflow /mn103int");
sim_hw_parse (sd, "/mn103tim > timer-5-underflow timer-5-underflow /mn103int");
sim_hw_parse (sd, "/mn103tim > timer-6-underflow timer-6-underflow /mn103int");
sim_hw_parse (sd, "/mn103tim > timer-6-compare-a timer-6-compare-a /mn103int");
sim_hw_parse (sd, "/mn103tim > timer-6-compare-b timer-6-compare-b /mn103int");
/* Serial devices 0,1,2 */
sim_hw_parse (sd, "/mn103ser@0x34000800/reg 0x34000800 48");
sim_hw_parse (sd, "/mn103ser@0x34000800/poll? true");
/* Hook serial interrupts up to interrupt controller */
sim_hw_parse (sd, "/mn103ser > serial-0-receive serial-0-receive /mn103int");
sim_hw_parse (sd, "/mn103ser > serial-0-transmit serial-0-transmit /mn103int");
sim_hw_parse (sd, "/mn103ser > serial-1-receive serial-1-receive /mn103int");
sim_hw_parse (sd, "/mn103ser > serial-1-transmit serial-1-transmit /mn103int");
sim_hw_parse (sd, "/mn103ser > serial-2-receive serial-2-receive /mn103int");
sim_hw_parse (sd, "/mn103ser > serial-2-transmit serial-2-transmit /mn103int");
sim_hw_parse (sd, "/mn103iop@0x36008000/reg 0x36008000 8 0x36008020 8 0x36008040 0xc 0x36008060 8 0x36008080 8");
/* Memory control registers */
sim_do_command (sd, "memory region 0x32000020,0x30");
/* Cache control register */
sim_do_command (sd, "memory region 0x20000070,0x4");
/* Cache purge regions */
sim_do_command (sd, "memory region 0x28400000,0x800");
sim_do_command (sd, "memory region 0x28401000,0x800");
/* DMA registers */
sim_do_command (sd, "memory region 0x32000100,0xF");
sim_do_command (sd, "memory region 0x32000200,0xF");
sim_do_command (sd, "memory region 0x32000400,0xF");
sim_do_command (sd, "memory region 0x32000800,0xF");
}
else
{
if (board != NULL)
{
sim_io_eprintf (sd, "Error: Board `%s' unknown.\n", board);
return 0;
}
}
/* check for/establish the a reference program image */
if (sim_analyze_program (sd,
(STATE_PROG_ARGV (sd) != NULL
? *STATE_PROG_ARGV (sd)
: NULL),
abfd) != SIM_RC_OK)
{
sim_module_uninstall (sd);
return 0;
}
/* establish any remaining configuration options */
if (sim_config (sd) != SIM_RC_OK)
{
sim_module_uninstall (sd);
return 0;
}
if (sim_post_argv_init (sd) != SIM_RC_OK)
{
/* Uninstall the modules to avoid memory leaks,
file descriptor leaks, etc. */
sim_module_uninstall (sd);
return 0;
}
/* set machine specific configuration */
/* STATE_CPU (sd, 0)->psw_mask = (PSW_NP | PSW_EP | PSW_ID | PSW_SAT */
/* | PSW_CY | PSW_OV | PSW_S | PSW_Z); */
/* CPU specific initialization. */
for (i = 0; i < MAX_NR_PROCESSORS; ++i)
{
SIM_CPU *cpu = STATE_CPU (sd, i);
CPU_PC_FETCH (cpu) = mn10300_pc_get;
CPU_PC_STORE (cpu) = mn10300_pc_set;
}
return sd;
}
void
cec_exception (SIM_CPU *cpu, int excp)
{
SIM_DESC sd = CPU_STATE (cpu);
int sigrc = -1;
TRACE_EVENTS (cpu, "processing exception %#x in EVT%i", excp,
cec_get_ivg (cpu));
/* Ideally what would happen here for real hardware exceptions (not
fake sim ones) is that:
- For service exceptions (excp <= 0x11):
RETX is the _next_ PC which can be tricky with jumps/hardware loops/...
- For error exceptions (excp > 0x11):
RETX is the _current_ PC (i.e. the one causing the exception)
- PC is loaded with EVT3 MMR
- ILAT/IPEND in CEC is updated depending on current IVG level
- the fault address MMRs get updated with data/instruction info
- Execution continues on in the EVT3 handler */
/* Handle simulator exceptions first. */
switch (excp)
{
case VEC_SIM_HLT:
excp_to_sim_halt (sim_exited, 0);
return;
case VEC_SIM_ABORT:
excp_to_sim_halt (sim_exited, 1);
return;
case VEC_SIM_TRAP:
/* GDB expects us to step over EMUEXCPT. */
/* XXX: What about hwloops and EMUEXCPT at the end?
Pretty sure gdb doesn't handle this already... */
SET_PCREG (PCREG + 2);
/* Only trap when we are running in gdb. */
if (STATE_OPEN_KIND (sd) == SIM_OPEN_DEBUG)
excp_to_sim_halt (sim_stopped, SIM_SIGTRAP);
return;
case VEC_SIM_DBGA:
/* If running in gdb, simply trap. */
if (STATE_OPEN_KIND (sd) == SIM_OPEN_DEBUG)
excp_to_sim_halt (sim_stopped, SIM_SIGTRAP);
else
excp_to_sim_halt (sim_exited, 2);
}
if (excp <= 0x3f)
{
SET_EXCAUSE (excp);
if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT)
{
/* ICPLB regs always get updated. */
/* XXX: Should optimize this call path ... */
if (excp != VEC_MISALI_I && excp != VEC_MISALI_D
&& excp != VEC_CPLB_I_M && excp != VEC_CPLB_M
&& excp != VEC_CPLB_I_VL && excp != VEC_CPLB_VL
&& excp != VEC_CPLB_I_MHIT && excp != VEC_CPLB_MHIT)
mmu_log_ifault (cpu);
_cec_raise (cpu, CEC_STATE (cpu), IVG_EVX);
/* We need to restart the engine so that we don't return
and continue processing this bad insn. */
if (EXCAUSE >= 0x20)
sim_engine_restart (sd, cpu, NULL, PCREG);
return;
}
}
TRACE_EVENTS (cpu, "running virtual exception handler");
switch (excp)
{
case VEC_SYS:
bfin_syscall (cpu);
break;
case VEC_EXCPT01: /* Userspace gdb breakpoint. */
sigrc = SIM_SIGTRAP;
break;
case VEC_UNDEF_I: /* Undefined instruction. */
sigrc = SIM_SIGILL;
break;
case VEC_ILL_RES: /* Illegal supervisor resource. */
case VEC_MISALI_I: /* Misaligned instruction. */
sigrc = SIM_SIGBUS;
break;
case VEC_CPLB_M:
case VEC_CPLB_I_M:
sigrc = SIM_SIGSEGV;
break;
default:
sim_io_eprintf (sd, "Unhandled exception %#x at 0x%08x (%s)\n",
excp, PCREG, excp_decoded[excp]);
sigrc = SIM_SIGILL;
break;
}
if (sigrc != -1)
excp_to_sim_halt (sim_stopped, sigrc);
}
USI
m32r_trap (SIM_CPU *current_cpu, PCADDR pc, int num)
{
SIM_DESC sd = CPU_STATE (current_cpu);
host_callback *cb = STATE_CALLBACK (sd);
#ifdef SIM_HAVE_BREAKPOINTS
/* Check for breakpoints "owned" by the simulator first, regardless
of --environment. */
if (num == TRAP_BREAKPOINT)
{
/* First try sim-break.c. If it's a breakpoint the simulator "owns"
it doesn't return. Otherwise it returns and let's us try. */
sim_handle_breakpoint (sd, current_cpu, pc);
/* Fall through. */
}
#endif
if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT)
{
/* The new pc is the trap vector entry.
We assume there's a branch there to some handler.
Use cr5 as EVB (EIT Vector Base) register. */
/* USI new_pc = EIT_TRAP_BASE_ADDR + num * 4; */
USI new_pc = m32rbf_h_cr_get (current_cpu, 5) + 0x40 + num * 4;
return new_pc;
}
switch (num)
{
case TRAP_SYSCALL :
{
CB_SYSCALL s;
CB_SYSCALL_INIT (&s);
s.func = m32rbf_h_gr_get (current_cpu, 0);
s.arg1 = m32rbf_h_gr_get (current_cpu, 1);
s.arg2 = m32rbf_h_gr_get (current_cpu, 2);
s.arg3 = m32rbf_h_gr_get (current_cpu, 3);
if (s.func == TARGET_SYS_exit)
{
sim_engine_halt (sd, current_cpu, NULL, pc, sim_exited, s.arg1);
}
s.p1 = (PTR) sd;
s.p2 = (PTR) current_cpu;
s.read_mem = syscall_read_mem;
s.write_mem = syscall_write_mem;
cb_syscall (cb, &s);
m32rbf_h_gr_set (current_cpu, 2, s.errcode);
m32rbf_h_gr_set (current_cpu, 0, s.result);
m32rbf_h_gr_set (current_cpu, 1, s.result2);
break;
}
case TRAP_BREAKPOINT:
sim_engine_halt (sd, current_cpu, NULL, pc,
sim_stopped, SIM_SIGTRAP);
break;
case TRAP_FLUSH_CACHE:
/* Do nothing. */
break;
default :
{
/* USI new_pc = EIT_TRAP_BASE_ADDR + num * 4; */
/* Use cr5 as EVB (EIT Vector Base) register. */
USI new_pc = m32rbf_h_cr_get (current_cpu, 5) + 0x40 + num * 4;
return new_pc;
}
}
/* Fake an "rte" insn. */
/* FIXME: Should duplicate all of rte processing. */
return (pc & -4) + 4;
}
static SIM_RC
standard_option_handler (SIM_DESC sd, sim_cpu *cpu, int opt,
char *arg, int is_command)
{
int i,n;
switch ((STANDARD_OPTIONS) opt)
{
case OPTION_VERBOSE:
STATE_VERBOSE_P (sd) = 1;
break;
#ifdef SIM_HAVE_BIENDIAN
case OPTION_ENDIAN:
if (strcmp (arg, "big") == 0)
{
if (WITH_TARGET_BYTE_ORDER == LITTLE_ENDIAN)
{
sim_io_eprintf (sd, "Simulator compiled for little endian only.\n");
return SIM_RC_FAIL;
}
/* FIXME:wip: Need to set something in STATE_CONFIG. */
current_target_byte_order = BIG_ENDIAN;
}
else if (strcmp (arg, "little") == 0)
{
if (WITH_TARGET_BYTE_ORDER == BIG_ENDIAN)
{
sim_io_eprintf (sd, "Simulator compiled for big endian only.\n");
return SIM_RC_FAIL;
}
/* FIXME:wip: Need to set something in STATE_CONFIG. */
current_target_byte_order = LITTLE_ENDIAN;
}
else
{
sim_io_eprintf (sd, "Invalid endian specification `%s'\n", arg);
return SIM_RC_FAIL;
}
break;
#endif
case OPTION_ENVIRONMENT:
if (strcmp (arg, "user") == 0)
STATE_ENVIRONMENT (sd) = USER_ENVIRONMENT;
else if (strcmp (arg, "virtual") == 0)
STATE_ENVIRONMENT (sd) = VIRTUAL_ENVIRONMENT;
else if (strcmp (arg, "operating") == 0)
STATE_ENVIRONMENT (sd) = OPERATING_ENVIRONMENT;
else
{
sim_io_eprintf (sd, "Invalid environment specification `%s'\n", arg);
return SIM_RC_FAIL;
}
if (WITH_ENVIRONMENT != ALL_ENVIRONMENT
&& WITH_ENVIRONMENT != STATE_ENVIRONMENT (sd))
{
char *type;
switch (WITH_ENVIRONMENT)
{
case USER_ENVIRONMENT: type = "user"; break;
case VIRTUAL_ENVIRONMENT: type = "virtual"; break;
case OPERATING_ENVIRONMENT: type = "operating"; break;
}
sim_io_eprintf (sd, "Simulator compiled for the %s environment only.\n",
type);
return SIM_RC_FAIL;
}
break;
case OPTION_ALIGNMENT:
if (strcmp (arg, "strict") == 0)
{
if (WITH_ALIGNMENT == 0 || WITH_ALIGNMENT == STRICT_ALIGNMENT)
{
current_alignment = STRICT_ALIGNMENT;
break;
}
}
else if (strcmp (arg, "nonstrict") == 0)
{
if (WITH_ALIGNMENT == 0 || WITH_ALIGNMENT == NONSTRICT_ALIGNMENT)
{
current_alignment = NONSTRICT_ALIGNMENT;
break;
}
}
else if (strcmp (arg, "forced") == 0)
{
if (WITH_ALIGNMENT == 0 || WITH_ALIGNMENT == FORCED_ALIGNMENT)
{
current_alignment = FORCED_ALIGNMENT;
break;
}
}
else
{
sim_io_eprintf (sd, "Invalid alignment specification `%s'\n", arg);
return SIM_RC_FAIL;
}
switch (WITH_ALIGNMENT)
{
case STRICT_ALIGNMENT:
sim_io_eprintf (sd, "Simulator compiled for strict alignment only.\n");
break;
case NONSTRICT_ALIGNMENT:
sim_io_eprintf (sd, "Simulator compiled for nonstrict alignment only.\n");
break;
case FORCED_ALIGNMENT:
sim_io_eprintf (sd, "Simulator compiled for forced alignment only.\n");
break;
}
return SIM_RC_FAIL;
case OPTION_DEBUG:
if (! WITH_DEBUG)
sim_io_eprintf (sd, "Debugging not compiled in, `-D' ignored\n");
else
{
for (n = 0; n < MAX_NR_PROCESSORS; ++n)
for (i = 0; i < MAX_DEBUG_VALUES; ++i)
CPU_DEBUG_FLAGS (STATE_CPU (sd, n))[i] = 1;
}
break;
case OPTION_DEBUG_INSN :
if (! WITH_DEBUG)
sim_io_eprintf (sd, "Debugging not compiled in, `--debug-insn' ignored\n");
else
{
for (n = 0; n < MAX_NR_PROCESSORS; ++n)
CPU_DEBUG_FLAGS (STATE_CPU (sd, n))[DEBUG_INSN_IDX] = 1;
}
break;
case OPTION_DEBUG_FILE :
if (! WITH_DEBUG)
sim_io_eprintf (sd, "Debugging not compiled in, `--debug-file' ignored\n");
else
{
FILE *f = fopen (arg, "w");
if (f == NULL)
{
sim_io_eprintf (sd, "Unable to open debug output file `%s'\n", arg);
return SIM_RC_FAIL;
}
for (n = 0; n < MAX_NR_PROCESSORS; ++n)
CPU_DEBUG_FILE (STATE_CPU (sd, n)) = f;
}
break;
#ifdef SIM_H8300 /* FIXME: Can be moved to h8300 dir. */
case OPTION_H8300:
set_h8300h (1,0);
break;
case OPTION_H8300S:
set_h8300h (1,1);
break;
#endif
#ifdef SIM_HAVE_FLATMEM
case OPTION_MEM_SIZE:
{
unsigned long ul = strtol (arg, NULL, 0);
/* 16384: some minimal amount */
if (! isdigit (arg[0]) || ul < 16384)
{
sim_io_eprintf (sd, "Invalid memory size `%s'", arg);
return SIM_RC_FAIL;
}
STATE_MEM_SIZE (sd) = ul;
}
break;
#endif
case OPTION_DO_COMMAND:
sim_do_command (sd, arg);
break;
case OPTION_ARCHITECTURE:
{
const struct bfd_arch_info *ap = bfd_scan_arch (arg);
if (ap == NULL)
{
sim_io_eprintf (sd, "Architecture `%s' unknown\n", arg);
return SIM_RC_FAIL;
}
STATE_ARCHITECTURE (sd) = ap;
break;
}
case OPTION_ARCHITECTURE_INFO:
{
const char **list = bfd_arch_list();
const char **lp;
if (list == NULL)
abort ();
sim_io_printf (sd, "Possible architectures:");
for (lp = list; *lp != NULL; lp++)
sim_io_printf (sd, " %s", *lp);
sim_io_printf (sd, "\n");
free (list);
break;
}
case OPTION_TARGET:
{
STATE_TARGET (sd) = xstrdup (arg);
break;
}
case OPTION_LOAD_LMA:
{
STATE_LOAD_AT_LMA_P (sd) = 1;
break;
}
case OPTION_LOAD_VMA:
{
STATE_LOAD_AT_LMA_P (sd) = 0;
break;
}
case OPTION_HELP:
sim_print_help (sd, is_command);
if (STATE_OPEN_KIND (sd) == SIM_OPEN_STANDALONE)
exit (0);
/* FIXME: 'twould be nice to do something similar if gdb. */
break;
}
return SIM_RC_OK;
}
int
main (int argc, char **argv)
{
char *name;
char **prog_argv = NULL;
struct bfd *prog_bfd;
enum sim_stop reason;
int sigrc = 0;
int single_step = 0;
RETSIGTYPE (*prev_sigint) ();
myname = argv[0] + strlen (argv[0]);
while (myname > argv[0] && myname[-1] != '/')
--myname;
/* INTERNAL: When MYNAME is `step', single step the simulator
instead of allowing it to run free. The sole purpose of this
HACK is to allow the sim_resume interface's step argument to be
tested without having to build/run gdb. */
if (strlen (myname) > 4 && strcmp (myname - 4, "step") == 0)
{
single_step = 1;
}
/* Create an instance of the simulator. */
default_callback.init (&default_callback);
sd = sim_open (SIM_OPEN_STANDALONE, &default_callback, NULL, argv);
if (sd == 0)
exit (1);
if (STATE_MAGIC (sd) != SIM_MAGIC_NUMBER)
{
fprintf (stderr, "Internal error - bad magic number in simulator struct\n");
abort ();
}
/* We can't set the endianness in the callback structure until
sim_config is called, which happens in sim_open. */
default_callback.target_endian
= (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN
? BFD_ENDIAN_BIG : BFD_ENDIAN_LITTLE);
/* Was there a program to run? */
prog_argv = STATE_PROG_ARGV (sd);
prog_bfd = STATE_PROG_BFD (sd);
if (prog_argv == NULL || *prog_argv == NULL)
usage ();
name = *prog_argv;
/* For simulators that don't open prog during sim_open() */
if (prog_bfd == NULL)
{
prog_bfd = bfd_openr (name, 0);
if (prog_bfd == NULL)
{
fprintf (stderr, "%s: can't open \"%s\": %s\n",
myname, name, bfd_errmsg (bfd_get_error ()));
exit (1);
}
if (!bfd_check_format (prog_bfd, bfd_object))
{
fprintf (stderr, "%s: \"%s\" is not an object file: %s\n",
myname, name, bfd_errmsg (bfd_get_error ()));
exit (1);
}
}
if (STATE_VERBOSE_P (sd))
printf ("%s %s\n", myname, name);
/* Load the program into the simulator. */
if (sim_load (sd, name, prog_bfd, 0) == SIM_RC_FAIL)
exit (1);
/* Prepare the program for execution. */
#ifdef HAVE_ENVIRON
sim_create_inferior (sd, prog_bfd, prog_argv, environ);
#else
sim_create_inferior (sd, prog_bfd, prog_argv, NULL);
#endif
/* To accommodate relative file paths, chdir to sysroot now. We
mustn't do this until BFD has opened the program, else we wouldn't
find the executable if it has a relative file path. */
if (simulator_sysroot[0] != '\0' && chdir (simulator_sysroot) < 0)
{
fprintf (stderr, "%s: can't change directory to \"%s\"\n",
myname, simulator_sysroot);
exit (1);
}
/* Run/Step the program. */
if (single_step)
{
do
{
prev_sigint = signal (SIGINT, cntrl_c);
sim_resume (sd, 1/*step*/, 0);
signal (SIGINT, prev_sigint);
sim_stop_reason (sd, &reason, &sigrc);
if ((reason == sim_stopped) &&
(sigrc == sim_signal_to_host (sd, SIM_SIGINT)))
break; /* exit on control-C */
}
/* remain on breakpoint or signals in oe mode*/
while (((reason == sim_signalled) &&
(sigrc == sim_signal_to_host (sd, SIM_SIGTRAP))) ||
((reason == sim_stopped) &&
(STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT)));
}
else
{
do
{
#if defined (HAVE_SIGACTION) && defined (SA_RESTART)
struct sigaction sa, osa;
sa.sa_handler = cntrl_c;
sigemptyset (&sa.sa_mask);
sa.sa_flags = 0;
sigaction (SIGINT, &sa, &osa);
prev_sigint = osa.sa_handler;
#else
prev_sigint = signal (SIGINT, cntrl_c);
#endif
sim_resume (sd, 0, sigrc);
signal (SIGINT, prev_sigint);
sim_stop_reason (sd, &reason, &sigrc);
if ((reason == sim_stopped) &&
(sigrc == sim_signal_to_host (sd, SIM_SIGINT)))
break; /* exit on control-C */
/* remain on signals in oe mode */
} while ((reason == sim_stopped) &&
(STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT));
}
/* Print any stats the simulator collected. */
if (STATE_VERBOSE_P (sd))
sim_info (sd, 0);
/* Shutdown the simulator. */
sim_close (sd, 0);
/* If reason is sim_exited, then sigrc holds the exit code which we want
to return. If reason is sim_stopped or sim_signalled, then sigrc holds
the signal that the simulator received; we want to return that to
indicate failure. */
/* Why did we stop? */
switch (reason)
{
case sim_signalled:
case sim_stopped:
if (sigrc != 0)
fprintf (stderr, "program stopped with signal %d.\n", sigrc);
break;
case sim_exited:
break;
default:
fprintf (stderr, "program in undefined state (%d:%d)\n", reason, sigrc);
break;
}
return sigrc;
}
SIM_DESC
sim_open (SIM_OPEN_KIND kind, host_callback *callback,
struct bfd *abfd, char **argv)
{
char c;
int i;
SIM_DESC sd = sim_state_alloc (kind, callback);
/* The cpu data is kept in a separately allocated chunk of memory. */
if (sim_cpu_alloc_all (sd, 1, /*cgen_cpu_max_extra_bytes ()*/0) != SIM_RC_OK)
{
free_state (sd);
return 0;
}
{
/* XXX: Only first core gets profiled ? */
SIM_CPU *cpu = STATE_CPU (sd, 0);
STATE_WATCHPOINTS (sd)->pc = &PCREG;
STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PCREG);
}
if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
{
free_state (sd);
return 0;
}
/* XXX: Default to the Virtual environment. */
if (STATE_ENVIRONMENT (sd) == ALL_ENVIRONMENT)
STATE_ENVIRONMENT (sd) = VIRTUAL_ENVIRONMENT;
/* These options override any module options.
Obviously ambiguity should be avoided, however the caller may wish to
augment the meaning of an option. */
#define e_sim_add_option_table(sd, options) \
do { \
extern const OPTION options[]; \
sim_add_option_table (sd, NULL, options); \
} while (0)
e_sim_add_option_table (sd, bfin_mmu_options);
e_sim_add_option_table (sd, bfin_mach_options);
/* getopt will print the error message so we just have to exit if this fails.
FIXME: Hmmm... in the case of gdb we need getopt to call
print_filtered. */
if (sim_parse_args (sd, argv) != SIM_RC_OK)
{
free_state (sd);
return 0;
}
/* Allocate external memory if none specified by user.
Use address 4 here in case the user wanted address 0 unmapped. */
if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0)
{
bu16 emuexcpt = 0x25;
sim_do_commandf (sd, "memory-size 0x%lx", BFIN_DEFAULT_MEM_SIZE);
sim_write (sd, 0, (void *)&emuexcpt, 2);
}
/* Check for/establish the a reference program image. */
if (sim_analyze_program (sd,
(STATE_PROG_ARGV (sd) != NULL
? *STATE_PROG_ARGV (sd)
: NULL), abfd) != SIM_RC_OK)
{
free_state (sd);
return 0;
}
/* Establish any remaining configuration options. */
if (sim_config (sd) != SIM_RC_OK)
{
free_state (sd);
return 0;
}
if (sim_post_argv_init (sd) != SIM_RC_OK)
{
free_state (sd);
return 0;
}
/* CPU specific initialization. */
for (i = 0; i < MAX_NR_PROCESSORS; ++i)
{
SIM_CPU *cpu = STATE_CPU (sd, i);
bfin_initialize_cpu (sd, cpu);
}
return sd;
}
static sim_cia
step_once (SIM_CPU *cpu)
{
SIM_DESC sd = CPU_STATE (cpu);
bu32 insn_len, oldpc = PCREG;
int i;
bool ssstep;
if (TRACE_ANY_P (cpu))
trace_prefix (sd, cpu, NULL_CIA, oldpc, TRACE_LINENUM_P (cpu),
NULL, 0, " "); /* Use a space for gcc warnings. */
/* Handle hardware single stepping when lower than EVT3, and when SYSCFG
has already had the SSSTEP bit enabled. */
ssstep = false;
if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT
&& (SYSCFGREG & SYSCFG_SSSTEP))
{
int ivg = cec_get_ivg (cpu);
if (ivg == -1 || ivg > 3)
ssstep = true;
}
#if 0
/* XXX: Is this what happens on the hardware ? */
if (cec_get_ivg (cpu) == EVT_EMU)
cec_return (cpu, EVT_EMU);
#endif
BFIN_CPU_STATE.did_jump = false;
insn_len = interp_insn_bfin (cpu, oldpc);
/* If we executed this insn successfully, then we always decrement
the loop counter. We don't want to update the PC though if the
last insn happened to be a change in code flow (jump/etc...). */
if (!BFIN_CPU_STATE.did_jump)
SET_PCREG (hwloop_get_next_pc (cpu, oldpc, insn_len));
for (i = 1; i >= 0; --i)
if (LCREG (i) && oldpc == LBREG (i))
{
SET_LCREG (i, LCREG (i) - 1);
if (LCREG (i))
break;
}
++ PROFILE_TOTAL_INSN_COUNT (CPU_PROFILE_DATA (cpu));
/* Handle hardware single stepping only if we're still lower than EVT3.
XXX: May not be entirely correct wrt EXCPT insns. */
if (ssstep)
{
int ivg = cec_get_ivg (cpu);
if (ivg == -1 || ivg > 3)
{
INSN_LEN = 0;
cec_exception (cpu, VEC_STEP);
}
}
return oldpc;
}
void
bfin_syscall (SIM_CPU *cpu)
{
SIM_DESC sd = CPU_STATE (cpu);
const char * const *argv = (void *)STATE_PROG_ARGV (sd);
host_callback *cb = STATE_CALLBACK (sd);
bu32 args[6];
CB_SYSCALL sc;
char *p;
char _tbuf[1024 * 3], *tbuf = _tbuf, tstr[1024];
int fmt_ret_hex = 0;
CB_SYSCALL_INIT (&sc);
if (STATE_ENVIRONMENT (sd) == USER_ENVIRONMENT)
{
/* Linux syscall. */
sc.func = PREG (0);
sc.arg1 = args[0] = DREG (0);
sc.arg2 = args[1] = DREG (1);
sc.arg3 = args[2] = DREG (2);
sc.arg4 = args[3] = DREG (3);
/*sc.arg5 =*/ args[4] = DREG (4);
/*sc.arg6 =*/ args[5] = DREG (5);
}
else
{
/* libgloss syscall. */
sc.func = PREG (0);
sc.arg1 = args[0] = GET_LONG (DREG (0));
sc.arg2 = args[1] = GET_LONG (DREG (0) + 4);
sc.arg3 = args[2] = GET_LONG (DREG (0) + 8);
sc.arg4 = args[3] = GET_LONG (DREG (0) + 12);
/*sc.arg5 =*/ args[4] = GET_LONG (DREG (0) + 16);
/*sc.arg6 =*/ args[5] = GET_LONG (DREG (0) + 20);
}
sc.p1 = (PTR) sd;
sc.p2 = (PTR) cpu;
sc.read_mem = sim_syscall_read_mem;
sc.write_mem = sim_syscall_write_mem;
/* Common cb_syscall() handles most functions. */
switch (cb_target_to_host_syscall (cb, sc.func))
{
case CB_SYS_exit:
tbuf += sprintf (tbuf, "exit(%i)", args[0]);
sim_engine_halt (sd, cpu, NULL, PCREG, sim_exited, sc.arg1);
#ifdef CB_SYS_argc
case CB_SYS_argc:
tbuf += sprintf (tbuf, "argc()");
sc.result = count_argc (argv);
break;
case CB_SYS_argnlen:
{
tbuf += sprintf (tbuf, "argnlen(%u)", args[0]);
if (sc.arg1 < count_argc (argv))
sc.result = strlen (argv[sc.arg1]);
else
sc.result = -1;
}
break;
case CB_SYS_argn:
{
tbuf += sprintf (tbuf, "argn(%u)", args[0]);
if (sc.arg1 < count_argc (argv))
{
const char *argn = argv[sc.arg1];
int len = strlen (argn);
int written = sc.write_mem (cb, &sc, sc.arg2, argn, len + 1);
if (written == len + 1)
sc.result = sc.arg2;
else
sc.result = -1;
}
else
sc.result = -1;
}
break;
#endif
case CB_SYS_gettimeofday:
{
struct timeval _tv, *tv = &_tv;
struct timezone _tz, *tz = &_tz;
tbuf += sprintf (tbuf, "gettimeofday(%#x, %#x)", args[0], args[1]);
if (sc.arg1 == 0)
tv = NULL;
if (sc.arg2 == 0)
tz = NULL;
sc.result = gettimeofday (tv, tz);
if (sc.result == 0)
{
bu32 t;
if (tv)
{
t = tv->tv_sec;
sc.write_mem (cb, &sc, sc.arg1, (void *)&t, 4);
t = tv->tv_usec;
sc.write_mem (cb, &sc, sc.arg1 + 4, (void *)&t, 4);
}
if (sc.arg2)
{
t = tz->tz_minuteswest;
sc.write_mem (cb, &sc, sc.arg1, (void *)&t, 4);
t = tz->tz_dsttime;
sc.write_mem (cb, &sc, sc.arg1 + 4, (void *)&t, 4);
}
}
else
goto sys_finish;
}
break;
case CB_SYS_ioctl:
/* XXX: hack just enough to get basic stdio w/uClibc ... */
tbuf += sprintf (tbuf, "ioctl(%i, %#x, %u)", args[0], args[1], args[2]);
if (sc.arg2 == 0x5401)
{
sc.result = !isatty (sc.arg1);
sc.errcode = 0;
}
else
{
sc.result = -1;
sc.errcode = TARGET_EINVAL;
}
break;
case CB_SYS_mmap2:
{
static bu32 heap = BFIN_DEFAULT_MEM_SIZE / 2;
fmt_ret_hex = 1;
tbuf += sprintf (tbuf, "mmap2(%#x, %u, %#x, %#x, %i, %u)",
args[0], args[1], args[2], args[3], args[4], args[5]);
sc.errcode = 0;
if (sc.arg4 & 0x20 /*MAP_ANONYMOUS*/)
/* XXX: We don't handle zeroing, but default is all zeros. */;
else if (args[4] >= MAX_CALLBACK_FDS)
sc.errcode = TARGET_ENOSYS;
else
{
#ifdef HAVE_PREAD
char *data = xmalloc (sc.arg2);
/* XXX: Should add a cb->pread. */
if (pread (cb->fdmap[args[4]], data, sc.arg2, args[5] << 12) == sc.arg2)
sc.write_mem (cb, &sc, heap, data, sc.arg2);
else
sc.errcode = TARGET_EINVAL;
free (data);
#else
sc.errcode = TARGET_ENOSYS;
#endif
}
if (sc.errcode)
{
sc.result = -1;
break;
}
sc.result = heap;
heap += sc.arg2;
/* Keep it page aligned. */
heap = ALIGN (heap, 4096);
break;
}
case CB_SYS_munmap:
/* XXX: meh, just lie for mmap(). */
tbuf += sprintf (tbuf, "munmap(%#x, %u)", args[0], args[1]);
sc.result = 0;
break;
case CB_SYS_dup2:
tbuf += sprintf (tbuf, "dup2(%i, %i)", args[0], args[1]);
if (sc.arg1 >= MAX_CALLBACK_FDS || sc.arg2 >= MAX_CALLBACK_FDS)
{
sc.result = -1;
sc.errcode = TARGET_EINVAL;
}
else
{
sc.result = dup2 (cb->fdmap[sc.arg1], cb->fdmap[sc.arg2]);
goto sys_finish;
}
break;
case CB_SYS__llseek:
tbuf += sprintf (tbuf, "llseek(%i, %u, %u, %#x, %u)",
args[0], args[1], args[2], args[3], args[4]);
sc.func = TARGET_LINUX_SYS_lseek;
if (sc.arg2)
{
sc.result = -1;
sc.errcode = TARGET_EINVAL;
}
else
{
sc.arg2 = sc.arg3;
sc.arg3 = args[4];
cb_syscall (cb, &sc);
if (sc.result != -1)
{
bu32 z = 0;
sc.write_mem (cb, &sc, args[3], (void *)&sc.result, 4);
sc.write_mem (cb, &sc, args[3] + 4, (void *)&z, 4);
}
}
break;
/* XXX: Should add a cb->pread. */
case CB_SYS_pread:
tbuf += sprintf (tbuf, "pread(%i, %#x, %u, %i)",
args[0], args[1], args[2], args[3]);
if (sc.arg1 >= MAX_CALLBACK_FDS)
{
sc.result = -1;
sc.errcode = TARGET_EINVAL;
}
else
{
long old_pos, read_result, read_errcode;
/* Get current filepos. */
sc.func = TARGET_LINUX_SYS_lseek;
sc.arg2 = 0;
sc.arg3 = SEEK_CUR;
cb_syscall (cb, &sc);
if (sc.result == -1)
break;
old_pos = sc.result;
/* Move to the new pos. */
sc.func = TARGET_LINUX_SYS_lseek;
sc.arg2 = args[3];
sc.arg3 = SEEK_SET;
cb_syscall (cb, &sc);
if (sc.result == -1)
break;
/* Read the data. */
sc.func = TARGET_LINUX_SYS_read;
sc.arg2 = args[1];
sc.arg3 = args[2];
cb_syscall (cb, &sc);
read_result = sc.result;
read_errcode = sc.errcode;
/* Move back to the old pos. */
sc.func = TARGET_LINUX_SYS_lseek;
sc.arg2 = old_pos;
sc.arg3 = SEEK_SET;
cb_syscall (cb, &sc);
sc.result = read_result;
sc.errcode = read_errcode;
}
break;
case CB_SYS_getcwd:
tbuf += sprintf (tbuf, "getcwd(%#x, %u)", args[0], args[1]);
p = alloca (sc.arg2);
if (getcwd (p, sc.arg2) == NULL)
{
sc.result = -1;
sc.errcode = TARGET_EINVAL;
}
else
{
sc.write_mem (cb, &sc, sc.arg1, p, sc.arg2);
sc.result = sc.arg1;
}
break;
case CB_SYS_stat64:
if (cb_get_string (cb, &sc, tstr, sizeof (tstr), args[0]))
strcpy (tstr, "???");
tbuf += sprintf (tbuf, "stat64(%#x:\"%s\", %u)", args[0], tstr, args[1]);
cb->stat_map = stat_map_64;
sc.func = TARGET_LINUX_SYS_stat;
cb_syscall (cb, &sc);
cb->stat_map = stat_map_32;
break;
case CB_SYS_lstat64:
if (cb_get_string (cb, &sc, tstr, sizeof (tstr), args[0]))
strcpy (tstr, "???");
tbuf += sprintf (tbuf, "lstat64(%#x:\"%s\", %u)", args[0], tstr, args[1]);
cb->stat_map = stat_map_64;
sc.func = TARGET_LINUX_SYS_lstat;
cb_syscall (cb, &sc);
cb->stat_map = stat_map_32;
break;
case CB_SYS_fstat64:
tbuf += sprintf (tbuf, "fstat64(%#x, %u)", args[0], args[1]);
cb->stat_map = stat_map_64;
sc.func = TARGET_LINUX_SYS_fstat;
cb_syscall (cb, &sc);
cb->stat_map = stat_map_32;
break;
case CB_SYS_ftruncate64:
tbuf += sprintf (tbuf, "ftruncate64(%u, %u)", args[0], args[1]);
sc.func = TARGET_LINUX_SYS_ftruncate;
cb_syscall (cb, &sc);
break;
case CB_SYS_getuid:
case CB_SYS_getuid32:
tbuf += sprintf (tbuf, "getuid()");
sc.result = getuid ();
goto sys_finish;
case CB_SYS_getgid:
case CB_SYS_getgid32:
tbuf += sprintf (tbuf, "getgid()");
sc.result = getgid ();
goto sys_finish;
case CB_SYS_setuid:
sc.arg1 &= 0xffff;
case CB_SYS_setuid32:
tbuf += sprintf (tbuf, "setuid(%u)", args[0]);
sc.result = setuid (sc.arg1);
goto sys_finish;
case CB_SYS_setgid:
sc.arg1 &= 0xffff;
case CB_SYS_setgid32:
tbuf += sprintf (tbuf, "setgid(%u)", args[0]);
sc.result = setgid (sc.arg1);
goto sys_finish;
case CB_SYS_getpid:
tbuf += sprintf (tbuf, "getpid()");
sc.result = getpid ();
goto sys_finish;
case CB_SYS_kill:
tbuf += sprintf (tbuf, "kill(%u, %i)", args[0], args[1]);
/* Only let the app kill itself. */
if (sc.arg1 != getpid ())
{
sc.result = -1;
sc.errcode = TARGET_EPERM;
}
else
{
#ifdef HAVE_KILL
sc.result = kill (sc.arg1, sc.arg2);
goto sys_finish;
#else
sc.result = -1;
sc.errcode = TARGET_ENOSYS;
#endif
}
break;
case CB_SYS_open:
if (cb_get_string (cb, &sc, tstr, sizeof (tstr), args[0]))
strcpy (tstr, "???");
tbuf += sprintf (tbuf, "open(%#x:\"%s\", %#x, %o)",
args[0], tstr, args[1], args[2]);
goto case_default;
case CB_SYS_close:
tbuf += sprintf (tbuf, "close(%i)", args[0]);
goto case_default;
case CB_SYS_read:
tbuf += sprintf (tbuf, "read(%i, %#x, %u)", args[0], args[1], args[2]);
goto case_default;
case CB_SYS_write:
if (cb_get_string (cb, &sc, tstr, sizeof (tstr), args[1]))
strcpy (tstr, "???");
tbuf += sprintf (tbuf, "write(%i, %#x:\"%s\", %u)",
args[0], args[1], tstr, args[2]);
goto case_default;
case CB_SYS_lseek:
tbuf += sprintf (tbuf, "lseek(%i, %i, %i)", args[0], args[1], args[2]);
goto case_default;
case CB_SYS_unlink:
if (cb_get_string (cb, &sc, tstr, sizeof (tstr), args[0]))
strcpy (tstr, "???");
tbuf += sprintf (tbuf, "unlink(%#x:\"%s\")", args[0], tstr);
goto case_default;
case CB_SYS_truncate:
if (cb_get_string (cb, &sc, tstr, sizeof (tstr), args[0]))
strcpy (tstr, "???");
tbuf += sprintf (tbuf, "truncate(%#x:\"%s\", %i)", args[0], tstr, args[1]);
goto case_default;
case CB_SYS_ftruncate:
tbuf += sprintf (tbuf, "ftruncate(%i, %i)", args[0], args[1]);
goto case_default;
case CB_SYS_rename:
if (cb_get_string (cb, &sc, tstr, sizeof (tstr), args[0]))
strcpy (tstr, "???");
tbuf += sprintf (tbuf, "rename(%#x:\"%s\", ", args[0], tstr);
if (cb_get_string (cb, &sc, tstr, sizeof (tstr), args[1]))
strcpy (tstr, "???");
tbuf += sprintf (tbuf, "%#x:\"%s\")", args[1], tstr);
goto case_default;
case CB_SYS_stat:
if (cb_get_string (cb, &sc, tstr, sizeof (tstr), args[0]))
strcpy (tstr, "???");
tbuf += sprintf (tbuf, "stat(%#x:\"%s\", %#x)", args[0], tstr, args[1]);
goto case_default;
case CB_SYS_fstat:
tbuf += sprintf (tbuf, "fstat(%i, %#x)", args[0], args[1]);
goto case_default;
case CB_SYS_lstat:
if (cb_get_string (cb, &sc, tstr, sizeof (tstr), args[0]))
strcpy (tstr, "???");
tbuf += sprintf (tbuf, "lstat(%#x:\"%s\", %#x)", args[0], tstr, args[1]);
goto case_default;
case CB_SYS_pipe:
tbuf += sprintf (tbuf, "pipe(%#x, %#x)", args[0], args[1]);
goto case_default;
default:
tbuf += sprintf (tbuf, "???_%i(%#x, %#x, %#x, %#x, %#x, %#x)", sc.func,
args[0], args[1], args[2], args[3], args[4], args[5]);
case_default:
cb_syscall (cb, &sc);
break;
sys_finish:
if (sc.result == -1)
{
cb->last_errno = errno;
sc.errcode = cb->get_errno (cb);
}
}
TRACE_EVENTS (cpu, "syscall_%i(%#x, %#x, %#x, %#x, %#x, %#x) = %li (error = %i)",
sc.func, args[0], args[1], args[2], args[3], args[4], args[5],
sc.result, sc.errcode);
tbuf += sprintf (tbuf, " = ");
if (STATE_ENVIRONMENT (sd) == USER_ENVIRONMENT)
{
if (sc.result == -1)
{
tbuf += sprintf (tbuf, "-1 (error = %i)", sc.errcode);
if (sc.errcode == cb_host_to_target_errno (cb, ENOSYS))
{
sim_io_eprintf (sd, "bfin-sim: %#x: unimplemented syscall %i\n",
PCREG, sc.func);
}
SET_DREG (0, -sc.errcode);
}
else
{
if (fmt_ret_hex)
tbuf += sprintf (tbuf, "%#lx", sc.result);
else
tbuf += sprintf (tbuf, "%lu", sc.result);
SET_DREG (0, sc.result);
}
}
else
{
tbuf += sprintf (tbuf, "%lu (error = %i)", sc.result, sc.errcode);
SET_DREG (0, sc.result);
SET_DREG (1, sc.result2);
SET_DREG (2, sc.errcode);
}
TRACE_SYSCALL (cpu, "%s", _tbuf);
}
void
cec_return (SIM_CPU *cpu, int ivg)
{
SIM_DESC sd = CPU_STATE (cpu);
struct bfin_cec *cec;
bool snen;
int curr_ivg;
bu32 oldpc, newpc;
oldpc = PCREG;
BFIN_CPU_STATE.did_jump = true;
if (STATE_ENVIRONMENT (sd) != OPERATING_ENVIRONMENT)
{
SET_PCREG (cec_read_ret_reg (cpu, ivg));
TRACE_BRANCH (cpu, oldpc, PCREG, -1, "CEC changed PC");
return;
}
cec = CEC_STATE (cpu);
/* XXX: This isn't entirely correct ... */
cec->ipend &= ~IVG_EMU_B;
curr_ivg = _cec_get_ivg (cec);
if (curr_ivg == -1)
curr_ivg = IVG_USER;
if (ivg == -1)
ivg = curr_ivg;
TRACE_EVENTS (cpu, "returning from EVT%i (should be EVT%i)", curr_ivg, ivg);
/* Not allowed to return from usermode. */
if (curr_ivg == IVG_USER)
cec_exception (cpu, VEC_ILL_RES);
if (ivg > IVG15 || ivg < 0)
sim_io_error (sd, "%s: ivg %i out of range !", __func__, ivg);
_cec_require_supervisor (cpu, cec);
switch (ivg)
{
case IVG_EMU:
/* RTE -- only valid in emulation mode. */
/* XXX: What does the hardware do ? */
if (curr_ivg != IVG_EMU)
cec_exception (cpu, VEC_ILL_RES);
break;
case IVG_NMI:
/* RTN -- only valid in NMI. */
/* XXX: What does the hardware do ? */
if (curr_ivg != IVG_NMI)
cec_exception (cpu, VEC_ILL_RES);
break;
case IVG_EVX:
/* RTX -- only valid in exception. */
/* XXX: What does the hardware do ? */
if (curr_ivg != IVG_EVX)
cec_exception (cpu, VEC_ILL_RES);
break;
default:
/* RTI -- not valid in emulation, nmi, exception, or user. */
/* XXX: What does the hardware do ? */
if (curr_ivg == IVG_EMU || curr_ivg == IVG_NMI
|| curr_ivg == IVG_EVX || curr_ivg == IVG_USER)
cec_exception (cpu, VEC_ILL_RES);
break;
case IVG_IRPTEN:
/* XXX: Is this even possible ? */
excp_to_sim_halt (sim_stopped, SIM_SIGABRT);
break;
}
newpc = cec_read_ret_reg (cpu, ivg);
/* XXX: Does this nested trick work on EMU/NMI/EVX ? */
snen = (newpc & 1);
/* XXX: Delayed clear shows bad PCREG register trace above ? */
SET_PCREG (newpc & ~1);
TRACE_BRANCH (cpu, oldpc, PCREG, -1, "CEC changed PC (from EVT%i)", ivg);
/* Update ipend after the TRACE_BRANCH so dv-bfin_trace
knows current CEC state wrt overflow. */
if (!snen)
cec->ipend &= ~(1 << ivg);
/* Disable global interrupt mask to let any interrupt take over, but
only when we were already in a RTI level. Only way we could have
raised at that point is if it was cleared in the first place. */
if (ivg >= IVG_IVHW || ivg == IVG_RST)
cec_irpten_disable (cpu, cec);
/* When going from super to user, we clear LSB in LB regs in case
it was set on the transition up.
Also need to load SP alias with USP. */
if (_cec_get_ivg (cec) == -1)
{
int i;
for (i = 0; i < 2; ++i)
if (LBREG (i) & 1)
SET_LBREG (i, LBREG (i) & ~1);
SET_KSPREG (SPREG);
SET_SPREG (USPREG);
}
/* Check for pending interrupts before we return to usermode. */
_cec_check_pending (cpu, cec);
}
/* Handle TRA and TIRA insns. */
void
frv_itrap (SIM_CPU *current_cpu, PCADDR pc, USI base, SI offset)
{
SIM_DESC sd = CPU_STATE (current_cpu);
host_callback *cb = STATE_CALLBACK (sd);
USI num = ((base + offset) & 0x7f) + 0x80;
#ifdef SIM_HAVE_BREAKPOINTS
/* Check for breakpoints "owned" by the simulator first, regardless
of --environment. */
if (num == TRAP_BREAKPOINT)
{
/* First try sim-break.c. If it's a breakpoint the simulator "owns"
it doesn't return. Otherwise it returns and let's us try. */
sim_handle_breakpoint (sd, current_cpu, pc);
/* Fall through. */
}
#endif
if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT)
{
frv_queue_software_interrupt (current_cpu, num);
return;
}
switch (num)
{
case TRAP_SYSCALL :
{
CB_SYSCALL s;
CB_SYSCALL_INIT (&s);
s.func = GET_H_GR (7);
s.arg1 = GET_H_GR (8);
s.arg2 = GET_H_GR (9);
s.arg3 = GET_H_GR (10);
if (s.func == TARGET_SYS_exit)
{
sim_engine_halt (sd, current_cpu, NULL, pc, sim_exited, s.arg1);
}
s.p1 = (PTR) sd;
s.p2 = (PTR) current_cpu;
s.read_mem = syscall_read_mem;
s.write_mem = syscall_write_mem;
cb_syscall (cb, &s);
SET_H_GR (8, s.result);
SET_H_GR (9, s.result2);
SET_H_GR (10, s.errcode);
break;
}
case TRAP_BREAKPOINT:
sim_engine_halt (sd, current_cpu, NULL, pc, sim_stopped, SIM_SIGTRAP);
break;
/* Add support for dumping registers, either at fixed traps, or all
unknown traps if configured with --enable-sim-trapdump. */
default:
#if !TRAPDUMP
frv_queue_software_interrupt (current_cpu, num);
return;
#endif
#ifdef TRAP_REGDUMP1
case TRAP_REGDUMP1:
#endif
#ifdef TRAP_REGDUMP2
case TRAP_REGDUMP2:
#endif
#if TRAPDUMP || (defined (TRAP_REGDUMP1)) || (defined (TRAP_REGDUMP2))
{
char buf[256];
int i, j;
buf[0] = 0;
if (STATE_TEXT_SECTION (sd)
&& pc >= STATE_TEXT_START (sd)
&& pc < STATE_TEXT_END (sd))
{
const char *pc_filename = (const char *)0;
const char *pc_function = (const char *)0;
unsigned int pc_linenum = 0;
if (bfd_find_nearest_line (STATE_PROG_BFD (sd),
STATE_TEXT_SECTION (sd),
(struct bfd_symbol **) 0,
pc - STATE_TEXT_START (sd),
&pc_filename, &pc_function, &pc_linenum)
&& (pc_function || pc_filename))
{
char *p = buf+2;
buf[0] = ' ';
buf[1] = '(';
if (pc_function)
{
strcpy (p, pc_function);
p += strlen (p);
}
else
{
char *q = (char *) strrchr (pc_filename, '/');
strcpy (p, (q) ? q+1 : pc_filename);
p += strlen (p);
}
if (pc_linenum)
{
sprintf (p, " line %d", pc_linenum);
p += strlen (p);
}
p[0] = ')';
p[1] = '\0';
if ((p+1) - buf > sizeof (buf))
abort ();
}
}
sim_io_printf (sd,
"\nRegister dump, pc = 0x%.8x%s, base = %u, offset = %d\n",
(unsigned)pc, buf, (unsigned)base, (int)offset);
for (i = 0; i < 64; i += 8)
{
long g0 = (long)GET_H_GR (i);
long g1 = (long)GET_H_GR (i+1);
long g2 = (long)GET_H_GR (i+2);
long g3 = (long)GET_H_GR (i+3);
long g4 = (long)GET_H_GR (i+4);
long g5 = (long)GET_H_GR (i+5);
long g6 = (long)GET_H_GR (i+6);
long g7 = (long)GET_H_GR (i+7);
if ((g0 | g1 | g2 | g3 | g4 | g5 | g6 | g7) != 0)
sim_io_printf (sd,
"\tgr%02d - gr%02d: 0x%.8lx 0x%.8lx 0x%.8lx 0x%.8lx 0x%.8lx 0x%.8lx 0x%.8lx 0x%.8lx\n",
i, i+7, g0, g1, g2, g3, g4, g5, g6, g7);
}
for (i = 0; i < 64; i += 8)
{
long f0 = (long)GET_H_FR (i);
long f1 = (long)GET_H_FR (i+1);
long f2 = (long)GET_H_FR (i+2);
long f3 = (long)GET_H_FR (i+3);
long f4 = (long)GET_H_FR (i+4);
long f5 = (long)GET_H_FR (i+5);
long f6 = (long)GET_H_FR (i+6);
long f7 = (long)GET_H_FR (i+7);
if ((f0 | f1 | f2 | f3 | f4 | f5 | f6 | f7) != 0)
sim_io_printf (sd,
"\tfr%02d - fr%02d: 0x%.8lx 0x%.8lx 0x%.8lx 0x%.8lx 0x%.8lx 0x%.8lx 0x%.8lx 0x%.8lx\n",
i, i+7, f0, f1, f2, f3, f4, f5, f6, f7);
}
sim_io_printf (sd,
"\tlr/lcr/cc/ccc: 0x%.8lx 0x%.8lx 0x%.8lx 0x%.8lx\n",
(long)GET_H_SPR (272),
(long)GET_H_SPR (273),
(long)GET_H_SPR (256),
(long)GET_H_SPR (263));
}
break;
#endif
}
}
static SIM_RC
dv_sockser_init (SIM_DESC sd)
{
struct hostent *hostent;
struct sockaddr_in sockaddr;
char hostname[100];
const char *port_str;
int tmp,port;
if (STATE_ENVIRONMENT (sd) != OPERATING_ENVIRONMENT
|| sockser_addr == NULL)
return SIM_RC_OK;
if (*sockser_addr == '/')
{
/* support for these can come later */
sim_io_eprintf (sd, "sockser init: unix domain sockets not supported: `%s'\n",
sockser_addr);
return SIM_RC_FAIL;
}
port_str = strchr (sockser_addr, ':');
if (!port_str)
{
sim_io_eprintf (sd, "sockser init: missing port number: `%s'\n",
sockser_addr);
return SIM_RC_FAIL;
}
tmp = port_str - sockser_addr;
if (tmp >= sizeof hostname)
tmp = sizeof (hostname) - 1;
strncpy (hostname, sockser_addr, tmp);
hostname[tmp] = '\000';
port = atoi (port_str + 1);
hostent = gethostbyname (hostname);
if (! hostent)
{
sim_io_eprintf (sd, "sockser init: unknown host: %s\n",
hostname);
return SIM_RC_FAIL;
}
sockser_listen_fd = socket (PF_INET, SOCK_STREAM, 0);
if (sockser_listen_fd < 0)
{
sim_io_eprintf (sd, "sockser init: unable to get socket: %s\n",
strerror (errno));
return SIM_RC_FAIL;
}
sockaddr.sin_family = PF_INET;
sockaddr.sin_port = htons(port);
memcpy (&sockaddr.sin_addr.s_addr, hostent->h_addr,
sizeof (struct in_addr));
tmp = 1;
if (setsockopt (sockser_listen_fd, SOL_SOCKET, SO_REUSEADDR, (void*)& tmp, sizeof(tmp)) < 0)
{
sim_io_eprintf (sd, "sockser init: unable to set SO_REUSEADDR: %s\n",
strerror (errno));
}
if (bind (sockser_listen_fd, (struct sockaddr *) &sockaddr, sizeof (sockaddr)) < 0)
{
sim_io_eprintf (sd, "sockser init: unable to bind socket address: %s\n",
strerror (errno));
close (sockser_listen_fd);
sockser_listen_fd = -1;
return SIM_RC_FAIL;
}
if (listen (sockser_listen_fd, 1) < 0)
{
sim_io_eprintf (sd, "sockser init: unable to set up listener: %s\n",
strerror (errno));
close (sockser_listen_fd);
sockser_listen_fd = -1;
return SIM_RC_OK;
}
/* Handle writes to missing client -> SIGPIPE.
??? Need a central signal management module. */
{
RETSIGTYPE (*orig) ();
orig = signal (SIGPIPE, SIG_IGN);
/* If a handler is already set up, don't mess with it. */
if (orig != SIG_DFL && orig != SIG_IGN)
signal (SIGPIPE, orig);
}
return SIM_RC_OK;
}
USI
fr30_int (SIM_CPU *current_cpu, PCADDR pc, int num)
{
SIM_DESC sd = CPU_STATE (current_cpu);
host_callback *cb = STATE_CALLBACK (sd);
#ifdef SIM_HAVE_BREAKPOINTS
/* Check for breakpoints "owned" by the simulator first, regardless
of --environment. */
if (num == TRAP_BREAKPOINT)
{
/* First try sim-break.c. If it's a breakpoint the simulator "owns"
it doesn't return. Otherwise it returns and let's us try. */
sim_handle_breakpoint (sd, current_cpu, pc);
/* Fall through. */
}
#endif
if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT)
{
/* The new pc is the trap vector entry.
We assume there's a branch there to some handler. */
USI new_pc;
setup_int (current_cpu, pc);
fr30bf_h_ibit_set (current_cpu, 0);
new_pc = GETMEMSI (current_cpu, pc,
fr30bf_h_dr_get (current_cpu, H_DR_TBR)
+ 1024 - ((num + 1) * 4));
return new_pc;
}
switch (num)
{
case TRAP_SYSCALL :
{
/* TODO: find out what the ABI for this is */
CB_SYSCALL s;
CB_SYSCALL_INIT (&s);
s.func = fr30bf_h_gr_get (current_cpu, 0);
s.arg1 = fr30bf_h_gr_get (current_cpu, 4);
s.arg2 = fr30bf_h_gr_get (current_cpu, 5);
s.arg3 = fr30bf_h_gr_get (current_cpu, 6);
if (s.func == TARGET_SYS_exit)
{
sim_engine_halt (sd, current_cpu, NULL, pc, sim_exited, s.arg1);
}
s.p1 = (PTR) sd;
s.p2 = (PTR) current_cpu;
s.read_mem = syscall_read_mem;
s.write_mem = syscall_write_mem;
cb_syscall (cb, &s);
fr30bf_h_gr_set (current_cpu, 2, s.errcode); /* TODO: check this one */
fr30bf_h_gr_set (current_cpu, 4, s.result);
fr30bf_h_gr_set (current_cpu, 1, s.result2); /* TODO: check this one */
break;
}
case TRAP_BREAKPOINT:
sim_engine_halt (sd, current_cpu, NULL, pc,
sim_stopped, SIM_SIGTRAP);
break;
default :
{
USI new_pc;
setup_int (current_cpu, pc);
fr30bf_h_ibit_set (current_cpu, 0);
new_pc = GETMEMSI (current_cpu, pc,
fr30bf_h_dr_get (current_cpu, H_DR_TBR)
+ 1024 - ((num + 1) * 4));
return new_pc;
}
}
/* Fake an "reti" insn.
Since we didn't push anything to stack, all we need to do is
update pc. */
return pc + 2;
}
SIM_RC
sim_config (SIM_DESC sd)
{
enum bfd_endian prefered_target_byte_order;
SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
/* extract all relevant information */
if (STATE_PROG_BFD (sd) == NULL
/* If we have a binary input file (presumably with specified
"--architecture"), it'll have no endianness. */
|| (!bfd_little_endian (STATE_PROG_BFD (sd))
&& !bfd_big_endian (STATE_PROG_BFD (sd))))
prefered_target_byte_order = BFD_ENDIAN_UNKNOWN;
else
prefered_target_byte_order = (bfd_little_endian (STATE_PROG_BFD (sd))
? BFD_ENDIAN_LITTLE
: BFD_ENDIAN_BIG);
/* set the target byte order */
#if (WITH_TREE_PROPERTIES)
if (current_target_byte_order == BFD_ENDIAN_UNKNOWN)
current_target_byte_order
= (tree_find_boolean_property (root, "/options/little-endian?")
? BFD_ENDIAN_LITTLE
: BFD_ENDIAN_BIG);
#endif
if (current_target_byte_order == BFD_ENDIAN_UNKNOWN
&& prefered_target_byte_order != BFD_ENDIAN_UNKNOWN)
current_target_byte_order = prefered_target_byte_order;
if (current_target_byte_order == BFD_ENDIAN_UNKNOWN)
current_target_byte_order = WITH_TARGET_BYTE_ORDER;
if (current_target_byte_order == BFD_ENDIAN_UNKNOWN)
current_target_byte_order = WITH_DEFAULT_TARGET_BYTE_ORDER;
/* verify the target byte order */
if (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_UNKNOWN)
{
sim_io_eprintf (sd, "Target byte order unspecified\n");
return SIM_RC_FAIL;
}
if (CURRENT_TARGET_BYTE_ORDER != current_target_byte_order)
sim_io_eprintf (sd, "Target (%s) and configured (%s) byte order in conflict\n",
config_byte_order_to_a (current_target_byte_order),
config_byte_order_to_a (CURRENT_TARGET_BYTE_ORDER));
if (prefered_target_byte_order != BFD_ENDIAN_UNKNOWN
&& CURRENT_TARGET_BYTE_ORDER != prefered_target_byte_order)
sim_io_eprintf (sd, "Target (%s) and specified (%s) byte order in conflict\n",
config_byte_order_to_a (CURRENT_TARGET_BYTE_ORDER),
config_byte_order_to_a (prefered_target_byte_order));
/* set the stdio */
if (current_stdio == 0)
current_stdio = WITH_STDIO;
if (current_stdio == 0)
current_stdio = DO_USE_STDIO;
/* verify the stdio */
if (CURRENT_STDIO == 0)
{
sim_io_eprintf (sd, "Target standard IO unspecified\n");
return SIM_RC_FAIL;
}
if (CURRENT_STDIO != current_stdio)
{
sim_io_eprintf (sd, "Target (%s) and configured (%s) standard IO in conflict\n",
config_stdio_to_a (CURRENT_STDIO),
config_stdio_to_a (current_stdio));
return SIM_RC_FAIL;
}
/* check the value of MSB */
if (WITH_TARGET_WORD_MSB != 0
&& WITH_TARGET_WORD_MSB != (WITH_TARGET_WORD_BITSIZE - 1))
{
sim_io_eprintf (sd, "Target bitsize (%d) contradicts target most significant bit (%d)\n",
WITH_TARGET_WORD_BITSIZE, WITH_TARGET_WORD_MSB);
return SIM_RC_FAIL;
}
/* set the environment */
#if (WITH_TREE_PROPERTIES)
if (STATE_ENVIRONMENT (sd) == ALL_ENVIRONMENT)
{
const char *env =
tree_find_string_property (root, "/openprom/options/env");
STATE_ENVIRONMENT (sd) = ((strcmp (env, "user") == 0
|| strcmp (env, "uea") == 0)
? USER_ENVIRONMENT
: (strcmp (env, "virtual") == 0
|| strcmp (env, "vea") == 0)
? VIRTUAL_ENVIRONMENT
: (strcmp (env, "operating") == 0
|| strcmp (env, "oea") == 0)
? OPERATING_ENVIRONMENT
: ALL_ENVIRONMENT);
}
#endif
if (STATE_ENVIRONMENT (sd) == ALL_ENVIRONMENT)
STATE_ENVIRONMENT (sd) = (WITH_ENVIRONMENT != ALL_ENVIRONMENT ?
WITH_ENVIRONMENT : USER_ENVIRONMENT);
/* set the alignment */
#if (WITH_TREE_PROPERTIES)
if (current_alignment == 0)
current_alignment =
(tree_find_boolean_property (root, "/openprom/options/strict-alignment?")
? STRICT_ALIGNMENT
: NONSTRICT_ALIGNMENT);
#endif
if (current_alignment == 0)
current_alignment = WITH_ALIGNMENT;
if (current_alignment == 0)
current_alignment = WITH_DEFAULT_ALIGNMENT;
/* verify the alignment */
if (CURRENT_ALIGNMENT == 0)
{
sim_io_eprintf (sd, "Target alignment unspecified\n");
return SIM_RC_FAIL;
}
if (CURRENT_ALIGNMENT != current_alignment)
{
sim_io_eprintf (sd, "Target (%s) and configured (%s) alignment in conflict\n",
config_alignment_to_a (CURRENT_ALIGNMENT),
config_alignment_to_a (current_alignment));
return SIM_RC_FAIL;
}
#if defined (WITH_FLOATING_POINT)
/* set the floating point */
if (current_floating_point == 0)
current_floating_point = WITH_FLOATING_POINT;
/* verify the floating point */
if (CURRENT_FLOATING_POINT == 0)
{
sim_io_eprintf (sd, "Target floating-point unspecified\n");
return SIM_RC_FAIL;
}
if (CURRENT_FLOATING_POINT != current_floating_point)
{
sim_io_eprintf (sd, "Target (%s) and configured (%s) floating-point in conflict\n",
config_alignment_to_a (CURRENT_FLOATING_POINT),
config_alignment_to_a (current_floating_point));
return SIM_RC_FAIL;
}
#endif
return SIM_RC_OK;
}
