static void __stm_hwevt_mode(struct stm_drvdata *drvdata)
{
STM_UNLOCK(drvdata);
txa_writel(drvdata, ((drvdata->hwevt_mode)>>31)&0x1, STM_TXOR_INT_SEL);
txa_writel(drvdata, drvdata->hwevt_mode, STM_TXOR_TRACE_INT);
STM_LOCK(drvdata);
}
static void __stm_port_disable(struct stm_drvdata *drvdata)
{
STM_UNLOCK(drvdata);
stm_writel(drvdata, 0x0, STMSPER);
stm_writel(drvdata, 0x0, STMSPTRIGCSR);
STM_LOCK(drvdata);
}
static void __stm_hwevent_disable(struct stm_drvdata *drvdata)
{
STM_UNLOCK(drvdata);
stm_writel(drvdata, 0x0, STMHEMCR);
stm_writel(drvdata, 0x0, STMHEER);
stm_writel(drvdata, 0x0, STMHETER);
STM_LOCK(drvdata);
}
static void __stm_disable(struct stm_drvdata *drvdata)
{
STM_UNLOCK(drvdata);
stm_writel(drvdata, 0x100000, STMTCSR);
STM_LOCK(drvdata);
__stm_hwevent_disable(drvdata);
__stm_port_disable(drvdata);
}
static void __stm_enable(struct stm_drvdata *drvdata)
{
__stm_hwevent_enable(drvdata);
__stm_port_enable(drvdata);
STM_UNLOCK(drvdata);
stm_writel(drvdata, 0xFFF, STMSYNCR);
/* */
stm_writel(drvdata, 0x100003, STMTCSR);
STM_LOCK(drvdata);
}
static void __stm_hwevent_enable(struct stm_drvdata *drvdata)
{
STM_UNLOCK(drvdata);
/*
*/
stm_writel(drvdata, 0xFFFFFFFF, STMHETER);
stm_writel(drvdata, 0xFFFFFFFF, STMHEER);
stm_writel(drvdata, 0x5, STMHEMCR);
STM_LOCK(drvdata);
}
static void __stm_enable(struct stm_drvdata *drvdata)
{
__stm_port_enable(drvdata);
STM_UNLOCK(drvdata);
stm_writel(drvdata, 0xFFF, STMSYNCR);
/* SYNCEN is read-only and HWTEN is not implemented */
stm_writel(drvdata, 0x100003, STMTCSR);
__stm_hwevent_enable(drvdata);
STM_LOCK(drvdata);
}
static int stm_port_isenable(struct stm_drvdata *drvdata)
{
int ret = 0;
spin_lock(&drvdata->spinlock);
STM_UNLOCK(drvdata);
if (drvdata->enable)
ret = stm_readl(drvdata, STMSPER) == 0 ? 0 : 1;
STM_LOCK(drvdata);
spin_unlock(&drvdata->spinlock);
return ret;
}
static void __stm_hwevent_enable(struct stm_drvdata *drvdata)
{
STM_UNLOCK(drvdata);
/* Program STMHETER to ensure TRIGOUTHETE (fed to CTI) is asserted
for HW events.
*/
stm_writel(drvdata, 0xFFFFFFFF, STMHETER);
stm_writel(drvdata, 0xFFFFFFFF, STMHEER);
stm_writel(drvdata, 0x5, STMHEMCR);
STM_LOCK(drvdata);
}
static void __stm_hwevent_enable(struct stm_drvdata *drvdata)
{
STM_UNLOCK(drvdata);
/* Transactor enable */
txa_writel(drvdata, drvdata->hwevt_stm_port, STM_TXOR_TARGET_BADDR);
/* intial value: interupt group 0, all event mode */
txa_writel(drvdata, 0x0, STM_TXOR_INT_SEL);
txa_writel(drvdata, 10, STM_TXOR_TRACE_INT);
txa_writel(drvdata, 0x1, STM_TXOR_CNTRL);
STM_LOCK(drvdata);
}
static unsigned long stm_hwevt_mode_read(struct stm_drvdata *drvdata)
{
int ret = 0;
spin_lock(&drvdata->spinlock);
STM_UNLOCK(drvdata);
if (drvdata->enable) {
ret = txa_readl(drvdata, STM_TXOR_INT_SEL) << 31;
ret |= txa_readl(drvdata, STM_TXOR_TRACE_INT);
}
STM_LOCK(drvdata);
spin_unlock(&drvdata->spinlock);
return ret;
}
static void __stm_enable(struct stm_drvdata *drvdata)
{
__stm_hwevent_enable(drvdata);
__stm_port_enable(drvdata);
STM_UNLOCK(drvdata);
stm_writel(drvdata, 0xFFF, STMSYNCR);
/* SYNCEN is read-only and HWTEN is not implemented */
stm_writel(drvdata, 0x100003,STMTCSR);
#ifdef STM_DEBUG
dev_dbg("STMSYNCR = 0x%02x\n", stm_readl(drvdata, STMSYNCR));
dev_dbg("STMTCSR = 0x%02x\n", stm_readl(drvdata, STMTCSR));
#endif
STM_LOCK(drvdata);
}
static void __stm_port_enable(struct stm_drvdata *drvdata)
{
STM_UNLOCK(drvdata);
stm_writel(drvdata, 0x10, STMSPTRIGCSR);
stm_writel(drvdata, 0xFFFFFFFF, STMSPER);
stm_writel(drvdata,0x0FFF8000,STMSPSCR);
stm_writel(drvdata,0xFFFFC000,STMSPMSCR);
#ifdef STM_DEBUG
dev_dbg("STMSPTRIGCSR = 0x%02x\n", stm_readl(drvdata, STMSPTRIGCSR));
dev_dbg("STMSPER = 0x%02x\n", stm_readl(drvdata, STMSPER));
dev_dbg("STMSPSCR = 0x%02x\n", stm_readl(drvdata, STMSPSCR));
dev_dbg("STMSPMSCR = 0x%02x\n", stm_readl(drvdata, STMSPMSCR));
#endif
STM_LOCK(drvdata);
}
static void __stm_hwevent_enable(struct stm_drvdata *drvdata)
{
STM_UNLOCK(drvdata);
/* Program STMHETER to ensure TRIGOUTHETE (fed to CTI) is asserted
for HW events.
*/
stm_writel(drvdata, 0xFFFFFFFF, STMHETER);
stm_writel(drvdata, 0xFFFFFFFF, STMHEER);
stm_writel(drvdata, 0x5, STMHEMCR);
#ifdef STM_DEBUG
dev_dbg("STMHETER = 0x%02x\n", stm_readl(drvdata, STMHETER));
dev_dbg("STMHEER = 0x%02x\n", stm_readl(drvdata, STMHEER));
dev_dbg("STMHEMCR = 0x%02x\n", stm_readl(drvdata, STMHEMCR));
#endif
STM_LOCK(drvdata);
}