.ctrlbit	= (1 << 12),
 }, {
     .name		= "i2c",
     .devname	= "s3c2440-i2c.7",
     .parent		= &exynos4_clk_aclk_100.clk,
     .enable		= exynos4_clk_ip_peril_ctrl,
     .ctrlbit	= (1 << 13),
 }, {
     .name		= "i2c",
     .devname	= "s3c2440-hdmiphy-i2c",
     .parent		= &exynos4_clk_aclk_100.clk,
     .enable		= exynos4_clk_ip_peril_ctrl,
     .ctrlbit	= (1 << 14),
 }, {
     .name		= SYSMMU_CLOCK_NAME,
     .devname	= SYSMMU_CLOCK_DEVNAME(mfc_l, 0),
     .enable		= exynos4_clk_ip_mfc_ctrl,
     .ctrlbit	= (1 << 1),
 }, {
     .name		= SYSMMU_CLOCK_NAME,
     .devname	= SYSMMU_CLOCK_DEVNAME(mfc_r, 1),
     .enable		= exynos4_clk_ip_mfc_ctrl,
     .ctrlbit	= (1 << 2),
 }, {
     .name		= SYSMMU_CLOCK_NAME,
     .devname	= SYSMMU_CLOCK_DEVNAME(tv, 2),
     .enable		= exynos4_clk_ip_tv_ctrl,
     .ctrlbit	= (1 << 4),
 }, {
     .name		= SYSMMU_CLOCK_NAME,
     .devname	= SYSMMU_CLOCK_DEVNAME(jpeg, 3),
Beispiel #2
0
		.devname	= "exynos-gsc.1",
		.enable		= exynos5_clk_ip_gscl_ctrl,
		.ctrlbit	= (1 << 1),
	}, {
		.name		= "gscl",
		.devname	= "exynos-gsc.2",
		.enable		= exynos5_clk_ip_gscl_ctrl,
		.ctrlbit	= (1 << 2),
	}, {
		.name		= "gscl",
		.devname	= "exynos-gsc.3",
		.enable		= exynos5_clk_ip_gscl_ctrl,
		.ctrlbit	= (1 << 3),
	}, {
		.name		= SYSMMU_CLOCK_NAME,
		.devname	= SYSMMU_CLOCK_DEVNAME(mfc_l, 0),
		.enable		= &exynos5_clk_ip_mfc_ctrl,
		.ctrlbit	= (1 << 1),
	}, {
		.name		= SYSMMU_CLOCK_NAME,
		.devname	= SYSMMU_CLOCK_DEVNAME(mfc_r, 1),
		.enable		= &exynos5_clk_ip_mfc_ctrl,
		.ctrlbit	= (1 << 2),
	}, {
		.name		= SYSMMU_CLOCK_NAME,
		.devname	= SYSMMU_CLOCK_DEVNAME(tv, 2),
		.enable		= &exynos5_clk_ip_disp1_ctrl,
		.ctrlbit	= (1 << 9)
	}, {
		.name		= SYSMMU_CLOCK_NAME,
		.devname	= SYSMMU_CLOCK_DEVNAME(jpeg, 3),