Beispiel #1
0
void InitializeLEDs()
{
	EnableAHB1PeripheralClock(RCC_AHB1ENR_GPIODEN);

	SetGPIOOutputMode(GPIOD,(1<<12)|(1<<13)|(1<<14)|(1<<15));
	SetGPIOPushPullOutput(GPIOD,(1<<12)|(1<<13)|(1<<14)|(1<<15));
	SetGPIOSpeed50MHz(GPIOD,(1<<12)|(1<<13)|(1<<14)|(1<<15));
	SetGPIOPullUpResistor(GPIOD,(1<<12)|(1<<13)|(1<<14)|(1<<15));
}
Beispiel #2
0
void InitializeVGAPort()
{
	// Turn on peripherals.
	EnableAHB1PeripheralClock(RCC_AHB1ENR_GPIOBEN|RCC_AHB1ENR_GPIOEEN|RCC_AHB1ENR_DMA2EN);
	EnableAPB2PeripheralClock(RCC_APB2ENR_TIM8EN|RCC_APB2ENR_TIM9EN|RCC_APB2ENR_SYSCFGEN);

	// Configure DAC pins, and set to black.
	SetGPIOOutputMode(GPIOE,0xff00);
	SetGPIOPushPullOutput(GPIOE,0xff00);
	SetGPIOSpeed50MHz(GPIOE,0xff00);
	SetGPIOPullUpResistor(GPIOE,0xff00);
	GPIOE->BSRRH=0xff00;

	// Configure sync pins and drive them high.
	SetGPIOOutputMode(GPIOB,(1<<11)|(1<<12));
	SetGPIOPushPullOutput(GPIOB,(1<<11)|(1<<12));
	SetGPIOSpeed50MHz(GPIOB,(1<<11)|(1<<12));
	SetGPIOPullUpResistor(GPIOB,(1<<11)|(1<<12));
	GPIOB->BSRRL=(1<<11)|(1<<12);
}
Beispiel #3
0
void InitializeVGA()
{
    VGALine=-1;
    VGAFrame=0;

    HBlankInterruptHandler=NULL;

    // Turn on peripherals.
    EnableAHB1PeripheralClock(RCC_AHB1ENR_GPIOBEN|RCC_AHB1ENR_GPIOEEN|RCC_AHB1ENR_DMA2EN);
    EnableAPB2PeripheralClock(RCC_APB2ENR_TIM8EN|RCC_APB2ENR_SYSCFGEN);
    EnableAPB1PeripheralClock(RCC_APB1ENR_TIM2EN);

    // Configure DAC pins, and set to black.
    SetGPIOOutputMode(GPIOE,0xff00);
    SetGPIOPushPullOutput(GPIOE,0xff00);
    SetGPIOSpeed50MHz(GPIOE,0xff00);
    SetGPIOPullUpResistor(GPIOE,0xff00);
    GPIOE->BSRRH=0xff00;

    // Configure sync pins and drive them high.
    // Also link HSync-pin (PB11) to TIM2 CC-channel 4.
    SetGPIOAlternateFunctionMode(GPIOB,1<<11);
    SelectAlternateFunctionForGPIOPin(GPIOB,11,1); // TIM2_CH4
    SetGPIOOutputMode(GPIOB,1<<12);
    SetGPIOPushPullOutput(GPIOB,(1<<11)|(1<<12));
    SetGPIOSpeed50MHz(GPIOB,(1<<11)|(1<<12));
    SetGPIOPullUpResistor(GPIOB,(1<<11)|(1<<12));
    GPIOB->BSRRL=(1<<11)|(1<<12);


    // Configure timer 2 as the HSync timer. Timer 2 runs at half frequency, thus 84 MHz.
    // CC4 is used to generate the HSync pulse, using PWM mode and driving the pin directly.
    // CC3 is used to generate a trigger signal for TIM8, which drives the pixel DMA.
    TIM2->CR1=TIM_CR1_ARPE;
    TIM2->CR2=(6*TIM_CR2_MMS_0); // Trigger-out on CCR3.
    TIM2->DIER=TIM_DIER_UIE; // Enable update interrupt.
    TIM2->CCER=0; // Disable CC, so we can program it.
    TIM2->CCMR1=0;
    // PWM-mode: Channel 4 set to active level on reload, passive level after CC4-match.
    // Channel 3 set to passive level on reload, active level after CC3-match.
    TIM2->CCMR2=(6*TIM_CCMR2_OC4M_0)|(7*TIM_CCMR2_OC3M_0);
    TIM2->CCER=TIM_CCER_CC4E|TIM_CCER_CC4P; // Channel 4 enabled, reversed polarity (active low).
    TIM2->PSC=0; // Prescaler = 1

#ifdef EnableOverclocking
    TIM2->ARR=2796-1; // 88 MHz / 31.46875 kHz = 2796.42502483
    // On CNT==0: sync pulse start
    TIM2->CCR4=336; // 88 MHz * 3.813 microseconds = 335.544 - sync pulse end
    TIM2->CCR3=503-14; // 88 MHz * (3.813 + 1.907) microseconds = 503.36 - back porch end, start pixel clock
    // -14 is a kludge to account for slow start of timer.
    TIM2->CCR2=503; // 88 MHz * (3.813 + 1.907) microseconds = 503.36 - back porch end, start pixel clock
#else
    TIM2->ARR=2669-1; // 84 MHz / 31.46875 kHz = 2669.31479643
    // On CNT==0: sync pulse start
    TIM2->CCR4=320; // 84 MHz * 3.813 microseconds = 320.292 - sync pulse end
    TIM2->CCR3=480; // 84 MHz * (3.813 + 1.907) microseconds = 480.48 - back porch end, start pixel clock
    TIM2->CCR2=480; // 84 MHz * (3.813 + 1.907) microseconds = 480.48 - back porch end, start pixel clock
#endif

    // Enable HSync timer.
    TIM2->CNT=-10; // Make sure it hits ARR.
    TIM2->CR1|=TIM_CR1_CEN;
}
Beispiel #4
0
void InitializeAudio(int plln,int pllr,int i2sdiv,int i2sodd)
{
	// Intitialize state.
	CallbackFunction=NULL;
	CallbackContext=NULL;
	NextBufferSamples=NULL;
	NextBufferLength=0;
	BufferNumber=0;
	DMARunning=false;

	// Turn on peripherals.
	EnableAHB1PeripheralClock(RCC_AHB1ENR_GPIOAEN|RCC_AHB1ENR_GPIOBEN|RCC_AHB1ENR_GPIOCEN|RCC_AHB1ENR_GPIODEN|RCC_AHB1ENR_DMA1EN);
	EnableAPB1PeripheralClock(RCC_APB1ENR_I2C1EN|RCC_APB1ENR_SPI3EN);

	// Configure reset pin.
	SetGPIOOutputMode(GPIOD,1<<4);
	SetGPIOPushPullOutput(GPIOD,1<<4);
	SetGPIOSpeed50MHz(GPIOD,1<<4);
	SetGPIONoPullResistor(GPIOD,1<<4);

	// Configure I2C SCL and SDA pins.
	SetGPIOAlternateFunctionMode(GPIOB,(1<<6)|(1<<9));
	SetGPIOOpenDrainOutput(GPIOB,(1<<6)|(1<<9));
	SetGPIOSpeed50MHz(GPIOB,(1<<6)|(1<<9));
	SetGPIONoPullResistor(GPIOB,(1<<6)|(1<<9));
	SelectAlternateFunctionForGPIOPin(GPIOB,6,4);
	SelectAlternateFunctionForGPIOPin(GPIOB,9,4);

	// Configure I2S MCK, SCK, SD pins.
	SetGPIOAlternateFunctionMode(GPIOC,(1<<7)|(1<<10)|(1<<12));
	SetGPIOPushPullOutput(GPIOC,(1<<7)|(1<<10)|(1<<12));
	SetGPIOSpeed50MHz(GPIOC,(1<<7)|(1<<10)|(1<<12));
	SetGPIONoPullResistor(GPIOC,(1<<7)|(1<<10)|(1<<12));
	SelectAlternateFunctionForGPIOPin(GPIOC,7,6);
	SelectAlternateFunctionForGPIOPin(GPIOC,10,6);
	SelectAlternateFunctionForGPIOPin(GPIOC,12,6);

	// Configure I2S WS pin.
	SetGPIOAlternateFunctionMode(GPIOA,1<<4);
	SetGPIOPushPullOutput(GPIOA,1<<4);
	SetGPIOSpeed50MHz(GPIOA,1<<4);
	SetGPIONoPullResistor(GPIOA,1<<4);
	SelectAlternateFunctionForGPIOPin(GPIOA,4,6);

	// Reset the codec.
	GPIOD->BSRRH=1<<4;
	//Delay(0x4FFF); 
	for(volatile int i=0;i<0x4fff;i++) __asm__ volatile("nop");
	GPIOD->BSRRL=1<<4;

	// Reset I2C.
	SetAPB1PeripheralReset(RCC_APB1RSTR_I2C1RST);
	ClearAPB1PeripheralReset(RCC_APB1RSTR_I2C1RST);

	// Configure I2C.
	uint32_t pclk1=PCLK1Frequency();

	I2C1->CR2=pclk1/1000000; // Configure frequency and disable interrupts and DMA.
	I2C1->OAR1=I2C_OAR1_ADDMODE|0x33;

	// Configure I2C speed in standard mode.
	const uint32_t i2c_speed=100000;
	int ccrspeed=pclk1/(i2c_speed*2);
	if(ccrspeed<4) ccrspeed=4;
	I2C1->CCR=ccrspeed;
	I2C1->TRISE=pclk1/1000000+1;

	I2C1->CR1=I2C_CR1_ACK|I2C_CR1_PE; // Enable and configure the I2C peripheral.

	// Configure codec.
	WriteRegister(0x02,0x01); // Keep codec powered off.
	WriteRegister(0x04,0xaf); // SPK always off and HP always on.

	WriteRegister(0x05,0x81); // Clock configuration: Auto detection.
	WriteRegister(0x06,0x04); // Set slave mode and Philips audio standard.

	SetAudioVolume(0xff);

	// Power on the codec.
	WriteRegister(0x02,0x9e);

	// Configure codec for fast shutdown.
	WriteRegister(0x0a,0x00); // Disable the analog soft ramp.
	WriteRegister(0x0e,0x04); // Disable the digital soft ramp.

	WriteRegister(0x27,0x00); // Disable the limiter attack level.
	WriteRegister(0x1f,0x0f); // Adjust bass and treble levels.

	WriteRegister(0x1a,0x0a); // Adjust PCM volume level.
	WriteRegister(0x1b,0x0a);

	// Disable I2S.
 	SPI3->I2SCFGR=0;

	// I2S clock configuration
	RCC->CFGR&=~RCC_CFGR_I2SSRC; // PLLI2S clock used as I2S clock source.
	RCC->PLLI2SCFGR=(pllr<<28)|(plln<<6);

	// Enable PLLI2S and wait until it is ready.
 	RCC->CR|=RCC_CR_PLLI2SON;
	while(!(RCC->CR&RCC_CR_PLLI2SRDY));

	// Configure I2S.
	SPI3->I2SPR=i2sdiv|(i2sodd<<8)|SPI_I2SPR_MCKOE;
 	SPI3->I2SCFGR=SPI_I2SCFGR_I2SMOD|SPI_I2SCFGR_I2SCFG_1|SPI_I2SCFGR_I2SE; // Master transmitter, Phillips mode, 16 bit values, clock polarity low, enable.

}