void asm_S9xOpcode_IRQ(void)
{
#ifdef __debug_c_irq__
printf("irq\n");
#endif
// S9xUnpackStatus(); // not needed
if (!CheckEmulation())
{
PushB (Registers.PB);
PushW (CPU.PC - CPU.PCBase);
// S9xPackStatus (); // not needed
PushB (Registers.PL);
ClearDecimal ();
SetIRQ ();
Registers.PB = 0;
// ICPU.ShiftedPB = 0; // unused
#ifdef USE_SA1
if (Settings.SA1 && (Memory.FillRAM [0x2209] & 0x40))
S9xSetPCBase (Memory.FillRAM [0x220e] |
(Memory.FillRAM [0x220f] << 8));
else
#endif
S9xSetPCBase (S9xGetWord (0xFFEE));
#ifdef VAR_CYCLES
CPU.Cycles += TWO_CYCLES;
#else
CPU.Cycles += 8;
#endif
}
else
{
PushW (CPU.PC - CPU.PCBase);
// S9xPackStatus (); // not needed
PushB (Registers.PL);
ClearDecimal ();
SetIRQ ();
Registers.PB = 0;
// ICPU.ShiftedPB = 0; // unused
#ifdef USE_SA1
if (Settings.SA1 && (Memory.FillRAM [0x2209] & 0x40))
S9xSetPCBase (Memory.FillRAM [0x220e] |
(Memory.FillRAM [0x220f] << 8));
else
#endif
S9xSetPCBase (S9xGetWord (0xFFFE));
#ifdef VAR_CYCLES
CPU.Cycles += ONE_CYCLE;
#else
CPU.Cycles += 6;
#endif
}
// S9xPackStatus(); // not needed
}
/*======================================================================*
kernel_main
*======================================================================*/
PUBLIC int kernel_main()
{
Init8259A();
Init8253();
SetIRQ();
k_reenter = -1;
ticks = 0;
get_boot_params(&BootParam);
GetCurrentTime(&systime); //?áè?RTCê±??
int i, j, eflags, prio;
u8 rpl;
u8 priv;
TASK * t;
PROCESS * p = proc_table;
char * stk = task_stack + STACK_SIZE_TOTAL + 0x4000;
for (i = 0; i < NR_TASKS + NR_PROCS; i++,p++,t++) {
if (i >= NR_TASKS + NR_NATIVE_PROCS)
{
p->p_flags = FREE_SLOT;
p->ldt_sel = SELECTOR_LDT_FIRST + (i << 3); //空槽也要给LDT赋值否则调度任务会#GP异常
continue;
}
if (i < NR_TASKS) {
t = task_table + i;
priv = PRIVILEGE_TASK;
rpl = RPL_TASK;
eflags = 0x1202;
prio = 1;
}
else {
t = user_proc_table + (i - NR_TASKS);
priv = PRIVILEGE_USER;
rpl = RPL_USER;
eflags = 0x202;
prio = 1;
}
strcpy(p->name, t->name);
p->p_parent = NO_TASK;
if (strcmp(t->name, "INIT") != 0) {
p->ldts[INDEX_LDT_C] = gdt[SELECTOR_KERNEL_CS >> 3];
p->ldts[INDEX_LDT_RW] = gdt[SELECTOR_KERNEL_DS >> 3];
p->ldts[INDEX_LDT_C].attr1 = DA_C | priv << 5;
p->ldts[INDEX_LDT_RW].attr1 = DA_DRW | priv << 5;
}
else {
CRF::CRF(CSPI &spi,
__IO uint32_t *NSS_BB,
__IO uint32_t *CE_BB,
__IO uint32_t *IRQ_BB )
: CUsingSPI(spi, NSS_BB), m_CE_BB(CE_BB), m_IRQ_BB(IRQ_BB)
{
// CE Pin ------------------------------
if (m_CE_BB == NULL)
{
m_CE = 0;
m_CE_GPIO = 0;
}
else
{
m_CE = GPIO_Pin_0 << GPIO_PIN_NUM_FROM_BB(m_CE_BB);
m_CE_GPIO = GPIO_PORT_FROM_BB_GPIO_OUT(m_CE_BB);
GPIO_InitTypeDef GPIO_InitStructure;
RCC_APB2PeriphClockCmd( RCC_GPIO(m_CE_GPIO), ENABLE );
GPIO_InitStructure.GPIO_Pin = m_CE;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
GPIO_Init(m_CE_GPIO, &GPIO_InitStructure);
GPIO_ResetBits(m_CE_GPIO, m_CE);
}
// IRQ Pin ------------------------------
if (m_IRQ_BB == NULL)
{
m_IRQ = 0;
m_IRQ_GPIO = 0;
}
else
{
m_IRQ = GPIO_Pin_0 << GPIO_PIN_NUM_FROM_BB(m_IRQ_BB);
m_IRQ_GPIO = GPIO_PORT_FROM_BB_GPIO_IN(m_IRQ_BB);
GPIO_InitTypeDef GPIO_InitStructure;
RCC_APB2PeriphClockCmd( RCC_GPIO(m_IRQ_GPIO), ENABLE );
GPIO_InitStructure.GPIO_Pin = m_IRQ;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
GPIO_Init(m_IRQ_GPIO, &GPIO_InitStructure);
switch (m_IRQ)
{
case GPIO_Pin_0: m_IRQn = EXTI0_IRQn; break;
case GPIO_Pin_1: m_IRQn = EXTI1_IRQn; break;
case GPIO_Pin_2: m_IRQn = EXTI2_IRQn; break;
case GPIO_Pin_3: m_IRQn = EXTI3_IRQn; break;
case GPIO_Pin_4: m_IRQn = EXTI4_IRQn; break;
case GPIO_Pin_5:
case GPIO_Pin_6:
case GPIO_Pin_7:
case GPIO_Pin_8:
case GPIO_Pin_9: m_IRQn = EXTI9_5_IRQn; break;
case GPIO_Pin_10:
case GPIO_Pin_11:
case GPIO_Pin_12:
case GPIO_Pin_13:
case GPIO_Pin_14:
case GPIO_Pin_15: m_IRQn = EXTI15_10_IRQn; break;
default: break;
}
}
SetIRQ(DISABLE);
Reset_RxBufStatus();
SetIRQ(ENABLE);
}
