Beispiel #1
0
//Use this assume it passes !spiBufFull condition. so there is at least 1 space in the buf.
BOOL _spiBufAdd(uint32 slaveId, uint32 outData, uint32 *indata) 
{
	uint32 i;

	//this area need to be protected if it is a pre-emptyive OS, 
	//or if we allow ISR/DSR to call. We will protect with disabling
	//interrupts.
	
#ifdef _SPI_INTERRUPT_SAFE
	TCInterruptGlobalDisable();
#endif
	if(spiBufFull()) 
	{	
#ifdef _SPI_INTERRUPT_SAFE
		TCInterruptGlobalRestore();
#endif

		return FALSE;
	}
	i = spiBufTail;
	
	spiBuf[i].ssId = slaveId;
	spiBuf[i].outData = outData;
	spiBuf[i].inData = indata;
	spiBuf[i].bPending = FALSE;
	
	spiBufTail = (spiBufTail+1) % SPI_MAX_BUF_SIZE;

	spiSetInterrupt(SPI_TX_EMPTY | SPI_RX_FULL);
	
#ifdef _SPI_INTERRUPT_SAFE
	TCInterruptGlobalRestore();
#endif

	return TRUE;
}
Beispiel #2
0
void i2cIntDsr(void)
{
	uint32 int_stat = MPTR(IC_INTR_STAT);
	uint32 int_raw_stat = MPTR(IC_RAW_INTR_STAT);
	//disable interrupt
	TCInterruptGlobalDisable();
	//SYS_TRACE3(SYSDEBUG_TRACE_I2C, int_stat, int_raw_stat, tempTran.status);
	if((int_stat & BIT4) && ((int_raw_stat & BIT8) == 0)) { // TX empty and no activity
		switch(tempTran.status) {
			int i;
			case 2:
				//we are guranteed to have enough buf
				for(i = 0; i < tempTran.length; i++) {
					switch (tempTran.type) {
					case 0:
						_i2cIntWriteCmd(0x100);
						break;
					case 1:
						_i2cIntWriteCmd(tempTran.data[tempTran.cur_pos]);
						tempTran.cur_pos++;
						break;
					} 
				}
				tempTran.status++;
				break;
			case 3:
				MPTR(IC_INTR_MASK) &= ~BIT4; //clear TX empty interrupt
				if(tempTran.type == 1) {
					resetTran(&tempTran);
					MPTR(IC_INTR_MASK) = 0;
					//SYS_TRACE0(SYSDEBUG_TRACE_I2C);
					TCSemaphoreSignal(i2cCompleteSemId);
				}
				break;
			default:
				break;
		}
	}
	if(int_stat & BIT2) { // Rx not empty
		//while(MPTR(IC_STATUS) & BIT3) {//rx not 
		while(MPTR(IC_RXFLR) != 0) {//rx not empty
			tempTran.data[tempTran.cur_pos] = MPTR(IC_DATA_CMD);
			tempTran.cur_pos++;
		}
		if(tempTran.cur_pos >= tempTran.length) {
				resetTran(&tempTran);
				MPTR(IC_INTR_MASK) = 0;
				//SYS_TRACE1(SYSDEBUG_TRACE_I2C, tempTran.cur_pos);
				TCSemaphoreSignal(i2cCompleteSemId);
		}
	}
	
	if(int_stat & BIT6) { //Tx Error
		i2c_tx_err_counter++;
		i2c_last_tx_error = MPTR(IC_TX_ABRT_SOURCE);

		resetTran(&tempTran);
		MPTR(IC_INTR_MASK) = 0;
		//SYS_TRACE2(SYSDEBUG_TRACE_I2C, i2c_last_tx_error, i2c_tx_err_counter);
		TCSemaphoreSignal(i2cCompleteSemId);
	}
	_i2cClearIntr();
	TCInterruptGlobalRestore();
}