/** * @brief Configure TIM1 to generate 6 Steps PWM signal * @param None * @retval None */ static void TIM1_Config(void) { /* TIM1 Peripheral Configuration */ TIM1_DeInit(); /* Time Base configuration */ TIM1_TimeBaseInit(0, TIM1_COUNTERMODE_UP, 4095, 0); /* Channel 1, 2 and 3 Configuration in TIMING mode */ /* TIM1_Pulse = 2047 */ TIM1_OC1Init(TIM1_OCMODE_TIMING, TIM1_OUTPUTSTATE_ENABLE, TIM1_OUTPUTNSTATE_ENABLE, 2047, TIM1_OCPOLARITY_HIGH, TIM1_OCNPOLARITY_HIGH, TIM1_OCIDLESTATE_SET, TIM1_OCNIDLESTATE_SET); /* TIM1_Pulse = 1023 */ TIM1_OC2Init(TIM1_OCMODE_TIMING, TIM1_OUTPUTSTATE_ENABLE, TIM1_OUTPUTNSTATE_ENABLE, 1023, TIM1_OCPOLARITY_HIGH, TIM1_OCNPOLARITY_HIGH, TIM1_OCIDLESTATE_SET, TIM1_OCNIDLESTATE_SET); /* TIM1_Pulse = 511 */ TIM1_OC3Init(TIM1_OCMODE_TIMING, TIM1_OUTPUTSTATE_ENABLE, TIM1_OUTPUTNSTATE_ENABLE, 511, TIM1_OCPOLARITY_HIGH, TIM1_OCNPOLARITY_HIGH, TIM1_OCIDLESTATE_SET, TIM1_OCNIDLESTATE_SET); /* Automatic Output enable, Break, dead time and lock configuration*/ TIM1_BDTRConfig( TIM1_OSSISTATE_ENABLE, TIM1_LOCKLEVEL_OFF, 1, TIM1_BREAK_DISABLE, TIM1_BREAKPOLARITY_LOW, TIM1_AUTOMATICOUTPUT_ENABLE); TIM1_CCPreloadControl(ENABLE); TIM1_ITConfig(TIM1_IT_COM, ENABLE); /* TIM1 counter enable */ TIM1_Cmd(ENABLE); }
/** * @brief Configure TIM1 peripheral * @param None * @retval None */ static void TIM1_Config(void) { /* TIM1 configuration: - TIM1CLK is set to 2 MHz, the TIM2 Prescaler is equal to 0 so the TIM1 counter clock used is 2 MHz / (0+1) = 2 MHz - Channels output frequency = TIM1CLK / (TIM1_PERIOD + 1) * (TIM1_PRESCALER + 1) = 2 000 000 / 65536 * 1 = 30.51 Hz */ /* Time Base configuration */ TIM1_TimeBaseInit(TIM1_PRESCALER, TIM1_CounterMode_Up, TIM1_PERIOD, TIM1_REPTETION_COUNTER); /* Channels 1, 1N, 2, 2N, 3 and 3N Configuration in PWM2 mode */ TIM1_OC1Init(TIM1_OCMode_PWM2, TIM1_OutputState_Enable, TIM1_OutputNState_Enable, CCR1_VAL, TIM1_OCPolarity_Low, TIM1_OCNPolarity_Low, TIM1_OCIdleState_Set, TIM1_OCNIdleState_Set); TIM1_OC2Init(TIM1_OCMode_PWM2, TIM1_OutputState_Enable, TIM1_OutputNState_Enable, CCR2_VAL, TIM1_OCPolarity_Low, TIM1_OCNPolarity_Low, TIM1_OCIdleState_Set, TIM1_OCNIdleState_Set); TIM1_OC3Init(TIM1_OCMode_PWM2, TIM1_OutputState_Enable, TIM1_OutputNState_Enable, CCR3_VAL, TIM1_OCPolarity_Low, TIM1_OCNPolarity_Low, TIM1_OCIdleState_Set, TIM1_OCNIdleState_Set); /* Automatic Output Enable, Break, dead time and lock configuration Enable the break feature with polarity high. Non-inverted Channels and inverted channels rising edge are delayed by 58.5 µs = DEADTIME / TIM1CLK = 117 / 2 MHz As the lock level is level 1, Channels Idle state, break enable and polarity bits can no longer be written. */ TIM1_BDTRConfig(TIM1_OSSIState_Enable, TIM1_LockLevel_1, DEADTIME, TIM1_BreakState_Enable, TIM1_BreakPolarity_High, TIM1_AutomaticOutput_Enable); /* TIM1 Main Output Enable */ TIM1_CtrlPWMOutputs(ENABLE); }
/** * @brief Configure TIM1 to generate 3 complementary signals, to insert a * defined dead time value, to use the break feature and to lock the * desired parameters * @param None * @retval None */ static void TIM1_Config(void) { /* TIM1 Peripheral Configuration */ TIM1_DeInit(); /* Time Base configuration */ /* TIM1_Prescaler = 0 TIM1_CounterMode = TIM1_COUNTERMODE_UP TIM1_Period = 65535 TIM1_RepetitionCounter = 0 */ TIM1_TimeBaseInit(0, TIM1_COUNTERMODE_UP, 65535,0); /* Channel 1, 2 and 3 Configuration in PWM mode */ /* TIM1_OCMode = TIM1_OCMODE_PWM2 TIM1_OutputState = TIM1_OUTPUTSTATE_ENABLE TIM1_OutputNState = TIM1_OUTPUTNSTATE_ENABLE TIM1_Pulse = CCR1_Val TIM1_OCPolarity = TIM1_OCPOLARITY_LOW TIM1_OCNPolarity = TIM1_OCNPOLARITY_LOW TIM1_OCIdleState = TIM1_OCIDLESTATE_SET TIM1_OCNIdleState = TIM1_OCIDLESTATE_RESET */ TIM1_OC1Init(TIM1_OCMODE_PWM2, TIM1_OUTPUTSTATE_ENABLE, TIM1_OUTPUTNSTATE_ENABLE, CCR1_Val, TIM1_OCPOLARITY_LOW, TIM1_OCNPOLARITY_LOW, TIM1_OCIDLESTATE_SET, TIM1_OCNIDLESTATE_RESET); /* TIM1_Pulse = CCR2_Val */ TIM1_OC2Init(TIM1_OCMODE_PWM2, TIM1_OUTPUTSTATE_ENABLE, TIM1_OUTPUTNSTATE_ENABLE, CCR2_Val, TIM1_OCPOLARITY_LOW, TIM1_OCNPOLARITY_LOW, TIM1_OCIDLESTATE_SET, TIM1_OCNIDLESTATE_RESET); /* TIM1_Pulse = CCR3_Val */ TIM1_OC3Init(TIM1_OCMODE_PWM2, TIM1_OUTPUTSTATE_ENABLE, TIM1_OUTPUTNSTATE_ENABLE, CCR3_Val, TIM1_OCPOLARITY_LOW, TIM1_OCNPOLARITY_LOW, TIM1_OCIDLESTATE_SET, TIM1_OCNIDLESTATE_RESET); /* Automatic Output enable, Break, dead time and lock configuration */ /* TIM1_OSSIState = TIM1_OSSISTATE_ENABLE TIM1_LockLevel = TIM1_LOCKLEVEL_1 TIM1_DeadTime = 117 TIM1_Break = TIM1_BREAK_ENABLE TIM1_BreakPolarity = TIM1_BREAKPOLARITY_HIGH TIM1_AutomaticOutput = TIM1_AUTOMATICOUTPUT_ENABLE */ TIM1_BDTRConfig( TIM1_OSSISTATE_ENABLE, TIM1_LOCKLEVEL_1, 117, TIM1_BREAK_ENABLE, TIM1_BREAKPOLARITY_HIGH, TIM1_AUTOMATICOUTPUT_ENABLE); /* TIM1 counter enable */ TIM1_Cmd(ENABLE); /* Main Output Enable */ TIM1_CtrlPWMOutputs(ENABLE); }
/** * @brief Configure TIM1 to generate 7 PWM signals with 4 different duty cycles * @param None * @retval None */ static void TIM1_Config(void) { TIM1_DeInit(); /* Time Base configuration */ /* TIM1_Period = 4095 TIM1_Prescaler = 0 TIM1_CounterMode = TIM1_COUNTERMODE_UP TIM1_RepetitionCounter = 0 */ TIM1_TimeBaseInit(0, TIM1_COUNTERMODE_UP, 4095, 0); /* Channel 1, 2,3 and 4 Configuration in PWM mode */ /* TIM1_OCMode = TIM1_OCMODE_PWM2 TIM1_OutputState = TIM1_OUTPUTSTATE_ENABLE TIM1_OutputNState = TIM1_OUTPUTNSTATE_ENABLE TIM1_Pulse = CCR1_Val TIM1_OCPolarity = TIM1_OCPOLARITY_LOW TIM1_OCNPolarity = TIM1_OCNPOLARITY_HIGH TIM1_OCIdleState = TIM1_OCIDLESTATE_SET TIM1_OCNIdleState = TIM1_OCIDLESTATE_RESET */ TIM1_OC1Init(TIM1_OCMODE_PWM2, TIM1_OUTPUTSTATE_ENABLE, TIM1_OUTPUTNSTATE_ENABLE, CCR1_Val, TIM1_OCPOLARITY_LOW, TIM1_OCNPOLARITY_HIGH, TIM1_OCIDLESTATE_SET, TIM1_OCNIDLESTATE_RESET); /*TIM1_Pulse = CCR2_Val*/ TIM1_OC2Init(TIM1_OCMODE_PWM2, TIM1_OUTPUTSTATE_ENABLE, TIM1_OUTPUTNSTATE_ENABLE, CCR2_Val, TIM1_OCPOLARITY_LOW, TIM1_OCNPOLARITY_HIGH, TIM1_OCIDLESTATE_SET, TIM1_OCNIDLESTATE_RESET); /*TIM1_Pulse = CCR3_Val*/ TIM1_OC3Init(TIM1_OCMODE_PWM2, TIM1_OUTPUTSTATE_ENABLE, TIM1_OUTPUTNSTATE_ENABLE, CCR3_Val, TIM1_OCPOLARITY_LOW, TIM1_OCNPOLARITY_HIGH, TIM1_OCIDLESTATE_SET, TIM1_OCNIDLESTATE_RESET); /*TIM1_Pulse = CCR4_Val*/ TIM1_OC4Init(TIM1_OCMODE_PWM2, TIM1_OUTPUTSTATE_ENABLE, CCR4_Val, TIM1_OCPOLARITY_LOW, TIM1_OCIDLESTATE_SET); /* TIM1 counter enable */ TIM1_Cmd(ENABLE); /* TIM1 Main Output Enable */ TIM1_CtrlPWMOutputs(ENABLE); }