/*
* ======== Core_core1Startup ========
* Core 1's intial thread.
* Executes on stack provided by Core module.
*/
Void Core_core1Startup()
{
Hwi_disable();
/* initialize our NVIC */
Hwi_initNVIC();
/* split thread and handler stacks */
Hwi_initStacks(&Core_module->core1HwiStack[Core_core1HwiStackSize - 1]);
/* set the priority and enable the inter-core interrupt */
Hwi_nvic.IPR[INTER_CORE_INTNUM-16] = 0xff;
Hwi_nvic.ISER[0] = 1 << ((INTER_CORE_INTNUM-16) & 0x1f);
Task_startCore(1);
}
/*
* ======== Core_startup ========
* Other core's intial thread.
* Executes on stack provided by Core module.
*/
Void Core_startup()
{
/* Init Cache and MMU */
Cache_startup();
/* Install vector table */
Hwi_init();
/* Init exception regs */
Exception_initCoreX();
/*
* Initialize GIC CPU Interface and FIQ stack
*
* Note: GIC Distributor will be initialized by core 0
*/
Hwi_initIntControllerCoreX();
/* Initialize this core's Hwi stack to enable stack checking */
if (Core_initStackFlag) {
ti_sysbios_hal_Hwi_initStack();
}
/* Signal to core 0 that this core's startup routine is complete */
Core_module->syncCores[0][Core_getId()] = TRUE;
/* Wait for store to complete */
__asm__ __volatile__ (
"dmb ish"
);
/* Wait for core 0's signal to start running tasks */
while(!Core_module->syncCores[0][0]);
/*
* Enable FIQ interrupts on this core. Task_startCore() will
* enable IRQs.
*/
if (Hwi_enableSecureMode) {
Hwi_enableFIQ();
}
Task_startCore(Core_getId());
}
/*
* ======== Task_startup ========
*/
Void Task_startup()
{
Task_startCore(0);
}
