static void omahauart_console_write(struct console *co, const char *s, u_int count)
{
struct uart_port *port = omaha_ports + co->index;
unsigned int status;
int i;
/*
* First save the CR then disable the interrupts
*/
/*
* Now, do each character
*/
for (i = 0; i < count; i++) {
do {
status = UART_GET_FR(port);
} while ((status & OMAHA_UTX_EMPTY) == 0);
UART_PUT_CHAR(port, s[i]);
if (s[i] == '\n') {
do {
status = UART_GET_FR(port);
} while ((status & OMAHA_UTX_EMPTY) == 0);
UART_PUT_CHAR(port, '\r');
}
}
/*
* Finally, wait for transmitter to become empty
* and restore the TCR
*/
do {
status = UART_GET_FR(port);
} while ((status & OMAHA_UTX_EMPTY) == 0);
}
static void apbuart_tx_chars(struct uart_port *port)
{
struct circ_buf *xmit = &port->state->xmit;
int count;
if (port->x_char) {
UART_PUT_CHAR(port, port->x_char);
port->icount.tx++;
port->x_char = 0;
return;
}
if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
apbuart_stop_tx(port);
return;
}
/* amba: fill FIFO */
count = port->fifosize >> 1;
do {
UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
port->icount.tx++;
if (uart_circ_empty(xmit))
break;
} while (--count > 0);
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
uart_write_wakeup(port);
if (uart_circ_empty(xmit))
apbuart_stop_tx(port);
}
static void sa1100_tx_chars(struct sa1100_port *sport)
{
struct circ_buf *xmit = &sport->port.state->xmit;
if (sport->port.x_char) {
UART_PUT_CHAR(sport, sport->port.x_char);
sport->port.icount.tx++;
sport->port.x_char = 0;
return;
}
sa1100_mctrl_check(sport);
if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
sa1100_stop_tx(&sport->port);
return;
}
while (UART_GET_UTSR1(sport) & UTSR1_TNF) {
UART_PUT_CHAR(sport, xmit->buf[xmit->tail]);
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
sport->port.icount.tx++;
if (uart_circ_empty(xmit))
break;
}
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
uart_write_wakeup(&sport->port);
if (uart_circ_empty(xmit))
sa1100_stop_tx(&sport->port);
}
static void uart00_tx_chars(struct uart_port *port)
{
struct circ_buf *xmit = &port->info->xmit;
int count;
if (port->x_char) {
while ((UART_GET_TSR(port) & UART_TSR_TX_LEVEL_MSK) == 15)
barrier();
UART_PUT_CHAR(port, port->x_char);
port->icount.tx++;
port->x_char = 0;
return;
}
if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
uart00_stop_tx(port, 0);
return;
}
count = port->fifosize >> 1;
do {
while ((UART_GET_TSR(port) & UART_TSR_TX_LEVEL_MSK) == 15)
barrier();
UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
port->icount.tx++;
if (uart_circ_empty(xmit))
break;
} while (--count > 0);
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
uart_write_wakeup(port);
if (uart_circ_empty(xmit))
uart00_stop_tx(port, 0);
}
/*
* Transmit characters (called from interrupt handler)
*/
static void at91_tx_chars(struct uart_port *port)
{
struct circ_buf *xmit = &port->info->xmit;
if (port->x_char) {
UART_PUT_CHAR(port, port->x_char);
port->icount.tx++;
port->x_char = 0;
return;
}
if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
at91_stop_tx(port);
return;
}
while (UART_GET_CSR(port) & AT91_US_TXRDY) {
UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
port->icount.tx++;
if (uart_circ_empty(xmit))
break;
}
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
uart_write_wakeup(port);
if (uart_circ_empty(xmit))
at91_stop_tx(port);
}
static void ambauart_tx_chars(struct uart_info *info)
{
struct uart_port *port = info->port;
int count;
if (port->x_char) {
UART_PUT_CHAR(port, port->x_char);
port->icount.tx++;
port->x_char = 0;
return;
}
if (info->xmit.head == info->xmit.tail
|| info->tty->stopped
|| info->tty->hw_stopped) {
ambauart_stop_tx(port, 0);
return;
}
count = port->fifosize >> 1;
do {
UART_PUT_CHAR(port, info->xmit.buf[info->xmit.tail]);
info->xmit.tail = (info->xmit.tail + 1) & (UART_XMIT_SIZE - 1);
port->icount.tx++;
if (info->xmit.head == info->xmit.tail)
break;
} while (--count > 0);
if (CIRC_CNT(info->xmit.head, info->xmit.tail, UART_XMIT_SIZE) <
WAKEUP_CHARS)
uart_event(info, EVT_WRITE_WAKEUP);
if (info->xmit.head == info->xmit.tail)
ambauart_stop_tx(info->port, 0);
}
static int apbuart_scan_fifo_size(struct uart_port *port, int portnumber)
{
int ctrl;
int status;
int fifosize;
unsigned long flags;
ctrl = UART_GET_CTRL(port);
printk("Testing fifo size for UART port %i: ", portnumber);
/*
* Enable the transceiver and wait for it to be ready to send data.
* Clear interrupts so that this process will not be externally
* interrupted in the middle (which can cause the transceiver to
* drain prematurely).
*/
local_irq_save(flags);
UART_PUT_CTRL(port, ctrl | LEON_REG_UART_CTRL_TE);
while (!UART_TX_READY(UART_GET_STATUS(port)));
/*
* Disable the transceiver so data isn't actually sent during the
* actual test.
*/
UART_PUT_CTRL(port, ctrl & ~(LEON_REG_UART_CTRL_TE));
fifosize = 1;
UART_PUT_CHAR(port, 0);
/*
* So long as transmitting a character increments the tranceivier FIFO
* length the FIFO must be at least that big. These bytes will automatically
* drain off of the FIFO.
*/
status = UART_GET_STATUS(port);
while (((status >> 20) & 0x3F) == fifosize) {
fifosize++;
UART_PUT_CHAR(port, 0);
status = UART_GET_STATUS(port);
}
fifosize--;
UART_PUT_CTRL(port, ctrl);
local_irq_restore(flags);
printk("got %i bytes.\n", fifosize);
if (fifosize == 0) {
fifosize = 1;
}
return fifosize;
}
static void ssauart_tx_chars (struct uart_port *port)
{
struct circ_buf *xmit = &port->info->xmit;
int count;
if (port->x_char)
{
UART_PUT_CHAR(port, port->x_char);
port->x_char = 0;
port->icount.tx++;
return;
}
if (uart_circ_empty (xmit) || uart_tx_stopped (port))
{
ssauart_stop_tx (port, 0);
return;
}
/*
Write upto (port->fifosize) to the UART from the SW Tx buffer.
Stops early if the SW Tx Buffer has no more data.
Warning: Does NOT stop early if there is no space in the UART Tx fifo.
(ie we assume that port->fifosize is correct !!)
*/
count = port->fifosize;
do
{
UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
port->icount.tx++;
if (uart_circ_empty (xmit))
break;
}
while (--count > 0);
/*
If the number of bytes remaining in the SW Tx circular buffer is less
than WAKEUP_CHARS, wake up tasks trying to write to the UART device.
*/
if (uart_circ_chars_pending (xmit) < WAKEUP_CHARS)
{
uart_write_wakeup (port);
/*
If there are no more bytes to transmit, disable Tx interrupts.
(We don't need to refill the UART Tx fifo when it next becomes empty).
*/
if (uart_circ_empty (xmit))
ssauart_stop_tx (port, 0);
}
}
static void bfin_sir_tx_chars(struct net_device *dev)
{
unsigned int chr;
struct bfin_sir_self *self = netdev_priv(dev);
struct bfin_sir_port *port = self->sir_port;
if (self->tx_buff.len != 0) {
chr = *(self->tx_buff.data);
UART_PUT_CHAR(port, chr);
self->tx_buff.data++;
self->tx_buff.len--;
} else {
self->stats.tx_packets++;
self->stats.tx_bytes += self->tx_buff.data - self->tx_buff.head;
if (self->newspeed) {
bfin_sir_set_speed(port, self->newspeed);
self->speed = self->newspeed;
self->newspeed = 0;
}
bfin_sir_stop_tx(port);
bfin_sir_enable_rx(port);
/* I'm hungry! */
netif_wake_queue(dev);
}
}
static void bfin_serial_console_putchar(struct uart_port *port, int ch)
{
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
while (!(UART_GET_LSR(uart) & THRE))
barrier();
UART_PUT_CHAR(uart, ch);
}
static void ks8695_console_putchar(struct uart_port *port, int ch)
{
while (!(UART_GET_LSR(port) & URLS_URTHRE))
barrier();
UART_PUT_CHAR(port, ch);
}
static void send_buf(struct serial_dev *devp)
{
UART_DIB_WIRQ(devp->index);//disable recvive irq
while(devp->send_rd_point != devp->send_wr_point)
{
if(!UART_PUT_RSR(devp->index))
{
UART_PUT_CHAR(devp->index, devp->send_buf[devp->send_rd_point++]);
if(devp->send_rd_point >= MAX_BUF_LEN)
{
devp->send_rd_point = 0;
}
devp->send_full_flag = 0;
}
else
{
break;
}
}
if(devp->send_rd_point == devp->send_wr_point)
{
// UART_DIB_WIRQ(devp->index);
return;
}
UART_ENB_WIRQ(devp->index);
}
static void sa1100_console_putchar(struct uart_port *port, int ch)
{
struct sa1100_port *sport = (struct sa1100_port *)port;
while (!(UART_GET_UTSR1(sport) & UTSR1_TNF))
barrier();
UART_PUT_CHAR(sport, ch);
}
static void apbuart_console_putchar(struct uart_port *port, int ch)
{
unsigned int status;
do {
status = UART_GET_STATUS(port);
} while (!UART_TX_READY(status));
UART_PUT_CHAR(port, ch);
}
static __init void early_serial_putc(struct uart_port *port, int ch)
{
unsigned timeout = 0xffff;
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
cpu_relax();
UART_PUT_CHAR(uart, ch);
}
static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
{
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
while (!(UART_GET_LSR(uart) & THRE))
cpu_relax();
UART_CLEAR_DLAB(uart);
UART_PUT_CHAR(uart, (unsigned char)chr);
}
/* Called with interrupts off only from start_tx() */
static void ssauart_tx_one_char (struct uart_port *port)
{
struct circ_buf *xmit = &port->info->xmit;
/* The Fifo may already contain data in which case, our work is
* done since when it drains it will trigger an interrupt.
*/
if ((UART_GET_LSR(port) & (1 << 6)) == 0)
return;
if (port->x_char)
{
UART_PUT_CHAR(port, port->x_char);
port->x_char = 0;
port->icount.tx++;
return;
}
if (uart_circ_empty (xmit) || uart_tx_stopped (port))
return;
UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
port->icount.tx++;
/*
If the number of bytes remaining in the SW Tx circular buffer is less
than WAKEUP_CHARS, wake up tasks trying to write to the UART device.
*/
if (uart_circ_chars_pending (xmit) < WAKEUP_CHARS)
{
uart_write_wakeup (port);
/*
If there are no more bytes to transmit, disable Tx interrupts.
(We don't need to refill the UART Tx fifo when it next becomes empty).
*/
if (uart_circ_empty (xmit))
ssauart_stop_tx (port, 0);
}
}
static void
leonuart_console_write(struct console *co, const char *s, unsigned int count)
{
struct uart_port *port = &leon_ports[co->index].port;
unsigned int status, old_cr;
int i;
/*
* First save the CR then disable the interrupts
*/
old_cr = UART_GET_CTRL(port);
UART_PUT_CTRL(port,
(old_cr &
~(LEON_REG_UART_CTRL_RI | LEON_REG_UART_CTRL_TI)) |
(LEON_REG_UART_CTRL_RE | LEON_REG_UART_CTRL_TE));
/*
* Now, do each character
*/
for (i = 0; i < count; i++) {
do {
status = UART_GET_STATUS(port);
} while (!UART_TX_READY(status));
UART_PUT_CHAR(port, s[i]);
if (s[i] == '\n') {
do {
status = UART_GET_STATUS(port);
} while (!UART_TX_READY(status));
UART_PUT_CHAR(port, '\r');
}
}
/*
* Finally, wait for transmitter to become empty
* and restore the TCR
*/
do {
status = UART_GET_STATUS(port);
} while (!UART_TX_READY(status));
UART_PUT_CTRL(port, old_cr);
}
static int apbuart_scan_fifo_size(struct uart_port *port, int portnumber)
{
int ctrl, loop = 0;
int status;
int fifosize;
unsigned long flags;
ctrl = UART_GET_CTRL(port);
local_irq_save(flags);
UART_PUT_CTRL(port, ctrl | UART_CTRL_TE);
while (!UART_TX_READY(UART_GET_STATUS(port)))
loop++;
UART_PUT_CTRL(port, ctrl & ~(UART_CTRL_TE));
fifosize = 1;
UART_PUT_CHAR(port, 0);
status = UART_GET_STATUS(port);
while (((status >> 20) & 0x3F) == fifosize) {
fifosize++;
UART_PUT_CHAR(port, 0);
status = UART_GET_STATUS(port);
}
fifosize--;
UART_PUT_CTRL(port, ctrl);
local_irq_restore(flags);
if (fifosize == 0)
fifosize = 1;
return fifosize;
}
static void sa1100_tx_chars(struct sa1100_port *sport)
{
struct circ_buf *xmit = &sport->port.state->xmit;
if (sport->port.x_char) {
UART_PUT_CHAR(sport, sport->port.x_char);
sport->port.icount.tx++;
sport->port.x_char = 0;
return;
}
/*
* Check the modem control lines before
* transmitting anything.
*/
sa1100_mctrl_check(sport);
if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
sa1100_stop_tx(&sport->port);
return;
}
/*
* Tried using FIFO (not checking TNF) for fifo fill:
* still had the '4 bytes repeated' problem.
*/
while (UART_GET_UTSR1(sport) & UTSR1_TNF) {
UART_PUT_CHAR(sport, xmit->buf[xmit->tail]);
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
sport->port.icount.tx++;
if (uart_circ_empty(xmit))
break;
}
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
uart_write_wakeup(&sport->port);
if (uart_circ_empty(xmit))
sa1100_stop_tx(&sport->port);
}
static void uart00_console_write(struct console *co, const char *s, unsigned count)
{
#ifdef CONFIG_ARCH_CAMELOT
struct uart_port *port = &epxa10db_port;
unsigned int status, old_ies;
int i;
/*
* First save the CR then disable the interrupts
*/
old_ies = UART_GET_IES(port);
UART_PUT_IEC(port,0xff);
/*
* Now, do each character
*/
for (i = 0; i < count; i++) {
do {
status = UART_GET_TSR(port);
} while (!UART_TX_READY(status));
UART_PUT_CHAR(port, s[i]);
if (s[i] == '\n') {
do {
status = UART_GET_TSR(port);
} while (!UART_TX_READY(status));
UART_PUT_CHAR(port, '\r');
}
}
/*
* Finally, wait for transmitter to become empty
* and restore the IES
*/
do {
status = UART_GET_TSR(port);
} while (status & UART_TSR_TX_LEVEL_MSK);
UART_PUT_IES(port, old_ies);
#endif
}
/*
* Interrupts are disabled on entering
*/
static void
s3c2440_console_write(struct console *co, const char *s, unsigned int count)
{
struct uart_port *port = &s3c2440_ports[co->index];
unsigned int status, i;
/*
* First, save UTCR3 and then disable interrupts
*/
for (i = 0; i < count; i++) {
do {
status = UART_GET_UTRSTAT(port);
} while (!(status & UTRSTAT_TX_EMP));
UART_PUT_CHAR(port, s[i]);
if (s[i] == '\n') {
do {
status = UART_GET_UTRSTAT(port);
} while (!(status & UTRSTAT_TX_EMP));
UART_PUT_CHAR(port, '\r');
}
}
}
static void s3c2440_tx_int(int irq, void *dev_id, struct pt_regs *regs)
{
struct uart_info *info = (struct uart_info*)dev_id;
struct uart_port *port = info->port;
struct circ_buf *xmit = &info->xmit;
int count;
if (port->x_char) {
UART_PUT_CHAR(port, port->x_char);
port->icount.tx++;
port->x_char = 0;
return;
}
/*
* Check the modem control lines before
* transmitting anything.
*/
if (uart_circ_empty(xmit) || uart_tx_stopped(info)) {
s3c2440_stop_tx(port, 0);
return;
}
count = port->fifosize >> 1;
do {
UART_PUT_CHAR (port, xmit->buf[xmit->tail]);
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
port->icount.tx++;
if (xmit->head == xmit->tail)
break;
} while (--count > 0);
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
tasklet_schedule(&info->tlet);
if (uart_circ_empty(xmit))
s3c2440_stop_tx(port, 0);
}
/*
* Interrupts are disabled on entering
*/
static void
sa1100_console_write(struct console *co, const char *s, unsigned int count)
{
struct sa1100_port *sport = &sa1100_ports[co->index];
unsigned int old_utcr3, status, i;
/*
* First, save UTCR3 and then disable interrupts
*/
old_utcr3 = UART_GET_UTCR3(sport);
UART_PUT_UTCR3(sport, (old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE)) |
UTCR3_TXE);
/*
* Now, do each character
*/
for (i = 0; i < count; i++) {
do {
status = UART_GET_UTSR1(sport);
} while (!(status & UTSR1_TNF));
UART_PUT_CHAR(sport, s[i]);
if (s[i] == '\n') {
do {
status = UART_GET_UTSR1(sport);
} while (!(status & UTSR1_TNF));
UART_PUT_CHAR(sport, '\r');
}
}
/*
* Finally, wait for transmitter to become empty
* and restore UTCR3
*/
do {
status = UART_GET_UTSR1(sport);
} while (status & UTSR1_TBY);
UART_PUT_UTCR3(sport, old_utcr3);
}
static void
pl010_console_write(struct console *co, const char *s, unsigned int count)
{
struct uart_port *port = &amba_ports[co->index].port;
unsigned int status, old_cr;
int i;
/*
* First save the CR then disable the interrupts
*/
old_cr = UART_GET_CR(port);
UART_PUT_CR(port, UART01x_CR_UARTEN);
/*
* Now, do each character
*/
for (i = 0; i < count; i++) {
do {
status = UART_GET_FR(port);
} while (!UART_TX_READY(status));
UART_PUT_CHAR(port, s[i]);
if (s[i] == '\n') {
do {
status = UART_GET_FR(port);
} while (!UART_TX_READY(status));
UART_PUT_CHAR(port, '\r');
}
}
/*
* Finally, wait for transmitter to become empty
* and restore the TCR
*/
do {
status = UART_GET_FR(port);
} while (status & UART01x_FR_BUSY);
UART_PUT_CR(port, old_cr);
}
static void uart00_tx_chars(struct uart_port *port)
{
int count;
struct uart_info *info = port->info;
if (port->x_char) {
while((UART_GET_TSR(port)& UART_TSR_TX_LEVEL_MSK)==15);
UART_PUT_CHAR(port, port->x_char);
port->icount.tx++;
port->x_char = 0;
return;
}
if (info->xmit.head == info->xmit.tail
|| info->tty->stopped
|| info->tty->hw_stopped) {
uart00_stop_tx(port, 0);
return;
}
count = port->fifosize >> 1;
do {
while((UART_GET_TSR(port)& UART_TSR_TX_LEVEL_MSK)==15);
UART_PUT_CHAR(port, info->xmit.buf[info->xmit.tail]);
info->xmit.tail = (info->xmit.tail + 1) & (UART_XMIT_SIZE - 1);
port->icount.tx++;
if (info->xmit.head == info->xmit.tail)
break;
} while (--count > 0);
if (CIRC_CNT(info->xmit.head,
info->xmit.tail,
UART_XMIT_SIZE) < WAKEUP_CHARS)
uart_write_wakeup(port);
if (info->xmit.head == info->xmit.tail)
uart00_stop_tx(port, 0);
}
static void omahauart_tx_chars(struct uart_info *info)
{
struct uart_port *port = info->port;
volatile unsigned int status;
if (port->x_char) {
UART_PUT_CHAR(port, port->x_char);
port->icount.tx++;
port->x_char = 0;
return;
}
if (info->xmit.head == info->xmit.tail
|| info->tty->stopped
|| info->tty->hw_stopped) {
omahauart_stop_tx(port, 0);
return;
}
status = UART_FIFO_STATUS(info->port);
// FIll FIFO as far as possible
while(UART_TX_DATA(UART_FIFO_STATUS(info->port)))
{
UART_PUT_CHAR(port, info->xmit.buf[info->xmit.tail]);
info->xmit.tail = (info->xmit.tail + 1) & (UART_XMIT_SIZE - 1);
port->icount.tx++;
if (info->xmit.head == info->xmit.tail)
break;
}
if (CIRC_CNT(info->xmit.head, info->xmit.tail, UART_XMIT_SIZE) <
WAKEUP_CHARS)
uart_event(info, EVT_WRITE_WAKEUP);
if (info->xmit.head == info->xmit.tail)
omahauart_stop_tx(info->port, 0);
}
/*
* Interrupts are disabled on entering
*/
static void at91_console_write(struct console *co, const char *s, u_int count)
{
struct uart_port *port = at91_ports + co->index;
unsigned int status, i, imr;
/*
* First, save IMR and then disable interrupts
*/
imr = UART_GET_IMR(port); /* get interrupt mask */
UART_PUT_IDR(port, AT91_US_RXRDY | AT91_US_TXRDY);
/*
* Now, do each character
*/
for (i = 0; i < count; i++) {
do {
status = UART_GET_CSR(port);
} while (!(status & AT91_US_TXRDY));
UART_PUT_CHAR(port, s[i]);
if (s[i] == '\n') {
do {
status = UART_GET_CSR(port);
} while (!(status & AT91_US_TXRDY));
UART_PUT_CHAR(port, '\r');
}
}
/*
* Finally, wait for transmitter to become empty
* and restore IMR
*/
do {
status = UART_GET_CSR(port);
} while (!(status & AT91_US_TXRDY));
UART_PUT_IER(port, imr); /* set interrupts back the way they were */
}
static irqreturn_t ks8695uart_tx_chars(int irq, void *dev_id)
{
struct uart_port *port = dev_id;
struct circ_buf *xmit = &port->info->xmit;
unsigned int count;
if (port->x_char) {
KS8695_CLR_TX_INT();
UART_PUT_CHAR(port, port->x_char);
port->icount.tx++;
port->x_char = 0;
return IRQ_HANDLED;
}
if (uart_tx_stopped(port) || uart_circ_empty(xmit)) {
ks8695uart_stop_tx(port);
return IRQ_HANDLED;
}
count = 16; /* fifo size */
while (!uart_circ_empty(xmit) && (count-- > 0)) {
KS8695_CLR_TX_INT();
UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
port->icount.tx++;
}
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
uart_write_wakeup(port);
if (uart_circ_empty(xmit))
ks8695uart_stop_tx(port);
return IRQ_HANDLED;
}
static void sa1100_tx_chars(struct uart_info *info)
{
struct uart_port *port = info->port;
if (port->x_char) {
UART_PUT_CHAR(port, port->x_char);
port->icount.tx++;
port->x_char = 0;
return;
}
if (info->xmit.head == info->xmit.tail
|| info->tty->stopped
|| info->tty->hw_stopped) {
sa1100_stop_tx(info->port, 0);
return;
}
/*
* Tried using FIFO (not checking TNF) for fifo fill:
* still had the '4 bytes repeated' problem.
*/
while (UART_GET_UTSR1(port) & UTSR1_TNF) {
UART_PUT_CHAR(port, info->xmit.buf[info->xmit.tail]);
info->xmit.tail = (info->xmit.tail + 1) & (UART_XMIT_SIZE - 1);
port->icount.tx++;
if (info->xmit.head == info->xmit.tail)
break;
}
if (CIRC_CNT(info->xmit.head, info->xmit.tail, UART_XMIT_SIZE) <
WAKEUP_CHARS)
uart_event(info, EVT_WRITE_WAKEUP);
if (info->xmit.head == info->xmit.tail)
sa1100_stop_tx(info->port, 0);
}
