uint_fast8_t UART_getEnabledInterruptStatus(uint32_t moduleInstance)
{
uint_fast8_t intStatus = UART_getInterruptStatus(moduleInstance,
EUSCI_A_UART_RECEIVE_INTERRUPT_FLAG | EUSCI_A_UART_TRANSMIT_INTERRUPT_FLAG);
uint_fast8_t intEnabled = EUSCI_A_CMSIS(moduleInstance)->IE;
if (!(intEnabled & EUSCI_A_UART_RECEIVE_INTERRUPT))
{
intStatus &= ~EUSCI_A_UART_RECEIVE_INTERRUPT;
}
if (!(intEnabled & EUSCI_A_UART_TRANSMIT_INTERRUPT))
{
intStatus &= ~EUSCI_A_UART_TRANSMIT_INTERRUPT;
}
intEnabled = EUSCI_A_CMSIS(moduleInstance)->CTLW0;
if (!(intEnabled & EUSCI_A_UART_RECEIVE_ERRONEOUSCHAR_INTERRUPT))
{
intStatus &= ~EUSCI_A_UART_RECEIVE_ERRONEOUSCHAR_INTERRUPT;
}
if (!(intEnabled & EUSCI_A_UART_BREAKCHAR_INTERRUPT))
{
intStatus &= ~EUSCI_A_UART_BREAKCHAR_INTERRUPT;
}
return intStatus;
}
//*****************************************************************************
//
//! Transmit break. Transmits a break with the next write to the transmit
//! buffer. In UART mode with automatic baud-rate detection,
//! UART_AUTOMATICBAUDRATE_SYNC(0x55) must be written into UCAxTXBUF to
//! generate the required break/synch fields.
//! Otherwise, DEFAULT_SYNC(0x00) must be written into the transmit buffer.
//! Also ensures module is ready for transmitting the next data
//!
//! \param baseAddress is the base address of the UART module.
//!
//! Modified register is \b UCAxCTL1, \b UCAxTXBUF
//!
//! \return None.
//
//*****************************************************************************
void UART_transmitBreak (unsigned int baseAddress)
{
//Set UCTXADDR bit
HWREGB(baseAddress + OFS_UCAxCTL1) |= UCTXBRK;
//If current mode is automatic baud-rate detection
if (UART_AUTOMATIC_BAUDRATE_DETECTION_MODE ==
(HWREGB(baseAddress + OFS_UCAxCTL0) &
UART_AUTOMATIC_BAUDRATE_DETECTION_MODE)){
HWREGB(baseAddress + OFS_UCAxTXBUF) = UART_AUTOMATICBAUDRATE_SYNC;
} else {
HWREGB(baseAddress + OFS_UCAxTXBUF) = DEFAULT_SYNC;
}
//USCI TX buffer ready?
while (!UART_getInterruptStatus(baseAddress, UCTXIFG)) ;
}
__interrupt void USCI_A0_ISR (void)
{
switch (__even_in_range(UCA0IV,4)){
//Vector 2 - RXIFG
case 2:
//USCI_A0 TX buffer ready?
while (!UART_getInterruptStatus(__MSP430_BASEADDRESS_USCI_A0__,
UART_TRANSMIT_INTERRUPT_FLAG)) ;
//Receive the data
receivedData = UART_receiveData(__MSP430_BASEADDRESS_USCI_A0__);
//Echo received data
UART_transmitData(__MSP430_BASEADDRESS_USCI_A0__,
receivedData);
break;
default: break;
}
}
