void GGLAssembler::extract(integer_t& d, int s, int h, int l, int bits) { const int maskLen = h-l; #ifdef __mips__ assert(maskLen<=11); #else assert(maskLen<=8); #endif assert(h); #if __ARM_ARCH__ >= 7 const int mask = (1<<maskLen)-1; if ((h == bits) && !l && (s != d.reg)) { MOV(AL, 0, d.reg, s); // component = packed; } else if ((h == bits) && l) { MOV(AL, 0, d.reg, reg_imm(s, LSR, l)); // component = packed >> l; } else if (!l && isValidImmediate(mask)) { AND(AL, 0, d.reg, s, imm(mask)); // component = packed & mask; } else if (!l && isValidImmediate(~mask)) { BIC(AL, 0, d.reg, s, imm(~mask)); // component = packed & mask; } else { UBFX(AL, d.reg, s, l, maskLen); // component = (packed & mask) >> l; } #else if (h != bits) { const int mask = ((1<<maskLen)-1) << l; if (isValidImmediate(mask)) { AND(AL, 0, d.reg, s, imm(mask)); // component = packed & mask; } else if (isValidImmediate(~mask)) { BIC(AL, 0, d.reg, s, imm(~mask)); // component = packed & mask; } else { MOV(AL, 0, d.reg, reg_imm(s, LSL, 32-h)); l += 32-h; h = 32; } s = d.reg; } if (l) { MOV(AL, 0, d.reg, reg_imm(s, LSR, l)); // component = packed >> l; s = d.reg; } if (s != d.reg) { MOV(AL, 0, d.reg, s); } #endif d.s = maskLen; }
void JitArm::Helper_UpdateCR1(ARMReg fpscr, ARMReg temp) { UBFX(temp, fpscr, 28, 4); STRB(temp, R9, PPCSTATE_OFF(cr_fast[1])); }