static int cs89x0_send_packet(struct net_device *ndev, struct sock_buff *skb)
{
int i;
__u16 isq_stat;
const __u16 *buff;
__UNUSED__ __u32 psr;
lock_irq_psr(psr);
writew(VA(CS8900_IOBASE + CS_TxCMD), 0x00);
writew(VA(CS8900_IOBASE + CS_TxLen), skb->size);
while (1) {
isq_stat = cs8900_inw(PP_BusST);
if (isq_stat & Rdy4TxNow)
break;
printf("BusST = 0x%04x\n", isq_stat);
}
buff = (const __u16 *)skb->data;
for (i = 0; i < skb->size; i += 2) {
writew(VA(CS8900_IOBASE + CS_DATA0), *buff);
buff++;
}
ndev->stat.tx_packets++;
unlock_irq_psr(psr);
return 0;
}
static int cs89x0_isr(__u32 irq, void *dev)
{
int i;
__u16 isq_stat;
__u16 rx_stat, rx_size;
__u16 *buff;
struct sock_buff *skb;
// struct net_device *ndev = dev;
while ((isq_stat = readw(VA(CS8900_IOBASE + CS_ISQ)))) {
int regn = isq_stat & 0x3F;
if (regn == 4) {
rx_stat = readw(VA(CS8900_IOBASE + 0x00));
rx_size = readw(VA(CS8900_IOBASE + 0x00));
DPRINT("isq_stat = 0x%04x, size = 0x%04x (%d)\n",
rx_stat, rx_size, rx_size);
skb = skb_alloc(0, rx_size);
// if NULL
buff = (__u16 *)skb->data;
for (i = 0; i < rx_size; i += 2) {
*buff = readw(VA(CS8900_IOBASE + 0x00));
buff++;
}
netif_rx(skb);
}
}
return 0;
}
static int omapfb_reset(struct fb_info *fb)
{
#define OMAP_TIMEOUT 0x100
int to;
__u32 val;
struct omapfb_info *omapfb = fb->par;
// enable clock
writel(VA(CM_FCLKEN_DSS), 7);
writel(VA(CM_ICLKEN_DSS), 1);
writel(VA(CM_CLKEN_PLL), 0x7 << 16);
// reset
dss_writel(DISPC_SYSCONFIG, 0x02);
for (to = 0; to < OMAP_TIMEOUT; to++) {
val = dss_readl(DISPC_SYSCONFIG);
if (!(val & 0x2)) // fixme
break;
udelay(0x100);
}
if (OMAP_TIMEOUT == to)
return -ETIMEDOUT;
// configure clock
dss_writel(DSS_CONTROL, 1);
dss_writel(DISPC_SYSCONFIG, 1);
dss_writel(DISPC_CONFIG, 1 << 9 | 1 << 1);
dss_writel(DISPC_GFX_BA0, fb->fix.smem_start);
return 0;
}
static inline void dss_pad_config(void)
{
void *mux_reg;
for (mux_reg = VA(0x480020d4); mux_reg <= VA(0x48002108); mux_reg += 2)
writew(mux_reg, 0x0);
}
static int cs89x0_poll(struct net_device *ndev)
{
int i;
__u16 rx_event;
__u16 rx_stat, rx_size;
__u16 *buff;
struct sock_buff *skb;
rx_event = cs8900_inw(0x0124);
if (!(rx_event & 0x100))
return 0;
// printf("rx event = 0x%04x\n", rx_event);
rx_stat = readw(VA(CS8900_IOBASE + 0x00));
rx_size = readw(VA(CS8900_IOBASE + 0x00));
DPRINT("rx_event = 0x%04x, size = 0x%04x (%d)\n",
rx_stat, rx_size, rx_size);
skb = skb_alloc(0, rx_size);
// if NULL
buff = (__u16 *)skb->data;
for (i = 0; i < rx_size; i += 2) {
*buff = readw(VA(CS8900_IOBASE + 0x00));
buff++;
}
netif_rx(skb);
ndev->stat.rx_packets++;
return 0;
}
void at91_gpio_conf_periB(__u32 nPioIdx, __u32 mask, int isPullUp)
{
writel(VA(PIO_BASE(nPioIdx)) + PIO_PDR, mask);
writel(VA(PIO_BASE(nPioIdx)) + PIO_BSR, mask);
writel(VA(PIO_BASE(nPioIdx)) + PIO_IDR, mask);
writel(VA(PIO_BASE(nPioIdx)) + (isPullUp ? PIO_PUER : PIO_PUDR), mask);
}
void at91_gpio_conf_output(__u32 nPioIdx, __u32 mask, int isPullUp)
{
writel(VA(PIO_BASE(nPioIdx) + PIO_PER), mask);
writel(VA(PIO_BASE(nPioIdx) + PIO_OER), mask);
writel(VA(PIO_BASE(nPioIdx) + PIO_IDR), mask);
writel(VA(PIO_BASE(nPioIdx) + (isPullUp ? PIO_PUER : PIO_PUDR)), mask);
}
static int __INIT__ at91_nand_probe(void)
{
int ret;
struct nand_ctrl *nfc;
nfc = nand_ctrl_new();
if (NULL == nfc)
return -ENOMEM;
nfc->data_reg = VA(AT91SAM926X_PA_NAND);
nfc->cmmd_reg = VA(AT91SAM926X_PA_NAND + NAND_CMMD);
nfc->addr_reg = VA(AT91SAM926X_PA_NAND + NAND_ADDR);
nfc->name = "atmel_nand";
nfc->flash_ready = at91_nand_ready;
nfc->cmd_ctrl = at91_nand_cmd;
at91_nand_init();
ret = nand_ctrl_register(nfc);
if (ret < 0) {
ret = -ENODEV;
goto L1;
}
return 0;
L1:
free(nfc);
return ret;
}
static int at91_nand_ready(struct nand_chip *nand)
{
#if defined(CONFIG_AT91SAM9261)
return readl(VA(AT91SAM926X_PA_PIOC + PIO_PDSR)) & PIO_NAND_RDY;
#elif defined(CONFIG_AT91SAM9263)
return readl(VA(AT91SAM926X_PA_PIOA + PIO_PDSR)) & PIO_NAND_RDY;
#endif
}
__u32 uart_rxbuf_count(void)
{
#ifdef CONFIG_UART_ENABLE_FIFO
return readl(VA(CURR_UART_BASE + UFSTAT)) & RX_COUNT;
#else
return readl(VA(CURR_UART_BASE + UTRSTAT)) & 0x1;
#endif
}
static void s3c6410_reset(void)
{
__u32 val;
val = readl(VA(RST_BASE + RST_STAT));
val |= 0x1;
writel(VA(RST_BASE + RST_STAT), val);
}
void
userinit(void)
{
Proc *p;
Segment *s;
KMap *k;
char **av;
Page *pg;
p = newproc();
p->pgrp = newpgrp();
p->egrp = smalloc(sizeof(Egrp));
p->egrp->ref = 1;
p->fgrp = dupfgrp(nil);
p->rgrp = newrgrp();
p->procmode = 0640;
kstrdup(&eve, "");
kstrdup(&p->text, "*init*");
kstrdup(&p->user, eve);
procsetup(p);
/*
* Kernel Stack
*/
p->sched.pc = (ulong)init0;
p->sched.sp = (ulong)p->kstack+KSTACK-MAXSYSARG*BY2WD;
/*
* User Stack, pass input arguments to boot process
*/
s = newseg(SG_STACK, USTKTOP-USTKSIZE, USTKSIZE/BY2PG);
p->seg[SSEG] = s;
pg = newpage(1, 0, USTKTOP-BY2PG);
segpage(s, pg);
k = kmap(pg);
for(av = (char**)argbuf; *av; av++)
*av += (USTKTOP - sizeof(argbuf)) - (ulong)argbuf;
memmove((uchar*)VA(k) + BY2PG - sizeof(argbuf), argbuf, sizeof argbuf);
kunmap(k);
/*
* Text
*/
s = newseg(SG_TEXT, UTZERO, 1);
s->flushme++;
p->seg[TSEG] = s;
pg = newpage(1, 0, UTZERO);
pg->txtflush = ~0;
segpage(s, pg);
k = kmap(s->map[0]->pages[0]);
memmove((uchar*)VA(k), initcode, sizeof initcode);
kunmap(k);
ready(p);
}
static void s3c24x0_uart_send_byte(__u8 ch)
{
#ifdef CONFIG_UART_ENABLE_FIFO
while (readl(VA(CURR_UART_BASE + UFSTAT)) & FIFO_FULL);
#else
while (!(readl(VA(CURR_UART_BASE + UTRSTAT)) & 0x2));
#endif
writeb(VA(CURR_UART_BASE + UTX), ch);
}
static __u8 s3c24x0_uart_recv_byte()
{
#ifdef CONFIG_UART_ENABLE_FIFO
while (!(readl(VA(CURR_UART_BASE + UFSTAT)) & RX_COUNT));
#else
while (!(readl(VA(CURR_UART_BASE + UTRSTAT)) & 0x1));
#endif
return readb(VA(CURR_UART_BASE + URX));
}
static void s3c24x_reset(void)
{
__u32 val;
val = readl(VA(WATCHDOG_BASE + WTCON));
val = val | (1 << 5) | 1;
writel(VA(WATCHDOG_BASE + WTCON), val);
while(1);
}
int mem_init(void)
{
__u32 val;
__u32 rcd, rfc, rp;
ddr_write(P1MEMCCMD, 0x4);
ddr_write(P1REFRESH, TIME2CYCLE(tREF));
ddr_write(P1CASLAT, CASL << 1);
ddr_write(P1T_DQSS, tDQSS);
ddr_write(P1T_MRD, tMRD);
ddr_write(P1T_RAS, TIME2CYCLE(tRAS));
ddr_write(P1T_RC, TIME2CYCLE(tRC));
rcd = TIME2CYCLE(tRCD);
ddr_write(P1T_RCD, TIME_SUB3(rcd) << 3 | rcd);
rfc = TIME2CYCLE(tRFC);
ddr_write(P1T_RFC, TIME_SUB3(rfc) << 3 | rfc);
rp = TIME2CYCLE(tRP);
ddr_write(P1T_RP, TIME_SUB3(rp) << 3 | rp);
ddr_write(P1T_RRD, TIME2CYCLE(tRRD));
ddr_write(P1T_WR, TIME2CYCLE(tWR));
ddr_write(P1T_WTR, 2);
ddr_write(P1T_XP, 2);
ddr_write(P1T_XSR, TIME2CYCLE(tXSR));
ddr_write(P1T_ESR, TIME2CYCLE(tXSR));
ddr_write(P1MEMCFG, 2 << 15 | 2 << 3 | 2);
ddr_write(P1MEMCFG2, 1 << 11 | 3 << 8 | 1 << 6 | 1);
ddr_write(P1CHIP_0_CFG, 1 << 16 | 0x50 << 8 | 0xf8);
//
ddr_write(P1DIRECTCMD, MCMD_NOP << 18);
ddr_write(P1DIRECTCMD, MCMD_PRE << 18);
ddr_write(P1DIRECTCMD, MCMD_REF << 18);
ddr_write(P1DIRECTCMD, MCMD_REF << 18);
ddr_write(P1DIRECTCMD, MCMD_MRS << 18 | 0x32);
ddr_write(P1DIRECTCMD, MCMD_MRS << 18 | 2 << 16);
ddr_write(P1MEMCCMD, 0);
while((ddr_read(P1MEMSTAT) & 0x3) != 1);
val = readl(VA(0x7E00F120));
val |= 0x1000;
val &= ~0xbf;
writel(VA(0x7E00F120), val);
return SDRAM_BASE + SDRAM_SIZE;
}
/*
* create the first process
*/
void
userinit(void)
{
Proc *p;
Segment *s;
KMap *k;
Page *pg;
/* no processes yet */
up = nil;
p = newproc();
p->pgrp = newpgrp();
p->egrp = smalloc(sizeof(Egrp));
p->egrp->ref = 1;
p->fgrp = dupfgrp(nil);
p->rgrp = newrgrp();
p->procmode = 0640;
kstrdup(&eve, "");
kstrdup(&p->text, "*init*");
kstrdup(&p->user, eve);
/*
* Kernel Stack
*/
p->sched.pc = (ulong)init0;
p->sched.sp = (ulong)p->kstack+KSTACK-(sizeof(Sargs)+BY2WD);
/*
* User Stack
*/
s = newseg(SG_STACK, USTKTOP-USTKSIZE, USTKSIZE/BY2PG);
p->seg[SSEG] = s;
pg = newpage(1, 0, USTKTOP-BY2PG);
segpage(s, pg);
k = kmap(pg);
bootargs(VA(k));
kunmap(k);
/*
* Text
*/
s = newseg(SG_TEXT, UTZERO, 1);
p->seg[TSEG] = s;
pg = newpage(1, 0, UTZERO);
memset(pg->cachectl, PG_TXTFLUSH, sizeof(pg->cachectl));
segpage(s, pg);
k = kmap(s->map[0]->pages[0]);
memmove((ulong*)VA(k), initcode, sizeof initcode);
kunmap(k);
ready(p);
}
void
copypage(Page *f, Page *t)
{
KMap *ks, *kd;
ks = kmap(f);
kd = kmap(t);
memmove((void*)VA(kd), (void*)VA(ks), BY2PG);
kunmap(ks);
kunmap(kd);
}
void
copypage(Page *f, Page *t)
{
KMap *ks, *kd;
if(f->pgszi != t->pgszi || t->pgszi < 0)
panic("copypage");
ks = kmap(f);
kd = kmap(t);
memmove((void*)VA(kd), (void*)VA(ks), sys->pgsz[t->pgszi]);
kunmap(ks);
kunmap(kd);
}
static void
rtcinit(void)
{
KMap *k;
k = kmappa(NVR_CKSUM_PHYS, PTENOCACHE|PTEIO);
nvr.cksum = (uchar*)VA(k);
k = kmappa(NVR_PHYS, PTENOCACHE|PTEIO);
nvr.ram = (uchar*)VA(k);
nvr.rtc = (RTCdev*)(VA(k)+RTCOFF);
rtcgencksum();
}
int add_one_file() {
if ((uint64_t)current_addr % 4 == 0) current_addr -= 4;
current_addr += (4 - (((uint64_t)current_addr)%4));
if (current_addr >= init_ref_end) {
return 0;
}
struct cpio_header* header = (struct cpio_header*)VA(current_addr);
current_addr += sizeof(struct cpio_header);
uint32_t name_len = str_to_int(header->namesize, 8);
char* name = malloc_small(name_len + 1);
void* addr_for_free = name;
for (uint32_t i = 0; i < name_len; ++i) {
name[i] = ((char*)VA(current_addr))[i];
}
name[name_len] = 0;
current_addr += name_len;
if (name_len == 11 && strncmp(name, END_OF_ARCHIVE, 11) == 0) {
return 0;
}
while (name_len > 0 && name[0] != '/') {
++name;
--name_len;
}
uint32_t mode = str_to_int(header->mode, 8);
if (S_ISDIR(mode)) {
mkdir(name);
} else if (S_ISREG(mode)) {
int file = open(name, O_WRONLY|O_CREAT|O_EXCL);
uint32_t filesize = str_to_int(header->filesize, 8);
if ((uint64_t)current_addr % 4 == 0) current_addr -= 4;
current_addr += 4 - ((uint64_t)current_addr)%4;
write(file, VA(current_addr), filesize);
current_addr += filesize;
}
free_block(addr_for_free);
return 1;
}
static int omapfb_set_par(struct fb_info *fb)
{
__u32 val;
struct fb_var_screeninfo *var = &fb->var;
// struct fb_fix_screeninfo *fix = &fb->fix;
struct omapfb_info *omapfb = fb->par;
struct omapfb_panel *pan;
pan = omapfb->panel;
dss_writel(DISPC_TIMING_H, pan->hbp << 20 | pan->hfp << 8 | pan->hpw);
dss_writel(DISPC_TIMING_V, pan->vbp << 20 | pan->vfp << 8 | pan->vpw);
// fixme
val = readl(VA(CM_CLKSEL_DSS));
val &= ~0x1F;
val |= CLKSEL_DSS1;
writel(VA(CM_CLKSEL_DSS), val);
dss_writel(DISPC_DIVISOR, 1 << 16 | 2 /* dss1_alwon_fclk / var->pix_clk */);
dss_writel(DISPC_SIZE_LCD, (var->yres - 1) << 16 | (var->xres - 1));
dss_writel(DISPC_GFX_POSITION, 0);
dss_writel(DISPC_GFX_SIZE, (var->yres - 1) << 16 | (var->xres - 1));
// fixme
switch (pan->bpp) {
case 16:
val = 0x6;
break;
case 24:
val = 0x9;
break;
case 32:
val = 0xd;
break;
default:
// printf("%s(): invalid pixel format (%d)!\n", __func__, disp->pix_fmt);
return -EINVAL;
}
dss_writel(DISPC_GFX_ATTRIBUTES, val << 1 | 1);
dss_writel(DISPC_CONTROL, 1 << 16 | 1 << 15 | 1 << 8 | 1 << 3 | 1);
return 0;
}
static int __INIT__ smsc91x_device_init(struct platform_device *pdev)
{
__u32 val;
val = readl(VA(GPMC_CONFIG1(1)));
val &= ~(0x3 << 10);
val &= ~(0x1 << 9);
val |= 0x1;
writel(VA(GPMC_CONFIG1(1)), val);
val = 0x8 << 8 | 0x1 << 6 | 0x8;
writel(VA(GPMC_CONFIG7(1)), val);
return 0;
}
static void at91sam926x_gpio_irqparse(struct int_pin *ipin, __u32 irq)
{
__u32 dwPioStat;
__u32 nPioIdx, nPioPin;
nPioIdx = irq - PIO_IRQ_OFFSET;
dwPioStat = readl(VA(PIO_BASE(nPioIdx) + PIO_ISR));
dwPioStat &= readl(VA(PIO_BASE(nPioIdx) + PIO_IMR));
// printf("%s(): stat = 0x%08x\n", __func__, dwPioStat);
for (nPioPin = 0; nPioPin < 32; nPioPin++) {
if (dwPioStat & (1 << nPioPin))
irq_handle(32 + 32 * nPioIdx + nPioPin);
}
}
/*
====================
remove
====================
*/
VOID Resource::Remove(const CHAR* name)
{
CHECK(name);
std::map<Str, Resource*>::iterator it = s_res_map.find(name);
if(it == s_res_map.end()) GAssert(VA("Can`t find the resource : %s.", name));
s_res_map.erase(it);
}
static struct kmem_slab *kmem_small_slab_create(struct kmem_cache *cache,
struct page *page)
{
struct kmem_small_cache *small = (struct kmem_small_cache *)cache;
const pfn_t pages = (pfn_t)1 << cache->order;
const size_t size = PAGE_SIZE * pages;
const size_t off = size - sizeof(struct kmem_small_slab);
char *vaddr = VA(page2pfn(page) << PAGE_BITS);
struct kmem_small_slab *slab = (struct kmem_small_slab *)(vaddr + off);
slab->common.ops = &small_slab_ops;
slab->common.total = 0;
slab->common.free = 0;
slab->free_list = 0;
const size_t sz = small->padded_size;
for (char *ptr = vaddr; ptr + sz <= (char *)slab; ptr += sz) {
kmem_small_slab_free(cache, &slab->common, ptr);
++slab->common.total;
++slab->common.free;
}
return (struct kmem_slab *)slab;
}
/*
====================
lua_script_func
====================
*/
VOID lua_script_func(lua_State* ls, const CHAR* name, lua_CFunction func)
{
LUA_STACK;
CHECK(ls);
LUA_WATCH(ls);
// check the function if it has been registered?
lua_pushstring(ls, name);
LUA_WATCH(ls);
lua_gettable(ls, LUA_GLOBALSINDEX);
LUA_WATCH(ls);
if(!lua_isnil(ls, -1))
{
lua_pushstring(ls, VA("The C function(%s) had been registered!\n",lua_tostring(ls, 1)));
__lua_error(ls);
}
lua_pop(ls, 1);
LUA_WATCH(ls);
// register the new function
lua_pushstring(ls, name);
LUA_WATCH(ls);
lua_pushcclosure(ls, (lua_CFunction)func, 0);
LUA_WATCH(ls);
lua_settable(ls, LUA_GLOBALSINDEX);
LUA_WATCH(ls);
}
static int __init smsc91x_device_init(struct platform_device *pdev)
{
__u32 val;
val = readl(VA(GPMC_CONFIG1(1)));
val &= ~(0x3 << 10);
val &= ~(0x1 << 9);
val |= 0x1;
writel(VA(GPMC_CONFIG1(1)), val);
#if 0
val = 0xF << 8 | 0x1 << 6; // | 0x8;
writel(VA(GPMC_CONFIG7(1)), val);
#endif
return 0;
}
//TODO: for derived verbs like +/ you can add the sub-pieces in parallel
Z K overDyad(K a, V *p, K b)
{
V *o=p-1; K(*f)(K,K);
K k=0;
if(VA(*o) && (f=DT[(L)*o].alt_funcs.verb_over))k=f(a,b); //k==0 just means not handled. Errors are not set to come from alt_funcs
P(k,k)
K u=0,v=0;
K y=a?v=join(u=enlist(a),b):b; //oom u (TODO: need to unroll to 'x f/y' and 'f/y' to optimize?)
K z=0,g=0;
if(yt > 0){z=ci(y); GC;}
if(yn == 0){if(VA(*o))z=LE; GC; } //Some verbs will handle this in alt_funcs
K c=first(y),d;//mm/o
//TODO: this reuse of g should be implemented in other adverbs
if(0 >yt) DO(yn-1, d=c; if(!g)g=newK(ABS(yt),1); memcpy(g->k,((V)y->k)+(i+1)*bp(yt),bp(yt)); c=dv_ex(d,p-1,g); if(2==g->c){cd(g);g=0;} cd(d); if(!c) GC;) //TODO: oom err/mmo unwind above - oom-g
if(0==yt) DO(yn-1, d=c; c=dv_ex(d,p-1,kK(y)[i+1]); cd(d); if(!c) GC;) //TODO: err/mmo unwind above
static void at91sam926x_gpio_umask(__u32 irq)
{
__u32 nPioIdx, nPioPin;
irq -= 32;
nPioIdx = irq >> 5;
nPioPin = irq & 0x1f;
writel(VA(PIO_BASE(nPioIdx) + PIO_IER), 1 << nPioPin);
}
