VOID NTAPI WriteRamDisk(IN INT RamDiskFile) { INT FileDescriptor; /* Open FS image and write it 16MB later */ FileDescriptor = open(FsImageName, O_RDWR); WriteToFlash(RamDiskFile, FileDescriptor, 16 * 1024 * 1024, (32 + 16) * 1024 * 1024); close(FileDescriptor); }
VOID NTAPI WriteFileSystem(IN INT NandImageFile) { INT FileDescriptor; /* Open FS image and write it */ FileDescriptor = open(FsImageName, O_RDWR); WriteToFlash(NandImageFile, FileDescriptor, FsStart, FsEnd); close(FileDescriptor); }
VOID NTAPI WriteBootLdr(IN INT NandImageFile) { INT FileDescriptor; /* Open FreeLDR and write it */ FileDescriptor = open(BootLdrImageName, O_RDWR); WriteToFlash(NandImageFile, FileDescriptor, BootLdrStart, BootLdrEnd); close(FileDescriptor); }
VOID NTAPI WriteLlb(IN INT NandImageFile) { INT FileDescriptor; /* Open LLB and write it */ FileDescriptor = open(LlbImageName, O_RDWR); WriteToFlash(NandImageFile, FileDescriptor, LlbStart, LlbEnd); close(FileDescriptor); }
/****************************************************************************** ** INTERNAL FUNCTION DEFINITIONS ******************************************************************************/ int main(void) { volatile unsigned int count = 0x0FFFu; unsigned int retVal = FALSE; unsigned char choice = 0; /* Enable the clocks for McSPI0 module.*/ McSPI0ModuleClkConfig(); /* Perform Pin-Muxing for SPI0 Instance */ McSPIPinMuxSetup(0); /* Perform Pin-Muxing for CS0 of SPI0 Instance */ McSPI0CSPinMuxSetup(chNum); /* Initialize the UART utility functions */ UARTStdioInit(); UARTPuts("Here the McSPI controller on the SoC communicates with", -1); UARTPuts(" the SPI Flash.\r\n\r\n", -1); /* Enable IRQ in CPSR.*/ IntMasterIRQEnable(); /* Map McSPI Interrupts to AINTC */ McSPI0AintcConfigure(); /* Do the necessary set up configurations for McSPI.*/ McSPISetUp(); /* Pass the write enable command to flash.*/ WriteEnable(); /* Wait until write enable command is successfully written to flash.*/ while(FALSE == retVal) { retVal = IsWriteSuccess(); } retVal = FALSE; UARTPuts("Do you want to erase a sector of the flash before ", -1); UARTPuts("writing to it ?.", -1); UARTPuts("\r\nInput y(Y)/n(N) to proceed.\r\n", -1); choice = UARTGetc(); UARTPutc(choice); if(('Y' == choice) || ('y' == choice)) { /* Erase a sector of flash.*/ SectorErase(); } /* Pass the write enable command to flash.*/ WriteEnable(); /* Wait until write enable command is successfully written to flash.*/ while(FALSE == retVal) { retVal = IsWriteSuccess(); } /* Write data of 1 page size to flash.*/ WriteToFlash(); while(count--); count = 0x0FFFu; /* Read data of 1 page size from flash.*/ ReadFromFlash(); while(count--); /* Verify the data written to and read from flash are same or not.*/ VerifyData(); while(1); }
/********************************************************************* * Function: INT8U MRF24J40Init(void) * * PreCondition: BoardInit (or other initialzation code is required) * * Input: None * * Output: Success/error * * Side Effects: MRF24J40 is initialized * * Overview: This function initializes the MRF24J40 ********************************************************************/ INT8U MRF24J40Init(void) { volatile INT8U i; volatile INT16U j; #if PROCESSOR == COLDFIRE_V1 iNesting++; #endif PHY_RESETn_LOW; for(j=0;j<7000;j++) { }; PHY_RESETn_HIGH; for(j=0;j<7000;j++) { }; /* do a soft reset */ PHYSetShortRAMAddr(WRITE_SOFTRST,0x07); for(j=0;j<1000;j++){}; PHYSetShortRAMAddr(WRITE_RFCTL,0x04); PHYSetShortRAMAddr(WRITE_RFCTL,0x00); for(j=0;j<1000;j++){}; // Enable FIFO and TX Enable PHYSetShortRAMAddr(WRITE_FFOEN, 0x98); PHYSetShortRAMAddr(WRITE_TXPEMISP, 0x95); /* program the RF and Baseband Register */ //PHYSetLongRAMAddr(RFCTRL4,0x02); /* Enable the RX */ //PHYSetLongRAMAddr(RFRXCTRL,0x01); /* setup */ PHYSetLongRAMAddr(RFCTRL0,0x03); PHYSetLongRAMAddr(RFCTRL1,RFCTRL1_VAL); /* enable the RF-PLL */ PHYSetLongRAMAddr(RFCTRL2,0x80); /* set TX output power */ PHYSetLongRAMAddr(RFCTRL3,TX_POWER_LEVEL); /* program RSSI ADC with 2.5 MHz clock */ //PHYSetLongRAMAddr(RFCTRL6,0x04); PHYSetLongRAMAddr(RFCTRL6,0x90); //PHYSetLongRAMAddr(RFCTRL7,0b00000000); //PHYSetLongRAMAddr(RFCTRL7,0b10011000); PHYSetLongRAMAddr(RFCTRL7,0x80); PHYSetLongRAMAddr(RFCTRL8,0x10); // Disable clockout PHYSetLongRAMAddr(SCLKDIV,0x21); #if (DEVICE_TYPE != PAN_COORDINATOR) // Join network as router // and Automatic Acknowledgment enabled PHYSetShortRAMAddr(WRITE_RXMCR, 0x04); #else // Join network as PAN Coordinator // and Automatic Acknowledgment enabled PHYSetShortRAMAddr(WRITE_RXMCR, 0x0C); #endif /* flush the RX fifo */ PHYSetShortRAMAddr(WRITE_RXFLUSH,0x01); // Configure Unslotted CSMA-CA Mode i = PHYGetShortRAMAddr(READ_TXMCR); i = i & 0xDF; PHYSetShortRAMAddr(WRITE_TXMCR,i); // Define Nonbeacon-Enabled Network PHYSetShortRAMAddr(WRITE_ORDER,0xFF); /* Program CCA mode using RSSI */ // 0x80 é o valor default, 0xB8 é o recomendado PHYSetShortRAMAddr(WRITE_BBREG2,0xB8); //PHYSetShortRAMAddr(WRITE_BBREG2,0x80); /* Program CCA, RSSI threshold values */ // Valor Default é 0x00, recomendado é 0x60 // Determina o níve de sinal que indica o canal como ocupado // 0x60 = -69 dBm PHYSetShortRAMAddr(WRITE_RSSITHCCA,0x60); //PHYSetShortRAMAddr(WRITE_RSSITHCCA,0x00); /* Enable the packet RSSI */ PHYSetShortRAMAddr(WRITE_BBREG6,0x40); /* Program the short MAC Address, 0xffff */ #if (DEVICE_TYPE != PAN_COORDINATOR) PHYSetShortRAMAddr(WRITE_SADRL,0xFF); PHYSetShortRAMAddr(WRITE_SADRH,0xFF); #else PHYSetShortRAMAddr(WRITE_SADRL,0x00); PHYSetShortRAMAddr(WRITE_SADRH,0x00); #endif /* and the short PanId Identifier, 0xffff */ #if (DEVICE_TYPE != PAN_COORDINATOR) PHYSetShortRAMAddr(WRITE_PANIDL,0xFF); PHYSetShortRAMAddr(WRITE_PANIDH,0xFF); #else PHYSetShortRAMAddr(WRITE_PANIDL,(PANID_INIT_VALUE & 0xFF)); PHYSetShortRAMAddr(WRITE_PANIDH,((PANID_INIT_VALUE>>8) & 0xFF)); #endif /* Test radio */ do { PHYSetShortRAMAddr(WRITE_EADR0,0xCA); i = PHYGetShortRAMAddr(READ_EADR0); if(i!= 0xCA) goto EXIT_ERROR; PHYSetShortRAMAddr(WRITE_EADR1,0xF1); i = PHYGetShortRAMAddr(READ_EADR1); if(i!= 0xF1) goto EXIT_ERROR; PHYSetShortRAMAddr(WRITE_EADR2,0x05); i = PHYGetShortRAMAddr(READ_EADR2); if(i!= 0x05) goto EXIT_ERROR; PHYSetShortRAMAddr(WRITE_EADR3,0xBA); i = PHYGetShortRAMAddr(READ_EADR3); if(i!= 0xBA) goto EXIT_ERROR; PHYSetShortRAMAddr(WRITE_EADR4,0xFF); i = PHYGetShortRAMAddr(READ_EADR4); if(i!= 0xFF) goto EXIT_ERROR; PHYSetShortRAMAddr(WRITE_EADR5,0x10); i = PHYGetShortRAMAddr(READ_EADR5); if(i!= 0x10) goto EXIT_ERROR; PHYSetShortRAMAddr(WRITE_EADR6,0x4E); i = PHYGetShortRAMAddr(READ_EADR6); if(i!= 0x4E) goto EXIT_ERROR; PHYSetShortRAMAddr(WRITE_EADR7,0x11); i = PHYGetShortRAMAddr(READ_EADR7); if(i!= 0x11) goto EXIT_ERROR; break; EXIT_ERROR: #if PROCESSOR == COLDFIRE_V1 iNesting--; #endif return RADIO_ERROR; }while(0); // Inicializa o módulo de memória FLASH InitFlash(); #if (PROCESSOR == ARM_Cortex_M0) if ((mac64Address[0] == 0xFF) && (mac64Address[1] == 0xFF) && (mac64Address[2] == 0xFF) && (mac64Address[3] == 0xFF)) { INT8U tmp_mac64[8] = {EUI_0,EUI_1,EUI_2,EUI_3,EUI_4,EUI_5,EUI_6,EUI_7}; EraseFlash(0x0001F000, 1024); WriteToFlash((INT8U*)&tmp_mac64, MAC64_MEM_ADDRESS, 8); } #endif /* Program Long MAC Address*/ for(i=0;i<8;i++) { PHYSetShortRAMAddr(WRITE_EADR0+i*2,mac64Address[7-i]); } SetChannel(CHANNEL_INIT_VALUE); for(j=0;j<1000;j++){}; //i = PHYGetShortRAMAddr(READ_ISRSTS); PHYSetShortRAMAddr(WRITE_FFOEN, 0x98); // Habilita interrupções PHYSetShortRAMAddr(WRITE_INTMSK,0xF6); // bypass the errata to make RF communication stable PHYSetLongRAMAddr(RFCTRL1, RFCTRL1_VAL); #if PROCESSOR == COLDFIRE_V1 iNesting--; #endif return RADIO_OK; }