void vPortISRHandler( void *pvNullDoNotUse )
{
uint32_t ulInterruptStatus, ulInterruptMask = 1UL;
BaseType_t xInterruptNumber;
XIntc_Config *pxInterruptController;
XIntc_VectorTableEntry *pxTable;
/* Just to remove compiler warning. */
( void ) pvNullDoNotUse;
/* Get the configuration by using the device ID - in this case it is
assumed that only one interrupt controller is being used. */
pxInterruptController = &XIntc_ConfigTable[ XPAR_XPS_INTC_0_DEVICE_ID ];
/* Which interrupts are pending? */
ulInterruptStatus = XIntc_mGetIntrStatus( pxInterruptController->BaseAddress );
for( xInterruptNumber = 0; xInterruptNumber < XPAR_INTC_MAX_NUM_INTR_INPUTS; xInterruptNumber++ )
{
if( ulInterruptStatus & 0x01UL )
{
/* Clear the pending interrupt. */
XIntc_mAckIntr( pxInterruptController->BaseAddress, ulInterruptMask );
/* Call the registered handler. */
pxTable = &( pxInterruptController->HandlerTable[ xInterruptNumber ] );
pxTable->Handler( pxTable->CallBackRef );
}
/* Check the next interrupt. */
ulInterruptMask <<= 0x01UL;
ulInterruptStatus >>= 0x01UL;
/* Have we serviced all interrupts? */
if( ulInterruptStatus == 0UL )
{
break;
}
}
}
xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
{
unsigned long ulControlReg, ulMask;
/* NOTE: The baud rate used by this driver is determined by the hardware
parameterization of the UART Lite peripheral, and the baud value passed to
this function has no effect. */
/* Create the queues used to hold Rx and Tx characters. */
xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed char ) );
if( ( xRxedChars ) && ( xCharsForTx ) )
{
/* Disable the interrupt. */
XUartLite_mDisableIntr( XPAR_RS232_UART_BASEADDR );
/* Flush the fifos. */
ulControlReg = XIo_In32( XPAR_RS232_UART_BASEADDR + XUL_STATUS_REG_OFFSET );
XIo_Out32( XPAR_RS232_UART_BASEADDR + XUL_CONTROL_REG_OFFSET, ulControlReg | XUL_CR_FIFO_TX_RESET | XUL_CR_FIFO_RX_RESET );
/* Enable the interrupt again. The interrupt controller has not yet been
initialised so there is no chance of receiving an interrupt until the
scheduler has been started. */
XUartLite_mEnableIntr( XPAR_RS232_UART_BASEADDR );
/* Enable the interrupt in the interrupt controller while maintaining
all the other bit settings. */
ulMask = XIntc_In32( ( XPAR_OPB_INTC_0_BASEADDR + XIN_IER_OFFSET ) );
ulMask |= XPAR_RS232_UART_INTERRUPT_MASK;
XIntc_Out32( ( XPAR_OPB_INTC_0_BASEADDR + XIN_IER_OFFSET ), ( ulMask ) );
XIntc_mAckIntr( XPAR_INTC_SINGLE_BASEADDR, 2 );
}
return ( xComPortHandle ) 0;
}
