s32 usleep(u32 useconds)
{
XTime tEnd, tCur;
/*disable ttc timer*/
Xil_Out32(TTC3_BASEADDR + 0x0000000CU,0x1U);
/*set prescale value*/
Xil_Out32(TTC3_BASEADDR + 0x00000000U, 0x000001U);
/*write interval value to register*/
Xil_Out32(TTC3_BASEADDR + 0x00000024U,0xFFFFFFFFU);
/*write match value to register*/
Xil_Out32(TTC3_BASEADDR + 0x00000030U,0xFFFFFFFFU);
/* Enable ttc Timer */
Xil_Out32(TTC3_BASEADDR + 0x0000000CU,0x1AU);
XTime_GetTime(&tCur);
tEnd = tCur + (((XTime) useconds) * (COUNTS_PER_USECOND));
do
{
XTime_GetTime(&tCur);
} while (tCur < tEnd);
/* Disable ttc Timer */
Xil_Out32(TTC3_BASEADDR + 0x0000000CU, Xil_In32(TTC3_BASEADDR + 0x0000000CU) | 0x00000001U);
return 0;
}
void func1_time_measure
(
test_func1_pointer_strct func_ptr,
unsigned int ui_test_num
)
{
u32 u32Loop;
XTime tBegin, tEnd;
XTime tLastCycles;
u64 tLastUS;
u64 tLastSecond;
XTime_GetTime(&tBegin);
for ( u32Loop=0; u32Loop<ui_test_num; u32Loop++ )
{
func_ptr( );
}
XTime_GetTime(&tEnd);
tLastCycles = ( tEnd - tBegin );
tLastUS = ( tLastCycles*1000000 )/COUNTS_PER_SECOND;
tLastSecond = tLastUS/1000000;
printf("It lasts %llu cycles, %llu us = %llu second\n\r", tLastCycles, tLastUS, tLastSecond );
//xil_printf("\n\r");
}
void func2_time_measure
(
test_func2_pointer_strct func_ptr,
unsigned int ui_test_param,
unsigned int ui_test_num
)
{
u32 u32Loop;
XTime tBegin, tEnd;
XTime tLastCycles;
u64 tLastUS;
u64 tLastSecond;
printf( "Test number:%d, test parameter:%d=0x%08x\r\n",
ui_test_num, ui_test_param, ui_test_param );
usleep(10000);
XTime_GetTime(&tBegin);
for ( u32Loop=0; u32Loop<ui_test_num; u32Loop++ )
{
func_ptr(ui_test_param);
}
XTime_GetTime(&tEnd);
tLastCycles = ( tEnd - tBegin );
tLastUS = ( tLastCycles*1000000 )/COUNTS_PER_SECOND;
tLastSecond = tLastUS/1000000;
printf("It lasts %llu cycles, %llu us, %llu second\n\r", tLastCycles, tLastUS, tLastSecond );
//xil_printf("\n\r");
}
unsigned int usleep(unsigned int useconds)
{
XTime tEnd, tCur;
XTime_GetTime(&tCur);
tEnd = tCur + ((XTime) useconds) * (XPAR_CPU_PPC440_CORE_CLOCK_FREQ_HZ / 1000000);
do
{
XTime_GetTime(&tCur);
} while (tCur < tEnd);
return 0;
}
/*
*
* This API is used to provide delays in seconds
*
* @param seconds requested
*
* @return 0 always
*
* @note None.
*
****************************************************************************/
unsigned sleep(unsigned int seconds)
{
XTime tEnd, tCur;
XTime_GetTime(&tCur);
tEnd = tCur + (((XTime) seconds) * COUNTS_PER_SECOND);
do
{
XTime_GetTime(&tCur);
} while (tCur < tEnd);
return 0;
}
unsigned int sleep(unsigned int seconds)
{
XTime tEnd, tCur;
XTime_GetTime(&tCur);
tEnd = tCur + ((XTime) seconds) * XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ;
do
{
XTime_GetTime(&tCur);
} while (tCur < tEnd);
return 0;
}
vbx_timestamp_t vbx_timestamp()
{
XTime v;
XTime_GetTime(&v);
return (vbx_timestamp_t) v;
}
unsigned long long ullGetHiresTime( void )
{
XTime tCur;
XTime_GetTime( &tCur );
tCur /= COUNTS_PER_USECOND;
return tCur;
}
/**
*
* This API gives a delay in microseconds
*
* @param useconds requested
*
* @return 0 if the delay can be achieved, -1 if the requested delay
* is out of range
*
* @note None.
*
****************************************************************************/
s32 usleep(u32 useconds)
{
XTime tEnd, tCur;
/*write 50MHz frequency to System Time Stamp Generator Register*/
Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_FREQ_REG_OFFSET),XIOU_SCNTRS_FREQ);
/*Enable the counter*/
Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_CNT_CNTRL_REG_OFFSET),XIOU_SCNTRS_CNT_CNTRL_REG_EN);
XTime_GetTime(&tCur);
tEnd = tCur + (((XTime) useconds) * COUNTS_PER_USECOND);
do
{
XTime_GetTime(&tCur);
} while (tCur < tEnd);
/*Disable the counter*/
Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_CNT_CNTRL_REG_OFFSET),(~(XIOU_SCNTRS_CNT_CNTRL_REG_EN)));
return 0;
}
/*
*
* This API is used to provide delays in seconds
*
* @param seconds requested
*
* @return 0 always
*
* @note None.
*
****************************************************************************/
s32 sleep(u32 seconds)
{
XTime tEnd, tCur;
/* Enable the counter only if it is disable */
if(((Xil_In32(XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_CNT_CNTRL_REG_OFFSET)) & XIOU_SCNTRS_CNT_CNTRL_REG_EN_MASK) != XIOU_SCNTRS_CNT_CNTRL_REG_EN){
/*write frequency to System Time Stamp Generator Register*/
Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_FREQ_REG_OFFSET),XIOU_SCNTRS_FREQ);
/*Enable the counter*/
Xil_Out32((XIOU_SCNTRS_BASEADDR + XIOU_SCNTRS_CNT_CNTRL_REG_OFFSET),XIOU_SCNTRS_CNT_CNTRL_REG_EN);
}
XTime_GetTime(&tCur);
tEnd = tCur + (((XTime) seconds) * COUNTS_PER_SECOND);
do
{
XTime_GetTime(&tCur);
} while (tCur < tEnd);
return 0;
}
void indiv_to_fpga(cgp_indiv_t *indiv, int index)
{
int i, j;
u32 vrc_chrom;
XTime start, end;
/* VRC start */
XTime_GetTime(&start);
for (i = 0; i < CGP_COL; ++i) {
vrc_chrom = 0;
for (j = 0; j < CGP_ROW; ++j) {
const pe_t *pe = &indiv->pe_arr[i][j];
vrc_chrom = merge_vrc_mux(vrc_chrom, j, pe->mux_a,
pe->mux_b);
update_bitstream(i, j, pe->f);
}
send_vrc_column(index, i, vrc_chrom);
}
send_vrc_switch(index, merge_vrc_switch(indiv->out_select,
indiv->filter_switch));
XTime_GetTime(&end);
vrc_time_acc += end - start;
/* VRC end */
/* DPR start */
XTime_GetTime(&start);
set_left_far(index);
set_right_far(index);
flush_bitstream();
dpr_reconfigure();
XTime_GetTime(&end);
dpr_time_acc += end - start;
/* DPR end */
}
/****************************************************************************
*
* Set the time in the Global Timer Counter Register.
*
* @param Value to be written to the Global Timer Counter Register.
*
* @return None.
*
* @note In multiprocessor environment reference time will reset/lost for
* all processors, when this function called by any one processor.
*
****************************************************************************/
void XTime_SetTime(XTime Xtime)
{
XTime tEnd, tCur;
XTime_GetTime(&tCur);
XTime_GetTime(&tEnd);
XTime_GetTime(&tEnd);
if(tEnd!=tCur)
{
return;
}
/* Disable Global Timer */
Xil_Out32(GLOBAL_TMR_BASEADDR + GTIMER_CONTROL_OFFSET, 0x0);
/* Updating Global Timer Counter Register */
Xil_Out32(GLOBAL_TMR_BASEADDR + GTIMER_COUNTER_LOWER_OFFSET, (u32)Xtime);
Xil_Out32(GLOBAL_TMR_BASEADDR + GTIMER_COUNTER_UPPER_OFFSET,
(u32)(Xtime>>32));
/* Enable Global Timer */
Xil_Out32(GLOBAL_TMR_BASEADDR + GTIMER_CONTROL_OFFSET, 0x1);
}
/**
*
* Returns current system timer tick count.
*
* @return Current system timer tick count.
*
* @note None.
*
*****************************************************************************/
OsSizeT swConfig_getTickCount(void)
{
#ifdef USE_XYLON_PLATFORM_LIBRARY
return plfTimer_getTickCount(SYSTEM_TIMER);
#else
#ifdef __arm__
XTime t=0;
XTime_GetTime(&t);
return (OsSizeT)t;
#else
return ++tmrCnt;
#endif
#endif
}
void global_timer_test( void )
{
u32 u32Loop;
XTime tBegin, tCur;
XTime tLastCycles;
u64 tLastUS;
u64 tPrevUS;
u64 tLastSecond;
xil_printf("Global Timer standalone driver test.\n\r" );
xil_printf("CPU frequency: %dHz=%dMHz.\n\r",
XPAR_CPU_CORTEXA9_CORE_CLOCK_FREQ_HZ, XPAR_CPU_CORTEXA9_CORE_CLOCK_FREQ_HZ/1000000 );
xil_printf("Global Timer frequency: %dHz=%dMHz.\n\r",
COUNTS_PER_SECOND, COUNTS_PER_SECOND/1000000 );
XTime_GetTime(&tBegin);
tPrevUS = 0;
for ( u32Loop=0; u32Loop<1000000000; u32Loop++ )
{
//for ( u32InnerLoop=0; u32InnerLoop<DDR_TEST_WORD; u32InnerLoop++ )
{
}
XTime_GetTime(&tCur);
tLastCycles = ( tCur - tBegin );
tLastUS = ( tLastCycles*1000000 ) / COUNTS_PER_SECOND;
tLastSecond = tLastUS/1000000;
if( tLastUS>(tPrevUS+1000000) )
{
printf("It lasts %llu cycles, %llu us, %llu second\n\r", tLastCycles, tLastUS, tLastSecond );
tPrevUS = tLastUS;
}
}
xil_printf("\n\r");
}
int CPUsChoice(Board *board, char players[], int turn, int maxAiSteps, BOOL isDemo) {
XTime clk;
XTime_GetTime(&clk);
if (isDemo && (clk)%kERROR_FACTOR == 0) {
xil_printf("Mistake made by CPU %s\n", (players[turn] == kCPU_HARD ? "HARD" : "EASY"));
while (1) {
int ans = (rand()*clk)%kBOARDS_COLS;
if (canInsertInColumnAtIndex(ans, board)) {
return ans;
}
}
}
double *fitness = calloc(kBOARDS_COLS, sizeof(double));
traverse(board, players, turn, players[turn], 1, maxAiSteps, fitness, -1);
int i, ans;
for (i=0; i<kBOARDS_COLS; ++i) {
ans = fittestIndex(fitness);
if (canInsertInColumnAtIndex(ans, board)) break;
else {
fitness[ans] = INT32_MIN;
}
}
free(fitness);
return ans;
}
static void execute(int run)
{
XTime time;
u32 frame, init_frame, frame_before_start, generations;
unsigned int seed;
init_interrupt();
XTime_GetTime(&time);
seed = time;
srand(seed);
frame_before_start = read_frame_number();
XTime_SetTime(0);
while (!OCM_CPU0_RUNNING);
OCM_CPU1_RUNNING = 1;
/* If the program will run without PL reset then the first frame will
* not be 0. */
init_frame = init_popul();
update_development(get_elit(), init_frame, time);
for (generations = 1; OCM_CPU0_RUNNING; ++generations) {
frame = new_popul();
update_development(get_elit(), frame, generations);
}
XTime_GetTime(&time);
if (init_frame > 0 && init_frame == frame_before_start) {
/* The first frames should be removed because those belong to
* the previous run. The size of the FIFO implies that only
* one frame remain in the FIFO but it will influence one
* run (furthermore, these frames might be several times
* in the development list). */
int removed_developments = remove_first_frames();
const int removed_frames = 1;
/* Consequently, the frames are renumbered and should start
* with number 0 */
postproc_development(init_frame + removed_frames);
#if 0
xil_printf("Frame before start: 0x%X. First frame: 0x%X. "
"I removed %d development items "
"(%d frames).\n\r",
frame_before_start, init_frame,
removed_developments, removed_frames);
(void) run;
#else
(void) removed_developments;
#endif
}
xil_printf("Run %d is finished.\n\r", run);
next_development_run(seed, time, OCM_FRAME_COUNTER, generations);
OCM_CPU1_RUNNING = 0;
}
/**
* This function initializes the system using the psu_init()
*
* @param FsblInstancePtr is pointer to the XFsbl Instance
*
* @return returns the error codes described in xfsbl_error.h on any error
* returns XFSBL_SUCCESS on success
*
******************************************************************************/
static u32 XFsbl_SystemInit(XFsblPs * FsblInstancePtr)
{
u32 Status = XFSBL_SUCCESS;
#if defined (XPAR_PSU_DDR_0_S_AXI_BASEADDR) && !defined (ARMR5)
u32 BlockNum;
#endif
/**
* MIO33 can be used to control power to PL through PMU.
* For 1.0 and 2.0 Silicon, a workaround is needed to Powerup PL
* before MIO33 is configured. Hence, before MIO configuration,
* Powerup PL (but restore isolation).
*/
if (XGetPSVersion_Info() <= XPS_VERSION_2) {
Status = XFsbl_PowerUpIsland(PMU_GLOBAL_PWR_STATE_PL_MASK);
if (Status != XFSBL_SUCCESS) {
Status = XFSBL_ERROR_PL_POWER_UP;
XFsbl_Printf(DEBUG_GENERAL, "XFSBL_ERROR_PL_POWER_UP\r\n");
goto END;
}
/* For PS only reset, make sure FSBL exits with isolation removed */
if (FsblInstancePtr->ResetReason != PS_ONLY_RESET) {
XFsbl_IsolationRestore(PMU_GLOBAL_REQ_ISO_INT_EN_PL_NONPCAP_MASK);
}
}
/**
* psu initialization
*/
Status = (u32)psu_init();
if (XFSBL_SUCCESS != Status) {
XFsbl_Printf(DEBUG_GENERAL,"XFSBL_PSU_INIT_FAILED\n\r");
/**
* Need to check a way to communicate both FSBL code
* and PSU init error code
*/
Status = XFSBL_PSU_INIT_FAILED + Status;
goto END;
}
#ifdef XFSBL_PERF
XTime_GetTime(&(FsblInstancePtr->PerfTime.tFsblStart));
#endif
#if defined (XPAR_PSU_DDR_0_S_AXI_BASEADDR) && !defined (ARMR5)
/* For A53, mark DDR region as "Memory" as DDR initialization is done */
#ifdef ARMA53_64
/* For A53 64bit*/
for(BlockNum = 0; BlockNum < NUM_BLOCKS_A53_64; BlockNum++)
{
XFsbl_SetTlbAttributes(BlockNum * BLOCK_SIZE_A53_64, ATTRIB_MEMORY_A53_64);
}
Xil_DCacheFlush();
#else
/* For A53 32bit*/
for(BlockNum = 0; BlockNum < NUM_BLOCKS_A53_32; BlockNum++)
{
XFsbl_SetTlbAttributes(BlockNum * BLOCK_SIZE_A53_32, ATTRIB_MEMORY_A53_32);
}
Xil_DCacheFlush();
#endif
#endif
/**
* Forcing the SD card detection signal to bypass the debouncing logic.
* This will ensure that SD controller doesn't end up waiting for long,
* fixed durations for card to be stable.
*/
XFsbl_Out32(IOU_SLCR_SD_CDN_CTRL,
(IOU_SLCR_SD_CDN_CTRL_SD1_CDN_CTRL_MASK |
IOU_SLCR_SD_CDN_CTRL_SD0_CDN_CTRL_MASK));
/**
* DDR Check if present
*/
/**
* Poweroff the unused blocks as per PSU
*/
END:
return Status;
}
int main() {
double Y_freq = 0.0;
double Y_serial_two = 0.0;
double Y_serial_three = 0.0;
// p-value parameters
double expected_freq = n_input/(2*4096); //50% chance of occurring for each sample
double expected_serial_two = n_input/(2*4*2048); //25% chance of occurrence every 2 samples
double expected_serial_three = n_input/(3*8*2048); //12.5% chance of occurrence every 3 samples
init_platform();
//Setup the freq serial hw platform
int status = XFreq_serial_init(&FreqSerial);
if (status != XST_SUCCESS) {
print("Freq Serial peripheral setup failed\n\r");
exit(-1);
}
//----------------//
//---START TEST---//
//----------------//
//set the input parameters of the HLS block
XFreq_serial_Set_seed_V(&FreqSerial, seed_input);
XFreq_serial_Set_n_V(&FreqSerial, n_input);
XFreq_serial_Set_offset_V(&FreqSerial, offset_input);
//check that suite is ready
if (XFreq_serial_IsReady(&FreqSerial)){
printf("--------------------------------,--------------------------------\n");
printf("Sample Size, %llu \n\r", XFreq_serial_Get_n_V(&FreqSerial));
printf("Seed, %lu \n\r", XFreq_serial_Get_seed_V(&FreqSerial));
printf("Offset, %lu \n\r", XFreq_serial_Get_offset_V(&FreqSerial));
printf("--------------------------------,--------------------------------\n");
printf("Results ETA, %.2f, seconds\n\r",(double)(n_input/(COUNTS_PER_SECOND*0.3)));
}else{
print("!!!WARNING: Freq Serial peripheral is not ready! Exiting...\n\r");
exit(-1);
}
// Simple non-interrupt driven test
XFreq_serial_Start(&FreqSerial);
//start time measurement
XTime_GetTime(&tStart);
do{
//get freq test hardware specification information
freq_base_address_hw = XFreq_serial_Get_freqStream_V_BaseAddress(&FreqSerial);
freq_high_address_hw = XFreq_serial_Get_freqStream_V_HighAddress(&FreqSerial);
freq_total_bytes_hw = XFreq_serial_Get_freqStream_V_TotalBytes(&FreqSerial);
freq_bit_width_hw = XFreq_serial_Get_freqStream_V_BitWidth(&FreqSerial);
freq_depth_hw = XFreq_serial_Get_freqStream_V_Depth(&FreqSerial);
//get serial two-tuple test hardware specification information
serial_2_base_address_hw = XFreq_serial_Get_serialTwoStream_V_BaseAddress(&FreqSerial);
serial_2_high_address_hw = XFreq_serial_Get_serialTwoStream_V_HighAddress(&FreqSerial);
serial_2_total_bytes_hw = XFreq_serial_Get_serialTwoStream_V_TotalBytes(&FreqSerial);
serial_2_bit_width_hw = XFreq_serial_Get_serialTwoStream_V_BitWidth(&FreqSerial);
serial_2_depth_hw = XFreq_serial_Get_serialTwoStream_V_Depth(&FreqSerial);
//get serial three-tuple test hardware specification information
serial_3_base_address_hw = XFreq_serial_Get_serialThreeStream_V_BaseAddress(&FreqSerial);
serial_3_high_address_hw = XFreq_serial_Get_serialThreeStream_V_HighAddress(&FreqSerial);
serial_3_total_bytes_hw = XFreq_serial_Get_serialThreeStream_V_TotalBytes(&FreqSerial);
serial_3_bit_width_hw = XFreq_serial_Get_serialThreeStream_V_BitWidth(&FreqSerial);
serial_3_depth_hw = XFreq_serial_Get_serialThreeStream_V_Depth(&FreqSerial);
//read freq test values
freqchardebug_value = XFreq_serial_Read_freqStream_V_Bytes(&FreqSerial, 0, charDataAddress, 128);
freqintdebug_value = XFreq_serial_Read_freqStream_V_Words(&FreqSerial, 0, intDataAddress, 32);
//read serial two-tuple test values
serialtwochardebug_value = XFreq_serial_Read_serialTwoStream_V_Bytes(&FreqSerial, 0, charDataAddress+128, 512);
serialtwointdebug_value = XFreq_serial_Read_serialTwoStream_V_Words(&FreqSerial, 0, intDataAddress+32, 128);
//read serial three-tuple test values
serialthreechardebug_value = XFreq_serial_Read_serialThreeStream_V_Bytes(&FreqSerial, 0, charDataAddress+640, 512);
serialthreeintdebug_value = XFreq_serial_Read_serialThreeStream_V_Words(&FreqSerial, 0, intDataAddress+160, 128);
}while(!XFreq_serial_IsReady(&FreqSerial));
//get time measurement
XTime_GetTime(&tEnd);
//output time measurements
printf("Test completed in ,%.2f, us (,%.2f, seconds).\n", 1.0 * (tEnd - tStart) / (COUNTS_PER_SECOND/1000000), 1.0 * (tEnd - tStart) / (COUNTS_PER_SECOND));
//Xilinx time functions measure time in PS clock cycles, so conversion to PL clock rate is required
printf("PL clock cycles per sample:, %.2f \n", (1.0)*((2*(tEnd - tStart))/((n_input*6.66666687))));
if(debugValid){
//number of chi-squared categories
printf("Freq Char Debug Value: %d\n\r", freqchardebug_value);
printf("Serial 2 Char Debug Value: %d\n\r", serialtwochardebug_value);
printf("Serial 3 Char Debug Value: %d\n\r", serialthreechardebug_value);
printf("Freq Int Debug Value: %d\n\r", freqintdebug_value);
printf("Serial 2 Int Debug Value: %d\n\r", serialtwointdebug_value);
printf("Serial 3 Int Debug Value: %d\n\r", serialthreeintdebug_value);
//hardware specification information
printf("Freq Base Address: %d\n\r", freq_base_address_hw);
printf("Freq High Address: %d\n\r", freq_high_address_hw);
printf("Freq Total Bytes: %d\n\r", freq_total_bytes_hw);
printf("Freq Bit Width: %d\n\r", freq_bit_width_hw);
printf("Freq Depth: %d\n\r", freq_depth_hw);
printf("Serial 2 Base Address: %d\n\r", serial_2_base_address_hw);
printf("Serial 2 High Address: %d\n\r", serial_2_high_address_hw);
printf("Serial 2 Total Bytes: %d\n\r", serial_2_total_bytes_hw);
printf("Serial 2 Bit Width: %d\n\r", serial_2_bit_width_hw);
printf("Serial 2 Depth: %d\n\r", serial_2_depth_hw);
printf("Serial 3 Base Address: %d\n\r", serial_3_base_address_hw);
printf("Serial 3 High Address: %d\n\r", serial_3_high_address_hw);
printf("Serial 3 Total Bytes: %d\n\r", serial_3_total_bytes_hw);
printf("Serial 3 Bit Width: %d\n\r", serial_3_bit_width_hw);
printf("Serial 3 Depth: %d\n\r", serial_3_depth_hw);
}
cleanup_platform();
//read previous test values
//read freq test values
freqchardebug_value = XFreq_serial_Read_freqStream_V_Bytes(&FreqSerial, 0, charDataAddress, 128);
freqintdebug_value = XFreq_serial_Read_freqStream_V_Words(&FreqSerial, 0, intDataAddress, 32);
//read serial two-tuple test values
serialtwochardebug_value = XFreq_serial_Read_serialTwoStream_V_Bytes(&FreqSerial, 0, charDataAddress+128, 512);
serialtwointdebug_value = XFreq_serial_Read_serialTwoStream_V_Words(&FreqSerial, 0, intDataAddress+32, 128);
//read serial three-tuple test values
serialthreechardebug_value = XFreq_serial_Read_serialThreeStream_V_Bytes(&FreqSerial, 0, charDataAddress+640, 512);
serialthreeintdebug_value = XFreq_serial_Read_serialThreeStream_V_Words(&FreqSerial, 0, intDataAddress+160, 128);
//output previous test parameters and results
//Histogram Decompression
//serial two-tuple test decompression
for (int i = 0; i<96; i++){
serial_two_decompressed[i+i/3] = (unsigned long int) *(intDataAddress + 32 + i);
}
for (int i = 0; i<32; i++){
serial_two_decompressed[i * 4 + 3] = (expected_serial_two * 4)
- (serial_two_decompressed[i * 4])
- (serial_two_decompressed[i * 4 + 1])
- (serial_two_decompressed[i * 4 + 2]);
}
//serial three-tuple test decompression
for (int i = 0; i < 112; i++) {
serial_three_decompressed[i + (i / 7)] = (unsigned long int) *(intDataAddress + 160 + i);
}
for (int i = 0; i < 16; i++) {
serial_three_decompressed[i * 8 + 7] = (expected_serial_three * 8)
- (serial_three_decompressed[i * 8])
- (serial_three_decompressed[i * 8 + 1])
- (serial_three_decompressed[i * 8 + 2])
- (serial_three_decompressed[i * 8 + 3])
- (serial_three_decompressed[i * 8 + 4])
- (serial_three_decompressed[i * 8 + 5])
- (serial_three_decompressed[i * 8 + 6]);
}
//report previous test histograms
printf("--------------------------------,--------------------------------\n");
printf("Frequency Histogram,");
for (int i = 0; i<32; i++){
printf("%lu,", (unsigned long int) *(intDataAddress + i));
}
printf("\n");
printf("Serial 2-Tuple Histogram,");
for (int i = 0; i<128; i++){
printf("%lu,", serial_two_decompressed[i]);
}
printf("\n");
printf("Serial 3-Tuple Histogram,");
for (int i = 0; i<128; i++){
printf("%lu,", serial_three_decompressed[i]);
}
printf("\n");
printf("--------------------------------,--------------------------------\n");
printf("Test, Y\n");
printf("--------------------------------,--------------------------------\n");
// Y-value computations
for(int i=0; i<32; i++){
Y_freq += (((unsigned long int) *(intDataAddress + i)-expected_freq)*((unsigned long int) *(intDataAddress + i)-expected_freq))/expected_freq;
}
for(int i=0; i<128; i++){
Y_serial_two += ((serial_two_decompressed[i]-expected_serial_two)*(serial_two_decompressed[i]-expected_serial_two))/expected_serial_two;
}
for(int i=0; i<128; i++){
Y_serial_three += ((serial_three_decompressed[i]-expected_serial_three)*(serial_three_decompressed[i]-expected_serial_three))/expected_serial_three;
}
// p-value computations
p_val_freq = chisqr(32, Y_freq); //degrees of freedom for frequency: 32-1
p_val_serial_two = chisqr(96, Y_serial_two); //degrees of freedom for serial: 128-1
p_val_serial_three = chisqr(112, Y_serial_three); //degrees of freedom for serial: 128-1
printf("--------------------------------,--------------------------------\n");
printf("Test, p-value\n");
printf("--------------------------------,--------------------------------\n");
printf("Frequency Test, %g\n", p_val_freq);
printf("Serial 2-Tuple Test, %g\n", p_val_serial_two);
printf("Serial 3-Tuple Test, %g\n", p_val_serial_three);
printf("--------------------------------,--------------------------------\n");
return 0;
}
