void RDP_SetPrimColor( u32 w0, u32 w1 )
{
gDPSetPrimColor( _SHIFTL( w0, 8, 8 ), // m
_SHIFTL( w0, 0, 8 ), // l
_SHIFTR( w1, 24, 8 ), // r
_SHIFTR( w1, 16, 8 ), // g
_SHIFTR( w1, 8, 8 ), // b
_SHIFTR( w1, 0, 8 ) ); // a
}
void gDP_SetPrimColor(unsigned int w0, unsigned int w1)
{
Gfx.PrimColor.R = _SHIFTR(w1, 24, 8) * 0.0039215689f;
Gfx.PrimColor.G = _SHIFTR(w1, 16, 8) * 0.0039215689f;
Gfx.PrimColor.B = _SHIFTR(w1, 8, 8) * 0.0039215689f;
Gfx.PrimColor.A = _SHIFTR(w1, 0, 8) * 0.0039215689f;
Gfx.PrimColor.M = _SHIFTL(w0, 8, 8);
Gfx.PrimColor.L = _SHIFTL(w0, 0, 8) * 0.0039215689f;
if(OpenGL.Ext_FragmentProgram && do_arb) {
glProgramEnvParameter4fARB(GL_FRAGMENT_PROGRAM_ARB, 1, Gfx.PrimColor.R, Gfx.PrimColor.G, Gfx.PrimColor.B, Gfx.PrimColor.A);
glProgramEnvParameter4fARB(GL_FRAGMENT_PROGRAM_ARB, 2, Gfx.PrimColor.L, Gfx.PrimColor.L, Gfx.PrimColor.L, Gfx.PrimColor.L);
}
}
void RDP_SetConvert( u32 w0, u32 w1 )
{
gDPSetConvert( _SHIFTR( w0, 13, 9 ), // k0
_SHIFTR( w0, 4, 9 ), // k1
_SHIFTL( w0, 5, 4 ) | _SHIFTR( w1, 25, 5 ), // k2
_SHIFTR( w1, 18, 9 ), // k3
_SHIFTR( w1, 9, 9 ), // k4
_SHIFTR( w1, 0, 9 ) ); // k5
}
u32 DSP_ReadCPUtoDSP()
{
u32 cpu_dsp;
cpu_dsp = (_SHIFTL(_dspReg[0],16,16)|(_dspReg[1]&0xffff));
#ifdef _DSP_DEBUG
printf("DSP_ReadCPUtoDSP(%08x)\n",cpu_dsp);
#endif
return cpu_dsp;
}
u32 DSP_ReadMailFrom()
{
u32 mail;
mail = (_SHIFTL(_dspReg[2],16,16)|(_dspReg[3]&0xffff));
#ifdef _DSP_DEBUG
printf("DSP_ReadMailFrom(%08x)\n",mail);
#endif
return mail;
}
static int __usb_sendbyte(s32 chn,char ch)
{
s32 ret;
u16 val;
val = (0xB000|_SHIFTL(ch,4,8));
ret = __send_command(chn,&val);
if(ret==1 && !(val&0x0400)) ret = 0;
return ret;
}
void AR_StartDMA(u32 dir,u32 memaddr,u32 aramaddr,u32 len)
{
u32 level;
_CPU_ISR_Disable(level);
// set main memory address
_dspReg[16] = (_dspReg[16]&~0x03ff)|_SHIFTR(memaddr,16,16);
_dspReg[17] = (_dspReg[17]&~0xffe0)|_SHIFTR(memaddr, 0,16);
// set aram address
_dspReg[18] = (_dspReg[18]&~0x03ff)|_SHIFTR(aramaddr,16,16);
_dspReg[19] = (_dspReg[19]&~0xffe0)|_SHIFTR(aramaddr, 0,16);
// set cntrl bits
_dspReg[20] = (_dspReg[20]&~0x8000)|_SHIFTL(dir,15,1);
_dspReg[20] = (_dspReg[20]&~0x03ff)|_SHIFTR(len,16,16);
_dspReg[21] = (_dspReg[21]&~0xffe0)|_SHIFTR(len, 0,16);
_CPU_ISR_Restore(level);
}
static INLINE void __viSetSDA(u32 channel)
{
u32 val = (_i2cReg[48]&~0x8000);
val |= _SHIFTL(channel,15,1);
_i2cReg[48] = val;
}
static INLINE void __viOpenI2C(u32 channel)
{
u32 val = ((_i2cReg[49]&~0x8000)|0x4000);
val |= _SHIFTL(channel,15,1);
_i2cReg[49] = val;
}
static inline void __viSetSCL(u32 channel)
{
u32 val = (_i2cReg[48]&~0x4000);
val |= _SHIFTL(channel,14,1);
_i2cReg[48] = val;
}
