void esp_mpi_release_hardware( void )
{
REG_SET_BIT(DPORT_RSA_PD_CTRL_REG, DPORT_RSA_PD);
/* don't reset digital signature unit, as this resets AES also */
REG_SET_BIT(DPORT_PERI_RST_EN_REG, DPORT_PERI_EN_RSA);
REG_CLR_BIT(DPORT_PERI_CLK_EN_REG, DPORT_PERI_EN_RSA);
_lock_release(&mpi_lock);
}
void torc_waitall3()
{
torc_t *self = _torc_self();
int remdeps;
_lock_acquire (&self->lock);
--self->ndep;
_lock_release (&self->lock);
while (1)
{
_lock_acquire (&self->lock);
remdeps = self->ndep;
_lock_release (&self->lock);
if (remdeps == 0)
break;
else {
thread_sleep(0);
//usleep(1*1000);
//sched_yield();
}
}
}
esp_err_t esp_phy_rf_deinit(void)
{
assert((s_phy_rf_init_count <= 2) && (s_phy_rf_init_count >= 1));
_lock_acquire(&s_phy_rf_init_lock);
if (s_phy_rf_init_count == 1) {
// Disable PHY and RF.
phy_close_rf();
// Disable WiFi/BT common peripheral clock. Do not disable clock for hardware RNG
periph_module_disable(PERIPH_WIFI_BT_COMMON_MODULE);
} else {
#if CONFIG_SW_COEXIST_ENABLE
coex_deinit();
#endif
}
s_phy_rf_init_count--;
_lock_release(&s_phy_rf_init_lock);
return ESP_OK;
}
esp_err_t esp_phy_rf_init(const esp_phy_init_data_t* init_data,
esp_phy_calibration_mode_t mode, esp_phy_calibration_data_t* calibration_data)
{
assert((s_phy_rf_init_count <= 1) && (s_phy_rf_init_count >= 0));
_lock_acquire(&s_phy_rf_init_lock);
if (s_phy_rf_init_count == 0) {
// Enable WiFi/BT common peripheral clock
periph_module_enable(PERIPH_WIFI_BT_COMMON_MODULE);
ESP_LOGV(TAG, "register_chipv7_phy, init_data=%p, cal_data=%p, mode=%d",
init_data, calibration_data, mode);
phy_set_wifi_mode_only(0);
register_chipv7_phy(init_data, calibration_data, mode);
coex_bt_high_prio();
} else {
#if CONFIG_SW_COEXIST_ENABLE
coex_init();
#endif
}
s_phy_rf_init_count++;
_lock_release(&s_phy_rf_init_lock);
return ESP_OK;
}
void torc_task_detached(int queue, void (*work)(), int narg, ...)
{
va_list ap;
int i;
torc_t * rte;
// torc_t *self = _torc_self();
#if 0
/* Check if rte_init has been called */
_lock_acquire(&self->lock);
if (self->ndep == 0) self->ndep = 1;
_lock_release(&self->lock);
_torc_depadd(self, 1);
#endif
rte = _torc_get_reused_desc();
_initialize(rte);
_torc_set_work_routine(rte, work);
rte->narg = narg;
rte->rte_type = 1; /* external */
rte->inter_node = 1;
#if 0
rte->parent = self;
#else
rte->parent = NULL;
#endif
// rte->level = self->level + 1;
// rte->level = self->level;
rte->level = 0;
#if 0 //def TORC_STATS
if (!invisible_flag)
created[self->vp_id]++;
if (invisible_flag)
rte->rte_type = 2; /* invisible */
#endif
if (narg>MAX_TORC_ARGS) Error("narg > MAX_TORC_ARGS");
va_start(ap, narg);
for (i=0; i<narg; i++) {
rte->quantity[i] = va_arg (ap, int);
rte->dtype[i] = va_arg (ap, MPI_Datatype);
#if 1
rte->btype[i] = _torc_mpi2b_type(rte->dtype[i]);
#endif
rte->callway[i] = va_arg (ap, int);
if ((rte->callway[i] == CALL_BY_COP)&&(rte->quantity[i] > 1))
rte->callway[i] = CALL_BY_COP2;
#if DBG
printf("ARG %d : Q = %d, T = %d, C = %x O\n", i, rte->quantity[i], rte->dtype[i], rte->callway[i]); fflush(0);
#endif
}
for (i=0; i<narg; i++) {
if (rte->quantity[i] == 0) { // peh: 02.07.2015
VIRT_ADDR dummy = va_arg (ap, VIRT_ADDR);
continue;
}
if (rte->callway[i] == CALL_BY_COP) {
int typesize;
MPI_Type_size(rte->dtype[i], &typesize);
switch (typesize) {
case 4:
rte->localarg[i] = *va_arg (ap, INT32 *);
break;
case 8:
rte->localarg[i] = *va_arg (ap, INT64 *);
break;
default:
Error("typesize not 4 or 8!");
break;
}
}
else if (rte->callway[i] == CALL_BY_COP2) {
