/*TASK---------------------------------------------------------------
*
* Task Name : LWSemB
* Comments :
*
*END*--------------------------------------------------------------*/
void LWSemB
(
uint32_t parameter
)
{
_mqx_uint sem_result;
while ( TRUE ) {
/* wait for lw semaphore until it is available */
sem_result = _lwsem_wait_ticks(&lwsem, NO_TIMEOUT);
if (sem_result != MQX_OK) {
/* waiting on semaphore sem.Sem1 failed */
}
/* semaphore obtained, perform work */
_time_delay_ticks(1);
/* semaphore protected work done, release semaphore */
sem_result = _lwsem_post(&lwsem);
}
}
_mqx_uint _mmu_destroy_vcontext
(
/* [IN] the task for which a virtual context is to be removed */
_task_id task_id
)
{ /* Body */
KERNEL_DATA_STRUCT_PTR kernel_data;
TD_STRUCT_PTR td_ptr;
PSP_VIRTUAL_CONTEXT_STRUCT_PTR context_ptr;
PSP_PAGE_INFO_STRUCT_PTR mem_ptr;
PSP_SUPPORT_STRUCT_PTR psp_support_ptr;
_GET_KERNEL_DATA(kernel_data);
psp_support_ptr = kernel_data->PSP_SUPPORT_PTR;
td_ptr = _task_get_td(task_id);
if (td_ptr == NULL) {
return(MQX_INVALID_TASK_ID);
}/* Endif */
_int_disable();
if ((td_ptr->FLAGS & TASK_MMU_CONTEXT_EXISTS) == 0) {
_int_enable();
return(MQX_MMU_CONTEXT_DOES_NOT_EXIST);
} /* Endif */
if (td_ptr == kernel_data->ACTIVE_PTR) {
/* Remove task MMU pages from the MMU table */
_mmu_reset_vcontext_internal();
}/* Endif */
td_ptr->FLAGS &= ~TASK_MMU_CONTEXT_EXISTS;
context_ptr = td_ptr->MMU_VIRTUAL_CONTEXT_PTR;
td_ptr->MMU_VIRTUAL_CONTEXT_PTR = NULL;
_lwsem_wait(&psp_support_ptr->VPAGE_FREELIST_LWSEM);
_int_enable();
while (_QUEUE_GET_SIZE(&context_ptr->PAGE_INFO)) {
_QUEUE_DEQUEUE(&context_ptr->PAGE_INFO, mem_ptr);
_QUEUE_ENQUEUE(&psp_support_ptr->VPAGE_FREELIST, &mem_ptr->ELEMENT);
} /* Endwhile */
_lwsem_post(&psp_support_ptr->VPAGE_FREELIST_LWSEM);
_mem_free(context_ptr);
return(MQX_OK);
} /* Endbody */
_mqx_int _io_serial_int_close
(
/* [IN] the file handle for the device being closed */
FILE_DEVICE_STRUCT_PTR fd_ptr
)
{ /* Body */
IO_DEVICE_STRUCT_PTR io_dev_ptr;
IO_SERIAL_INT_DEVICE_STRUCT_PTR int_io_dev_ptr;
_mqx_int result = MQX_OK;
_mqx_int ioctl_val;
io_dev_ptr = fd_ptr->DEV_PTR;
int_io_dev_ptr = (pointer)io_dev_ptr->DRIVER_INIT_PTR;
if (--int_io_dev_ptr->COUNT == 0) {
if (int_io_dev_ptr->DEV_IOCTL != NULL) {
if (fd_ptr->FLAGS & IO_SERIAL_HW_FLOW_CONTROL) {
ioctl_val = IO_SERIAL_RTS;
(*int_io_dev_ptr->DEV_IOCTL)(int_io_dev_ptr->DEV_INFO_PTR, IO_IOCTL_SERIAL_CLEAR_HW_SIGNAL, &ioctl_val);
}
}
if (int_io_dev_ptr->DEV_DEINIT) {
#if MQX_ENABLE_LOW_POWER
_lwsem_wait (&(int_io_dev_ptr->LPM_INFO.LOCK));
#endif
result = (*int_io_dev_ptr->DEV_DEINIT)(int_io_dev_ptr->DEV_INIT_DATA_PTR,
int_io_dev_ptr->DEV_INFO_PTR);
#if MQX_ENABLE_LOW_POWER
_lwsem_post (&(int_io_dev_ptr->LPM_INFO.LOCK));
#endif
} /* Endif */
_mem_free(int_io_dev_ptr->IN_QUEUE);
_mem_free(int_io_dev_ptr->OUT_QUEUE);
_taskq_destroy(int_io_dev_ptr->IN_WAITING_TASKS);
_taskq_destroy(int_io_dev_ptr->OUT_WAITING_TASKS);
} /* Endif */
return(result);
} /* Endbody */
_mqx_int _io_usb_mfs_read
(
/* [IN] the file handle for the device */
MQX_FILE_PTR fd_ptr,
/* [IN] where the outgoing data is store */
char_ptr data_ptr,
/* [IN] the number of bytes to output */
int_32 num
)
{ /* Body */
IO_DEVICE_STRUCT_PTR io_dev_ptr = fd_ptr->DEV_PTR;
IO_USB_MFS_STRUCT_PTR info_ptr =
(IO_USB_MFS_STRUCT_PTR)io_dev_ptr->DRIVER_INIT_PTR;
_mqx_int io_result;
_lwsem_wait(&info_ptr->LWSEM);
io_result = _io_usb_mfs_read_write_sectors_internal(fd_ptr, info_ptr, data_ptr,
(uint_32)num, FALSE);
_lwsem_post(&info_ptr->LWSEM);
return io_result;
} /* Endbody */
/*FUNCTION*-------------------------------------------------------------------
*
* Function Name : _io_usb_mfs_callback
* Returned Value : None
* Comments : This function is called by lowlevel drivers
when a command call back is set
*
*END*----------------------------------------------------------------------*/
void _io_usb_mfs_callback
(
USB_STATUS command_status, /*status of this command*/
pointer p1, /* pointer to USB_MASS_BULK_ONLY_REQUEST_STRUCT*/
pointer p2, /* pointer to the command object*/
uint_32 len /* length of the data transfered if any */
)
{ /* Body */
IO_USB_MFS_STRUCT_PTR info_ptr = (IO_USB_MFS_STRUCT_PTR)p2;
if (command_status == (USB_STATUS)USB_MASS_FAILED_IN_DATA)
info_ptr->COMMAND.CSW_PTR->BCSWSTATUS = CSW_STATUS_FAILED;
if (info_ptr->COMMAND.CSW_PTR->BCSWSTATUS == CSW_STATUS_GOOD) {
info_ptr->COMMAND_STATUS = command_status; /* set the status */
} else {
info_ptr->COMMAND_STATUS = (uint_32)IO_ERROR;
}
_lwsem_post(&info_ptr->COMMAND_DONE);
} /* Endbody */
void read_task
(
uint32_t initial_data
)
{
_task_id task_id;
_mqx_uint result;
_mqx_uint i;
/* Create the lightweight semaphores */
result = _lwsem_create(&fifo.READ_SEM, 0);
if (result != MQX_OK) {
printf("\nCreating read_sem failed: 0x%X", result);
_task_block();
}
result = _lwsem_create(&fifo.WRITE_SEM, 1);
if (result != MQX_OK) {
printf("\nCreating write_sem failed: 0x%X", result);
_task_block();
}
/* Create the write tasks */
for (i = 0; i < NUM_WRITERS; i++) {
task_id = _task_create(0, WRITE_TASK, (uint32_t)('A' + i));
printf("\nwrite_task created, id 0x%lX", task_id);
}
while(TRUE) {
result = _lwsem_wait(&fifo.READ_SEM);
if (result != MQX_OK) {
printf("\n_lwsem_wait failed: 0x%X", result);
_task_block();
}
putchar('\n');
putchar(fifo.DATA);
_lwsem_post(&fifo.WRITE_SEM);
}
}
void pcm_flush_task(uint_32 para)
{
while(1)
{
_lwevent_wait_ticks(&player_event, PLAYER_EVENT_MSK_SONG_RESUME, FALSE, 0);
if (_lwsem_wait(&pcm_decoded_sem) != MQX_OK)
{
LOCALPLAY_LOG("\n pcm_flush : Error - Unable to wait pcm_decoded_sem.");
}
else{
if(gPcmFlushTaskFinish == 1){
break;
}
}
#if 0
if (g_device_ptr == NULL) {
LOCALPLAY_LOG(
"The audio device pointer is NULL. audio_fulsh_task exits. \n");
break;
}
#endif
if(g_audio_buf_ptr != NULL)
put_file_data(g_audio_buf_ptr, g_buf_bytes_to_flush, NULL);
if (_lwsem_post(&pcm_flush_sem) != MQX_OK)
{
//LOCALPLAY_LOG("\n pcm_flush : Error - Unable to post pcmFlush_sem.");
}
}
//LOCALPLAY_LOG("__guoyifang__: pcm_flush_task destroyed.\n");
printf("pcm_flush_task exit.\n");
gPcmFlushTaskFinish = 0;
//_task_block(); //wait for being destroyed
}
void RTCS_msgqueue_send
(
_rtcs_msgqueue *msgq,
void *msg
)
{ /* Body */
/* Wait for an empty slot in the queue */
_lwsem_wait(&msgq->EMPTY);
_int_disable();
/* Dequeue the message */
msgq->QUEUE[msgq->TAIL++] = msg;
if (msgq->TAIL == RTCSMQ_SIZE) {
msgq->TAIL = 0;
} /* Endif */
/* Unblock the receiver */
_int_enable();
_lwsem_post(&msgq->FULL);
} /* Endbody */
_mqx_int _io_serial_int_uninstall
(
/* [IN] The IO device structure for the device */
IO_DEVICE_STRUCT_PTR io_dev_ptr
)
{ /* Body */
IO_SERIAL_INT_DEVICE_STRUCT_PTR int_dev_ptr = io_dev_ptr->DRIVER_INIT_PTR;
if (int_dev_ptr->COUNT == 0) {
if (int_dev_ptr->DEV_DEINIT) {
#if MQX_ENABLE_LOW_POWER
_lwsem_wait (&(int_dev_ptr->LPM_INFO.LOCK));
#endif
(*int_dev_ptr->DEV_DEINIT)(int_dev_ptr->DEV_INIT_DATA_PTR,
int_dev_ptr->DEV_INFO_PTR);
#if MQX_ENABLE_LOW_POWER
_lwsem_post (&(int_dev_ptr->LPM_INFO.LOCK));
#endif
} /* Endif */
_mem_free(int_dev_ptr->IN_QUEUE);
_mem_free(int_dev_ptr->OUT_QUEUE);
_taskq_destroy(int_dev_ptr->IN_WAITING_TASKS);
_taskq_destroy(int_dev_ptr->OUT_WAITING_TASKS);
#if MQX_ENABLE_LOW_POWER
_lpm_unregister_driver (int_dev_ptr->LPM_INFO.REGISTRATION_HANDLE);
_lwsem_destroy (&(int_dev_ptr->LPM_INFO.LOCK));
#endif
_mem_free(int_dev_ptr);
return(IO_OK);
} else {
return(IO_ERROR_DEVICE_BUSY);
} /* Endif */
} /* Endbody */
/*
** ===================================================================
** Event : Task1_task (module mqx_tasks)
**
** Component : Task1 [MQXLite_task]
** Description :
** MQX task routine. The routine is generated into mqx_tasks.c
** file.
** Parameters :
** NAME - DESCRIPTION
** task_init_data -
** Returns : Nothing
** ===================================================================
*/
void Task1_task(uint32_t task_init_data)
{
static float alpha=0.01;
int16 vec[3];
int16 current[3]; //current
int16 previous[3]; //previous
int counter;
int i;
for(;;){
byte c;
Accel_SendChar(0x00);
Accel_RecvChar(&c);
Accel_SendStop();
if (c&&0x01){
for(counter=0;counter<31;counter++){
Accel_SendChar(0x01);
Accel_RecvBlock(&vec, 6, &snt);
Accel_SendStop();
// current[0]=(vec[0]&0x1f - vec[0]&0x20) *256 + vec[1];
// current[1]=(vec[2]&0x1f - vec[2]&0x20) *256 + vec[3];
// current[2]=(vec[4]&0x1f - vec[4]&0x20) *256 + vec[5];
//Term1_SendNum();
for(i=0; i<3; i++){
current[i]=current[i]/2048;
previous[i]= current[i];
}
_lwsem_wait(&i2csem);
for(i=0; i<3; i++){
result[i]= alpha * (float)current[i] + (1-alpha) * (float)previous[i];
}
_lwsem_post(&i2csem);
}
}
_time_delay_ticks(5);
}
}
void *RTCS_msgqueue_receive
(
_rtcs_msgqueue *msgq,
uint32_t timeout
)
{ /* Body */
void *msg;
TIME_STRUCT time;
MQX_TICK_STRUCT ticks;
if (!timeout) {
_lwsem_wait(&msgq->FULL);
} else {
time.SECONDS = timeout/1000;
time.MILLISECONDS = timeout%1000;
if (!_time_to_ticks(&time, &ticks)) {
return NULL;
} /* Endif */
if (_lwsem_wait_for(&msgq->FULL, &ticks) != MQX_OK) {
/* If we have a timeout, return */
return NULL;
} /* Endif */
} /* Endif */
_int_disable();
msg = msgq->QUEUE[msgq->HEAD++];
if (msgq->HEAD == RTCSMQ_SIZE) {
msgq->HEAD = 0;
} /* Endif */
_int_enable();
_lwsem_post(&msgq->EMPTY);
return msg;
} /* Endbody */
void _io_pcb_shm_rx_isr
(
/* [IN] the info structure */
pointer handle
)
{
IO_PCB_SHM_INFO_STRUCT_PTR info_ptr;
IO_PCB_SHM_INIT_STRUCT_PTR init_ptr;
IO_PCB_STRUCT_PTR local_pcb_ptr;
IO_PCB_STRUCT_PTR remote_pcb_ptr;
IO_PCB_FRAGMENT_STRUCT_PTR frag_ptr;
IO_PCB_SHM_BUFFER_STRUCT_PTR bd_ptr;
uchar_ptr data_addr;
uint_32 data_length;
uint_32 cntrl;
uint_16 num_frags;
uint_32 max_size;
boolean discard;
info_ptr = (IO_PCB_SHM_INFO_STRUCT_PTR)handle;
init_ptr = &info_ptr->INIT;
/* Get the next RX buffer descriptor */
bd_ptr = &info_ptr->RX_RING_PTR[info_ptr->RXNEXT];
_DCACHE_INVALIDATE_LINE(bd_ptr);
cntrl = bd_ptr->CONTROL;
remote_pcb_ptr = (IO_PCB_STRUCT_PTR) _bsp_ptov(bd_ptr->PACKET_PTR);
_DCACHE_INVALIDATE_MBYTES(remote_pcb_ptr, sizeof(*remote_pcb_ptr));
num_frags = remote_pcb_ptr->NUMBER_OF_FRAGMENTS;
/* Disable interrupts */
_int_disable();
while(cntrl == (IO_PCB_SHM_BUFFER_OWN|IO_PCB_SHM_BUFFER_ALOCATED)){
discard = FALSE;
/* Get a PCB */
local_pcb_ptr = _io_pcb_alloc(info_ptr->READ_PCB_POOL, FALSE);
if ((local_pcb_ptr == NULL)) {
break;
}
data_addr = local_pcb_ptr->FRAGMENTS[0].FRAGMENT;
data_length = ((IO_PCB_SHM_INIT_STRUCT_PTR) &info_ptr->INIT)->INPUT_MAX_LENGTH;
max_size = ((IO_PCB_SHM_INIT_STRUCT_PTR) &info_ptr->INIT)->INPUT_MAX_LENGTH;
/* Copy packet */
for(frag_ptr = (IO_PCB_FRAGMENT_STRUCT_PTR) &(remote_pcb_ptr->FRAGMENTS[0]); num_frags; num_frags--, frag_ptr++)
{
if(frag_ptr->LENGTH > max_size){
discard = TRUE;
break;
}
_DCACHE_INVALIDATE_MBYTES(frag_ptr->FRAGMENT, frag_ptr->LENGTH);
_mem_copy(_bsp_ptov((pointer)frag_ptr->FRAGMENT), (pointer)data_addr, frag_ptr->LENGTH);
data_addr += frag_ptr->LENGTH;
data_length -= frag_ptr->LENGTH;
}
local_pcb_ptr->FRAGMENTS[0].LENGTH = max_size - data_length;
if (info_ptr->READ_CALLBACK_FUNCTION) {
(*info_ptr->READ_CALLBACK_FUNCTION)(info_ptr->FD,
local_pcb_ptr);
} else {
_queue_enqueue((QUEUE_STRUCT_PTR)&info_ptr->READ_QUEUE,
(QUEUE_ELEMENT_STRUCT_PTR)&local_pcb_ptr->QUEUE);
_lwsem_post(&info_ptr->READ_LWSEM);
}
/* Set the buffer pointer and control bits */
bd_ptr->CONTROL &= IO_PCB_SHM_BUFFER_ALOCATED;
_DCACHE_FLUSH_LINE(bd_ptr);
/* Update Info structure */
info_ptr->RXNEXT = NEXT_INDEX(info_ptr->RXNEXT, info_ptr->RX_LENGTH);
info_ptr->RXENTRIES--;
/* Get the next RX buffer descriptor */
bd_ptr = &info_ptr->RX_RING_PTR[info_ptr->RXNEXT];
_DCACHE_INVALIDATE_LINE(bd_ptr);
cntrl = bd_ptr->CONTROL;
remote_pcb_ptr = (IO_PCB_STRUCT_PTR) _bsp_ptov(bd_ptr->PACKET_PTR);
_DCACHE_INVALIDATE_MBYTES(remote_pcb_ptr, sizeof(*remote_pcb_ptr));
num_frags = remote_pcb_ptr->NUMBER_OF_FRAGMENTS;
}
if (init_ptr->TX_VECTOR == 0) {
_io_pcb_shm_tx_isr(handle);
}
/* Reception successful */
if (!discard) {
/* Trigger remote side */
(*init_ptr->INT_TRIGGER)(init_ptr->REMOTE_TX_VECTOR);
}
_int_enable();
}
_mqx_int _io_pcb_mqxa_ioctl
(
/* [IN] the file handle for the device */
FILE_DEVICE_STRUCT_PTR fd_ptr,
/* [IN] the ioctl command */
_mqx_uint cmd,
/* [IN] the ioctl parameters */
pointer param_ptr
)
{ /* Body */
TASK_TEMPLATE_STRUCT input_tt =
{ 0, _io_pcb_mqxa_read_task, IO_PCB_MQXA_STACK_SIZE, 0,
"io_pcb_mqxa_read_task", 0, 0, 0};
TASK_TEMPLATE_STRUCT output_tt =
{ 0, _io_pcb_mqxa_write_task, IO_PCB_MQXA_STACK_SIZE, 0,
"io_pcb_mqxa_write_task", 0, 0, 0};
IO_PCB_MQXA_INFO_STRUCT_PTR info_ptr;
IO_PCB_STRUCT_PTR pcb_ptr;
_mqx_uint result = MQX_OK;
_psp_code_addr old_value;
_psp_code_addr_ptr pc_ptr = (_psp_code_addr_ptr)param_ptr;
_psp_data_addr_ptr pd_ptr = (_psp_data_addr_ptr)param_ptr;
boolean _PTR_ bool_param_ptr;
info_ptr = (IO_PCB_MQXA_INFO_STRUCT_PTR)fd_ptr->DEV_DATA_PTR;
switch (cmd) {
case IO_PCB_IOCTL_ENQUEUE_READQ:
pcb_ptr = (IO_PCB_STRUCT_PTR)*pd_ptr;
_queue_enqueue((QUEUE_STRUCT_PTR)&info_ptr->READ_QUEUE,
(QUEUE_ELEMENT_STRUCT_PTR)&pcb_ptr->QUEUE);
_lwsem_post(&info_ptr->READ_LWSEM);
break;
case IO_PCB_IOCTL_READ_CALLBACK_SET:
old_value = (_psp_code_addr)info_ptr->READ_CALLBACK_FUNCTION;
/* Start CR 398 */
info_ptr->CALLBACK_FD = fd_ptr;
/* End CR */
info_ptr->READ_CALLBACK_FUNCTION = (void (_CODE_PTR_)(
FILE_DEVICE_STRUCT_PTR, IO_PCB_STRUCT_PTR))*pc_ptr;
*pc_ptr = old_value;
break;
case IO_PCB_IOCTL_SET_INPUT_POOL:
old_value = (_psp_code_addr)info_ptr->READ_PCB_POOL;
info_ptr->READ_PCB_POOL = (_io_pcb_pool_id)*pc_ptr;
*pc_ptr = old_value;
break;
case IO_PCB_IOCTL_START:
if (info_ptr->INPUT_TASK == MQX_NULL_TASK_ID) {
input_tt.TASK_PRIORITY = info_ptr->INIT.INPUT_TASK_PRIORITY;
input_tt.CREATION_PARAMETER = (uint_32)info_ptr;
output_tt.TASK_PRIORITY = info_ptr->INIT.OUTPUT_TASK_PRIORITY;
output_tt.CREATION_PARAMETER = (uint_32)info_ptr;
info_ptr->INPUT_TASK = _task_create(0, 0, (uint_32)&input_tt);
if (info_ptr->INPUT_TASK == MQX_NULL_TASK_ID){
return(_task_get_error());
} /* Endif */
info_ptr->OUTPUT_TASK = _task_create(0, 0, (uint_32)&output_tt);
if (info_ptr->OUTPUT_TASK == MQX_NULL_TASK_ID){
return(_task_get_error());
} /* Endif */
}/* Endif */
break;
case IO_PCB_IOCTL_UNPACKED_ONLY:
bool_param_ptr = (boolean _PTR_)param_ptr;
*bool_param_ptr = TRUE;
break;
default:
result = _io_ioctl(info_ptr->FD, cmd, param_ptr);
break;
} /* Endswitch */
return result;
} /* Endbody */
static void PPP_linkdown (pointer lwsem)
{
PPP_link = FALSE;
_lwsem_post(lwsem);
printf( " PPP link Off \n");
}
static void _dspi_em9301_isr(void *parameter)
{
SPI_DRIVER_DATA_STRUCT_PTR driver_data= parameter;
lwgpio_int_clear_flag(&driver_data->SPI_IRQ_PIN);
_lwsem_post(&driver_data->IRQ_SEM);
}
void main_task
(
uint_32 dummy
)
{
MQX_FILE_PTR fd;
uint_32 i, j;
_mqx_int param, result;
I2C_STATISTICS_STRUCT stats;
uchar_ptr buffer;
/* I2C transaction lock */
_lwsem_create (&lock, 1);
/* Allocate receive buffer */
buffer = _mem_alloc_zero (BUFFER_SIZE);
if (buffer == NULL)
{
printf ("ERROR getting receive buffer!\n");
_task_block ();
}
printf ("\n\n-------------- Polled I2C master example --------------\n\n");
/* Open the I2C driver */
fd = fopen (I2C_DEVICE_POLLED, NULL);
if (fd == NULL)
{
printf ("ERROR opening the I2C driver!\n");
_task_block ();
}
/* Test ioctl commands */
param = 100000;
printf ("Set current baud rate to %d ... ", param);
if (I2C_OK == ioctl (fd, IO_IOCTL_I2C_SET_BAUD, ¶m))
{
printf ("OK\n");
} else {
printf ("ERROR\n");
}
printf ("Get current baud rate ... ");
if (I2C_OK == ioctl (fd, IO_IOCTL_I2C_GET_BAUD, ¶m))
{
printf ("%d\n", param);
} else {
printf ("ERROR\n");
}
printf ("Set master mode ... ");
if (I2C_OK == ioctl (fd, IO_IOCTL_I2C_SET_MASTER_MODE, NULL))
{
printf ("OK\n");
} else {
printf ("ERROR\n");
}
printf ("Get current mode ... ");
if (I2C_OK == ioctl (fd, IO_IOCTL_I2C_GET_MODE, ¶m))
{
printf ("0x%02x\n", param);
} else {
printf ("ERROR\n");
}
param = 0x60;
printf ("Set station address to 0x%02x ... ", param);
if (I2C_OK == ioctl (fd, IO_IOCTL_I2C_SET_STATION_ADDRESS, ¶m))
{
printf ("OK\n");
} else {
printf ("ERROR\n");
}
param = 0x00;
printf ("Get station address ... ");
if (I2C_OK == ioctl (fd, IO_IOCTL_I2C_GET_STATION_ADDRESS, ¶m))
{
printf ("0x%02x\n", param);
} else {
printf ("ERROR\n");
}
printf ("Clear statistics ... ");
if (I2C_OK == ioctl (fd, IO_IOCTL_I2C_CLEAR_STATISTICS, NULL))
{
printf ("OK\n");
} else {
printf ("ERROR\n");
}
printf ("Get statistics ... ");
if (I2C_OK == ioctl (fd, IO_IOCTL_I2C_GET_STATISTICS, (pointer)&stats))
{
printf ("OK\n Interrupts: %d\n", stats.INTERRUPTS);
printf (" Rx packets: %d\n", stats.RX_PACKETS);
printf (" Tx packets: %d\n", stats.TX_PACKETS);
printf (" Tx lost arb: %d\n", stats.TX_LOST_ARBITRATIONS);
printf (" Tx as slave: %d\n", stats.TX_ADDRESSED_AS_SLAVE);
printf (" Tx naks: %d\n", stats.TX_NAKS);
} else {
printf ("ERROR\n");
}
printf ("Get current state ... ");
if (I2C_OK == ioctl (fd, IO_IOCTL_I2C_GET_STATE, ¶m))
{
printf ("0x%02x\n", param);
} else {
printf ("ERROR\n");
}
param = I2C_EEPROM_BUS_ADDRESS;
printf ("Set destination address to 0x%02x ... ", param);
if (I2C_OK == ioctl (fd, IO_IOCTL_I2C_SET_DESTINATION_ADDRESS, ¶m))
{
printf ("OK\n");
} else {
printf ("ERROR\n");
}
param = 0x00;
printf ("Get destination address ... ");
if (I2C_OK == ioctl (fd, IO_IOCTL_I2C_GET_DESTINATION_ADDRESS, ¶m))
{
printf ("0x%02x\n", param);
} else {
printf ("ERROR\n");
}
/* Test EEPROM communication */
i2c_write_eeprom_polled (fd, I2C_EEPROM_MEMORY_ADDRESS1, (uchar_ptr)TEST_STRING, 0);
i2c_read_eeprom_polled (fd, I2C_EEPROM_MEMORY_ADDRESS1, buffer, 0);
i2c_write_eeprom_polled (fd, I2C_EEPROM_MEMORY_ADDRESS1, (uchar_ptr)TEST_STRING, 1);
i2c_read_eeprom_polled (fd, I2C_EEPROM_MEMORY_ADDRESS1, buffer, 1);
printf ("Received: %c (0x%02x)\n", buffer[0], buffer[0]);
if (buffer[0] != TEST_STRING[0])
{
printf ("ERROR\n");
_task_block ();
}
_mem_zero (buffer, BUFFER_SIZE);
i2c_write_eeprom_polled (fd, I2C_EEPROM_MEMORY_ADDRESS1, buffer, sizeof(TEST_STRING));
i2c_read_eeprom_polled (fd, I2C_EEPROM_MEMORY_ADDRESS1, buffer, sizeof(TEST_STRING));
for (result = 0; result < BUFFER_SIZE; result++)
{
if (0 != buffer[result])
{
printf ("\nERROR during memory clearing\n");
_task_block ();
}
}
i2c_write_eeprom_polled (fd, I2C_EEPROM_MEMORY_ADDRESS1, (uchar_ptr)TEST_STRING, sizeof(TEST_STRING));
i2c_read_eeprom_polled (fd, I2C_EEPROM_MEMORY_ADDRESS1, buffer, sizeof(TEST_STRING));
printf ("Received: ");
for (result = 0; result < sizeof(TEST_STRING); result++)
{
printf ("%c", buffer[result]);
if (buffer[result] != TEST_STRING[result])
{
printf ("\nERROR\n");
_task_block ();
}
}
printf ("\n");
/* Test special cases: write 1 byte (address pointer), read 1 byte (dump memory) */
_lwsem_wait (&lock);
buffer[0] = 0;
buffer[1] = 0;
fwrite (buffer, 1, I2C_EEPROM_MEMORY_WIDTH, fd);
if (I2C_OK != ioctl (fd, IO_IOCTL_FLUSH_OUTPUT, NULL))
{
printf ("\nERROR during flush\n");
}
if (I2C_OK != ioctl (fd, IO_IOCTL_I2C_STOP, NULL))
{
printf ("\nERROR during stop\n");
}
printf ("\nMemory dump:\n");
for (i = 0; i < 16; i++)
{
for (j = 0; j < 16; j++)
{
_time_delay (1);
param = 1;
if (I2C_OK != ioctl (fd, IO_IOCTL_I2C_SET_RX_REQUEST, ¶m))
{
printf ("\nERROR during set rx request\n");
}
fread (&(buffer[j]), 1, 1, fd);
if (I2C_OK != ioctl (fd, IO_IOCTL_I2C_STOP, NULL))
{
printf ("\nERROR during stop\n");
}
}
printf ("0x%02x: ", i * 16);
for (j = 0; j < 16; j++)
{
printf ("%02x ", buffer[j]);
}
for (j = 0; j < 16; j++)
{
if ((32 <= buffer[j]) && (buffer[j] <= 128))
{
printf ("%c", buffer[j]);
}
else
{
printf (".");
}
}
printf ("\n");
}
_lwsem_post (&lock);
printf ("\nGet statistics ... ");
if (I2C_OK == ioctl (fd, IO_IOCTL_I2C_GET_STATISTICS, (pointer)&stats))
{
printf ("OK\n Interrupts: %d\n", stats.INTERRUPTS);
printf (" Rx packets: %d\n", stats.RX_PACKETS);
printf (" Tx packets: %d\n", stats.TX_PACKETS);
printf (" Tx lost arb: %d\n", stats.TX_LOST_ARBITRATIONS);
printf (" Tx as slave: %d\n", stats.TX_ADDRESSED_AS_SLAVE);
printf (" Tx naks: %d\n", stats.TX_NAKS);
} else {
printf ("ERROR\n");
}
printf ("Get current state ... ");
if (I2C_OK == ioctl (fd, IO_IOCTL_I2C_GET_STATE, ¶m))
{
printf ("0x%02x\n", param);
} else {
printf ("ERROR\n");
}
/* Close the driver */
result = fclose (fd);
if (result)
{
printf ("ERROR during close, returned: %d\n", result);
}
#if ENABLE_I2C_INTERRUPT
printf ("\n\n-------------- Interrupt I2C master example --------------\n\n");
/* Open the I2C driver */
fd = fopen (I2C_DEVICE_INTERRUPT, NULL);
if (fd == NULL)
{
printf ("Failed to open the I2C driver!\n");
_task_block ();
}
/* Test ioctl commands */
printf ("Get current baud rate ... ");
if (I2C_OK == ioctl (fd, IO_IOCTL_I2C_GET_BAUD, ¶m))
{
printf ("%d\n", param);
} else {
printf ("ERROR\n");
}
printf ("Set master mode ... ");
if (I2C_OK == ioctl (fd, IO_IOCTL_I2C_SET_MASTER_MODE, NULL))
{
printf ("OK\n");
} else {
printf ("ERROR\n");
}
printf ("Get current mode ... ");
if (I2C_OK == ioctl (fd, IO_IOCTL_I2C_GET_MODE, ¶m))
{
printf ("0x%02x\n", param);
} else {
printf ("ERROR\n");
}
param = 0x60;
printf ("Set station address to 0x%02x ... ", param);
if (I2C_OK == ioctl (fd, IO_IOCTL_I2C_SET_STATION_ADDRESS, ¶m))
{
printf ("OK\n");
} else {
printf ("ERROR\n");
}
param = 0x00;
printf ("Get station address ... ");
if (I2C_OK == ioctl (fd, IO_IOCTL_I2C_GET_STATION_ADDRESS, ¶m))
{
printf ("0x%02x\n", param);
} else {
printf ("ERROR\n");
}
printf ("Clear statistics ... ");
if (I2C_OK == ioctl (fd, IO_IOCTL_I2C_CLEAR_STATISTICS, NULL))
{
printf ("OK\n");
} else {
printf ("ERROR\n");
}
printf ("Get statistics ... ");
if (I2C_OK == ioctl (fd, IO_IOCTL_I2C_GET_STATISTICS, (pointer)&stats))
{
printf ("OK\n Interrupts: %d\n", stats.INTERRUPTS);
printf (" Rx packets: %d\n", stats.RX_PACKETS);
printf (" Tx packets: %d\n", stats.TX_PACKETS);
printf (" Tx lost arb: %d\n", stats.TX_LOST_ARBITRATIONS);
printf (" Tx as slave: %d\n", stats.TX_ADDRESSED_AS_SLAVE);
printf (" Tx naks: %d\n", stats.TX_NAKS);
} else {
printf ("ERROR\n");
}
printf ("Get current state ... ");
if (I2C_OK == ioctl (fd, IO_IOCTL_I2C_GET_STATE, ¶m))
{
printf ("0x%02x\n", param);
} else {
printf ("ERROR\n");
}
param = I2C_EEPROM_BUS_ADDRESS;
printf ("Set destination address to 0x%02x ... ", param);
if (I2C_OK == ioctl (fd, IO_IOCTL_I2C_SET_DESTINATION_ADDRESS, ¶m))
{
printf ("OK\n");
} else {
printf ("ERROR\n");
}
param = 0x00;
printf ("Get destination address ... ");
if (I2C_OK == ioctl (fd, IO_IOCTL_I2C_GET_DESTINATION_ADDRESS, ¶m))
{
printf ("0x%02x\n", param);
} else {
printf ("ERROR\n");
}
/* Test EEPROM communication */
i2c_write_eeprom_interrupt (fd, I2C_EEPROM_MEMORY_ADDRESS2, (uchar_ptr)TEST_STRING, 0);
i2c_read_eeprom_interrupt (fd, I2C_EEPROM_MEMORY_ADDRESS2, buffer, 0);
i2c_write_eeprom_interrupt (fd, I2C_EEPROM_MEMORY_ADDRESS2, (uchar_ptr)TEST_STRING, 1);
i2c_read_eeprom_interrupt (fd, I2C_EEPROM_MEMORY_ADDRESS2, buffer, 1);
printf ("Received: %c (0x%02x)\n", buffer[0], buffer[0]);
if (buffer[0] != TEST_STRING[0])
{
printf ("ERROR\n");
_task_block ();
}
_mem_zero (buffer, BUFFER_SIZE);
i2c_write_eeprom_interrupt (fd, I2C_EEPROM_MEMORY_ADDRESS2, buffer, sizeof(TEST_STRING));
i2c_read_eeprom_interrupt (fd, I2C_EEPROM_MEMORY_ADDRESS2, buffer, sizeof(TEST_STRING));
for (result = 0; result < BUFFER_SIZE; result++)
{
if (0 != buffer[result])
{
printf ("\nERROR during memory clearing\n");
_task_block ();
}
}
i2c_write_eeprom_interrupt (fd, I2C_EEPROM_MEMORY_ADDRESS2, (uchar_ptr)TEST_STRING, sizeof(TEST_STRING));
i2c_read_eeprom_interrupt (fd, I2C_EEPROM_MEMORY_ADDRESS2, buffer, sizeof(TEST_STRING));
printf ("Received: ");
for (result = 0; result < sizeof(TEST_STRING); result++)
{
printf ("%c", buffer[result]);
if (buffer[result] != TEST_STRING[result])
{
printf ("\nERROR\n");
_task_block ();
}
}
printf ("\n");
/* Test special cases: write 1 byte (address pointer), read 1 byte (dump memory) */
_lwsem_wait (&lock);
buffer[0] = 0;
buffer[1] = 0;
fwrite (buffer, 1, I2C_EEPROM_MEMORY_WIDTH, fd);
if (I2C_OK != ioctl (fd, IO_IOCTL_FLUSH_OUTPUT, NULL))
{
printf ("\nERROR during flush\n");
}
if (I2C_OK != ioctl (fd, IO_IOCTL_I2C_STOP, NULL))
{
printf ("\nERROR during stop\n");
}
printf ("\nMemory dump:\n");
for (i = 0; i < 16; i++)
{
for (j = 0; j < 16; j++)
{
_time_delay (1);
param = 1;
if (I2C_OK != ioctl (fd, IO_IOCTL_I2C_SET_RX_REQUEST, ¶m))
{
printf ("\nERROR during set rx request\n");
}
do
{
result = fread (&(buffer[j]), 1, 1, fd);
} while (0 == result);
if (I2C_OK != ioctl (fd, IO_IOCTL_I2C_STOP, NULL))
{
printf ("\nERROR during stop\n");
}
}
printf ("0x%02x: ", i * 16);
for (j = 0; j < 16; j++)
{
printf ("%02x ", buffer[j]);
}
for (j = 0; j < 16; j++)
{
if ((32 <= buffer[j]) && (buffer[j] <= 128))
{
printf ("%c", buffer[j]);
}
else
{
printf (".");
}
}
printf ("\n");
}
_lwsem_post (&lock);
printf ("\nGet statistics ... ");
if (I2C_OK == ioctl (fd, IO_IOCTL_I2C_GET_STATISTICS, (pointer)&stats))
{
printf ("OK\n Interrupts: %d\n", stats.INTERRUPTS);
printf (" Rx packets: %d\n", stats.RX_PACKETS);
printf (" Tx packets: %d\n", stats.TX_PACKETS);
printf (" Tx lost arb: %d\n", stats.TX_LOST_ARBITRATIONS);
printf (" Tx as slave: %d\n", stats.TX_ADDRESSED_AS_SLAVE);
printf (" Tx naks: %d\n", stats.TX_NAKS);
} else {
printf ("ERROR\n");
}
printf ("Get current state ... ");
if (I2C_OK == ioctl (fd, IO_IOCTL_I2C_GET_STATE, ¶m))
{
printf ("0x%02x\n", param);
} else {
printf ("ERROR\n");
}
/* Close the driver */
result = fclose (fd);
if (result)
{
printf ("ERROR during close, returned: %d\n", result);
}
#endif
/* Free transation lock */
_lwsem_destroy (&lock);
/* Free buffer */
_mem_free (buffer);
printf("Example finished.\n");
_task_block();
} /* Endbody */
/*!
* \brief Creates the message component.
*
* The function uses fields in the MQX initialization structure to create the
* number of message pools (MAX_MSGPOOLS) and message queues (MAX_MSGQS). MQX
* creates the message component if it is not created when an application calls
* one of:
* \li _msgpool_create()
* \li _msgpool_create_system()
* \li _msgq_open()
* \li _msgq_open_system()
*
* \return MQX_OK
* \return MQX_OUT_OF_MEMORY (MQX is out of memory.)
* \return MSGPOOL_POOL_NOT_CREATED (MQX cannot allocate the data structures for
* message pools.)
* \return MSGQ_TOO_MANY_QUEUES (MQX cannot allocate the data structures for
* message queues.)
* \return MQX_CANNOT_CALL_FUNCTION_FROM_ISR (Function cannot be called from an ISR.)
* \return MQX_INVALID_LWSEM (Sem_ptr is for a lightweight semaphore that is not
* longer valid.)
* \return MQX_LWSEM_WAIT_TIMEOUT (Timeout expired before the task could get the
* lightweight semaphore.)
*/
_mqx_uint _msg_create_component(void)
{ /* Body */
KERNEL_DATA_STRUCT_PTR kernel_data;
register MSG_COMPONENT_STRUCT_PTR msg_component_ptr;
pointer pools_ptr;
pointer msgqs_ptr;
_mqx_uint error;
_GET_KERNEL_DATA(kernel_data);
_KLOGE1(KLOG_msg_create_component);
error = _lwsem_wait((LWSEM_STRUCT_PTR)&kernel_data->COMPONENT_CREATE_LWSEM);
#if MQX_CHECK_ERRORS
if (error != MQX_OK)
{
_KLOGX2(KLOG_msg_create_component, error);
return(error);
} /* Endif */
#endif
if (kernel_data->KERNEL_COMPONENTS[KERNEL_MESSAGES] != NULL)
{
_lwsem_post((LWSEM_STRUCT_PTR)&kernel_data->COMPONENT_CREATE_LWSEM);
_KLOGX2(KLOG_msg_create_component, MQX_OK);
return(MQX_OK);
} /* Endif */
msg_component_ptr = (MSG_COMPONENT_STRUCT_PTR)
_mem_alloc_system_zero((_mem_size)sizeof(MSG_COMPONENT_STRUCT));
#if MQX_CHECK_MEMORY_ALLOCATION_ERRORS
if (msg_component_ptr == NULL)
{
_lwsem_post((LWSEM_STRUCT_PTR)&kernel_data->COMPONENT_CREATE_LWSEM);
_KLOGX2(KLOG_msg_create_component, MQX_OUT_OF_MEMORY);
return(MQX_OUT_OF_MEMORY);
} /* Endif */
#endif
_mem_set_type(msg_component_ptr, MEM_TYPE_MESSAGE_COMPONENT);
if (kernel_data->INIT.MAX_MSGPOOLS == 0)
{
kernel_data->INIT.MAX_MSGPOOLS = 1;
} /* Endif */
pools_ptr = _mem_alloc_system_zero((_mem_size)(kernel_data->INIT.MAX_MSGPOOLS *
sizeof(MSGPOOL_STRUCT)));
#if MQX_CHECK_MEMORY_ALLOCATION_ERRORS
if (pools_ptr == NULL)
{
_lwsem_post((LWSEM_STRUCT_PTR)&kernel_data->COMPONENT_CREATE_LWSEM);
_KLOGX2(KLOG_msg_create_component, MSGPOOL_POOL_NOT_CREATED);
return MSGPOOL_POOL_NOT_CREATED;
}/* Endif */
#endif
_mem_set_type(pools_ptr, MEM_TYPE_MESSAGE_POOLS);
if (kernel_data->INIT.MAX_MSGQS >= MAX_UINT_16)
{
kernel_data->INIT.MAX_MSGQS = MAX_UINT_16 - 1;
}
else if (kernel_data->INIT.MAX_MSGQS < 1)
{
kernel_data->INIT.MAX_MSGQS = 1;
} /* Endif */
msgqs_ptr = _mem_alloc_system_zero( (_mem_size)((kernel_data->INIT.MAX_MSGQS + 1) *
sizeof(MSGQ_STRUCT)));
#if MQX_CHECK_MEMORY_ALLOCATION_ERRORS
if (msgqs_ptr == NULL)
{
_lwsem_post((LWSEM_STRUCT_PTR)&kernel_data->COMPONENT_CREATE_LWSEM);
_mem_free(pools_ptr);
_KLOGX2(KLOG_msg_create_component, MSGQ_TOO_MANY_QUEUES);
return MSGQ_TOO_MANY_QUEUES;
} /* Endif */
#endif
_mem_set_type(msgqs_ptr, MEM_TYPE_MESSAGE_QUEUES);
if (msg_component_ptr->MSGPOOLS_PTR == NULL)
{
msg_component_ptr->MAX_MSGPOOLS_EVER = 0;
msg_component_ptr->SMALLEST_MSGPOOL_PTR = NULL;
msg_component_ptr->LARGEST_MSGPOOL_PTR = NULL;
msg_component_ptr->MAX_MSGPOOLS = kernel_data->INIT.MAX_MSGPOOLS;
msg_component_ptr->MAX_MSGQS = kernel_data->INIT.MAX_MSGQS;
msg_component_ptr->MSGPOOLS_PTR = (MSGPOOL_STRUCT_PTR)pools_ptr;
pools_ptr = NULL;
msg_component_ptr->MSGQS_PTR = (MSGQ_STRUCT_PTR)msgqs_ptr;
msgqs_ptr = NULL;
}/* Endif */
msg_component_ptr->VALID = MESSAGE_VALID;
kernel_data->KERNEL_COMPONENTS[KERNEL_MESSAGES] = msg_component_ptr;
#if MQX_COMPONENT_DESTRUCTION
kernel_data->COMPONENT_CLEANUP[KERNEL_MESSAGES] = _msg_cleanup;
#endif
_lwsem_post((LWSEM_STRUCT_PTR)&kernel_data->COMPONENT_CREATE_LWSEM);
if (pools_ptr)
{
_mem_free(pools_ptr);
}/* Endif */
if (msgqs_ptr)
{
_mem_free(msgqs_ptr);
}/* Endif */
_KLOGX2(KLOG_msg_create_component, MQX_OK);
return MQX_OK;
} /* Endbody */
_mqx_int _io_flashx_ioctl
(
/* [IN] the file handle for the device */
MQX_FILE_PTR fd_ptr,
/* [IN] the ioctl command */
_mqx_uint cmd,
/* [IN/OUT] the ioctl parameters */
pointer param_ptr
)
{ /* Body */
IO_FLASHX_STRUCT_PTR dev_ptr = (IO_FLASHX_STRUCT_PTR) fd_ptr->DEV_PTR->DRIVER_INIT_PTR;
IO_FLASHX_FILE_STRUCT_PTR file_ptr = (IO_FLASHX_FILE_STRUCT_PTR) fd_ptr->DEV_DATA_PTR;
_mqx_int result = MQX_OK;
_mqx_uint i, j;
_mqx_uint sb, ss, offset, fs;
char_ptr temp_ptr;
pointer _PTR_ pparam_ptr;
_mqx_uint_ptr uparam_ptr;
_mem_size_ptr mparam_ptr;
switch (cmd) {
case FLASH_IOCTL_GET_BASE_ADDRESS:
mparam_ptr = (_mem_size_ptr)param_ptr;
*mparam_ptr = dev_ptr->BASE_ADDR;
break;
case FLASH_IOCTL_GET_BLOCK_GROUPS:
for (i=0; dev_ptr->HW_BLOCK[i].NUM_SECTORS != 0; i++) { /* just count blocks */ }
uparam_ptr = (_mqx_uint_ptr)param_ptr;
*uparam_ptr = i;
break;
case IO_IOCTL_GET_NUM_SECTORS:
*(uint_32_ptr)param_ptr = fd_ptr->SIZE / MFS_SECTOR_SIZE;
break;
case FLASH_IOCTL_GET_NUM_SECTORS:
_io_flashx_find_correct_sectors(fd_ptr, fd_ptr->SIZE, &sb, &ss, &offset, &fs);
uparam_ptr = (_mqx_uint_ptr) param_ptr;
*uparam_ptr = fs;
break;
case FLASH_IOCTL_GET_WIDTH:
uparam_ptr = (_mqx_uint_ptr)param_ptr;
*uparam_ptr = dev_ptr->WIDTH;
break;
case IO_IOCTL_DEVICE_IDENTIFY:
/*
** This is to let the upper layer know what kind of device this is.
** It's a physical flash device, capable of being erased, read, seeked,
** and written. Flash devices are not interrupt driven, so
** IO_DEV_ATTR_POLL is included.
*/
uparam_ptr = (_mqx_uint_ptr)param_ptr;
uparam_ptr[0] = IO_DEV_TYPE_PHYS_FLASHX;
uparam_ptr[1] = IO_DEV_TYPE_LOGICAL_MFS;
uparam_ptr[2] = IO_DEV_ATTR_ERASE | IO_DEV_ATTR_POLL
| IO_DEV_ATTR_READ | IO_DEV_ATTR_SEEK |
IO_DEV_ATTR_WRITE;
break;
case IO_IOCTL_GET_BLOCK_SIZE:
/* returns the fixed size for MFS sector size */
*(uint_32_ptr)param_ptr = MFS_SECTOR_SIZE;
break;
case FLASH_IOCTL_GET_SECTOR_SIZE:
/*
** This returns the size of the sector after a user does an
** fseek to the location he/she wants to know the sector size of.
*/
_io_flashx_find_correct_sectors(fd_ptr, fd_ptr->LOCATION, &sb, &ss, &offset, &fs);
mparam_ptr = (_mem_size_ptr) param_ptr;
*mparam_ptr = dev_ptr->HW_BLOCK[sb].SECTOR_SIZE;
break;
case FLASH_IOCTL_GET_SECTOR_BASE:
/*
** This returns the start address of the sector after a user does an
** fseek to the sector he/she wants know the start of.
*/
_io_flashx_find_correct_sectors(fd_ptr, fd_ptr->LOCATION, &sb, &ss, &offset, &fs);
mparam_ptr = (_mem_size_ptr) param_ptr;
*mparam_ptr = dev_ptr->BASE_ADDR + dev_ptr->HW_BLOCK[sb].START_ADDR + dev_ptr->HW_BLOCK[sb].SECTOR_SIZE * ss;
break;
case FLASH_IOCTL_GET_BLOCK_MAP:
pparam_ptr = (pointer _PTR_) param_ptr;
*pparam_ptr = (pointer) dev_ptr->HW_BLOCK;
break;
case IO_IOCTL_FLUSH_OUTPUT:
case FLASH_IOCTL_FLUSH_BUFFER:
_lwsem_wait(&dev_ptr->HW_ACCESS);
result = _io_flashx_flush_buffer(fd_ptr);
_lwsem_post(&dev_ptr->HW_ACCESS);
break;
case FLASH_IOCTL_ENABLE_BUFFERING:
/* if RAM cache is enabled, enable buffer */
if(file_ptr->FLAGS & FLASHX_SECTOR_CACHE_ENABLED)
{
file_ptr->FLAGS |= FLASHX_FLASH_BUFFER_ENABLED;
result = MQX_OK;
}
/* else return error */
else
result = IO_ERROR;
break;
case FLASH_IOCTL_DISABLE_BUFFERING:
_lwsem_wait(&dev_ptr->HW_ACCESS);
result = _io_flashx_flush_buffer(fd_ptr);
_lwsem_post(&dev_ptr->HW_ACCESS);
if (result != MQX_OK) {
break;
} /* Endif */
file_ptr->FLAGS &= ~FLASHX_FLASH_BUFFER_ENABLED;
break;
case FLASH_IOCTL_ENABLE_SECTOR_CACHE:
/* Set RAM cache flag */
file_ptr->FLAGS |= FLASHX_SECTOR_CACHE_ENABLED;
break;
case FLASH_IOCTL_DISABLE_SECTOR_CACHE:
/* Disable buffering first */
if(file_ptr->FLAGS & FLASHX_FLASH_BUFFER_ENABLED){
_lwsem_wait(&dev_ptr->HW_ACCESS);
result = _io_flashx_flush_sector_buffer(fd_ptr);
_lwsem_post(&dev_ptr->HW_ACCESS);
if (result != MQX_OK) {
break;
} /* Endif */
file_ptr->FLAGS &= ~FLASHX_FLASH_BUFFER_ENABLED;
}
/* clear ram cache flag */
file_ptr->FLAGS &= ~FLASHX_SECTOR_CACHE_ENABLED;
break;
case FLASH_IOCTL_ERASE_SECTOR:
/*
** This erases the sector after a user does an
** fseek to the location of the sector he/she wants to erase.
*/
if (!dev_ptr->SECTOR_ERASE) {
result = IO_ERROR_INVALID_IOCTL_CMD;
break;
} /* Endif */
_io_flashx_find_correct_sectors(fd_ptr, fd_ptr->LOCATION, &sb, &ss, &offset, &fs);
temp_ptr = (char_ptr)(dev_ptr->BASE_ADDR + dev_ptr->HW_BLOCK[sb].START_ADDR + dev_ptr->HW_BLOCK[sb].SECTOR_SIZE * ss);
_lwsem_wait(&dev_ptr->HW_ACCESS);
if ((*dev_ptr->SECTOR_ERASE)(dev_ptr, temp_ptr, dev_ptr->HW_BLOCK[sb].SECTOR_SIZE)) {
file_ptr->ERASE_ARRAY[fs / 8] |= (0x1 << (fs % 8));
if ((sb == file_ptr->CACHE_BLOCK) && (ss == file_ptr->CACHE_SECTOR))
file_ptr->DIRTY_DATA = FALSE; /* invalidate cache */
}
else {
result = IO_ERROR; /* could not erase sector */
}
_lwsem_post(&dev_ptr->HW_ACCESS);
break;
case FLASH_IOCTL_ERASE_CHIP:
/* Though this command erases the whole flash,
** it does not invalidates all the caches
** associated with opened files on this driver.
*/
if (dev_ptr->CHIP_ERASE) {
_lwsem_wait(&dev_ptr->HW_ACCESS);
result = (*dev_ptr->CHIP_ERASE)(dev_ptr);
for (i = 0; i < file_ptr->ERASE_ARRAY_MAX; i++) {
/* The whole chip is cleared, mark sectors as erased */
file_ptr->ERASE_ARRAY[i] = 0xFF;
}
_lwsem_post(&dev_ptr->HW_ACCESS);
break;
} else if (!dev_ptr->SECTOR_ERASE) {
result = IO_ERROR_INVALID_IOCTL_CMD;
break;
} else {
fs = 0;
_lwsem_wait(&dev_ptr->HW_ACCESS);
for (i = 0; dev_ptr->HW_BLOCK[i].NUM_SECTORS != 0; i++) {
temp_ptr = (char_ptr)(dev_ptr->BASE_ADDR + dev_ptr->HW_BLOCK[i].START_ADDR);
for (j = 0; j < dev_ptr->HW_BLOCK[i].NUM_SECTORS; j++) {
if ((*dev_ptr->SECTOR_ERASE)(dev_ptr, temp_ptr, dev_ptr->HW_BLOCK[i].SECTOR_SIZE)) {
file_ptr->ERASE_ARRAY[fs / 8] |= (0x1 << (fs % 8));
fs++;
}
else {
result = IO_ERROR; /* sector erase was not successfull */
break;
}
temp_ptr += dev_ptr->HW_BLOCK[i].SECTOR_SIZE;
} /* Endfor */
if (result != MQX_OK)
break;
} /* Endfor */
_lwsem_post(&dev_ptr->HW_ACCESS);
}/* Endif */
break;
case FLASH_IOCTL_WRITE_PROTECT:
if (dev_ptr->WRITE_PROTECT != NULL) {
_lwsem_wait(&dev_ptr->HW_ACCESS);
result = (*dev_ptr->WRITE_PROTECT)(dev_ptr, *(_mqx_uint_ptr)param_ptr);
_lwsem_post(&dev_ptr->HW_ACCESS);
}
break;
default:
if(dev_ptr->IOCTL != NULL){
result = (*dev_ptr->IOCTL)(dev_ptr, cmd, param_ptr);
}
else {
result = IO_ERROR_INVALID_IOCTL_CMD;
}
break;
} /* Endswitch */
return result;
} /* Endbody */
int_32 _io_usb_mfs_ioctl
(
/* [IN] the file handle for the device */
MQX_FILE_PTR fd_ptr,
/* [IN] the ioctl command */
int_32 command,
/* [IN] the ioctl parameters */
pointer input_param_ptr
)
{ /* Body */
USB_MFS_DRIVE_INFO_STRUCT_PTR drive_info_ptr;
IO_DEVICE_STRUCT_PTR io_dev_ptr = fd_ptr->DEV_PTR;
IO_USB_MFS_STRUCT_PTR info_ptr =
(IO_USB_MFS_STRUCT_PTR)io_dev_ptr->DRIVER_INIT_PTR;
int_32 result = MQX_OK;
uint_32_ptr param_ptr = input_param_ptr;
switch (command) {
case IO_IOCTL_GET_NUM_SECTORS:
case USB_MFS_IOCTL_GET_NUM_SECTORS:
*param_ptr = info_ptr->BCOUNT;
break;
case IO_IOCTL_GET_BLOCK_SIZE:
*param_ptr = info_ptr->BLENGTH;
break;
case IO_IOCTL_DEVICE_IDENTIFY:
param_ptr[0] = IO_DEV_TYPE_PHYS_USB_MFS;
param_ptr[1] = IO_DEV_TYPE_LOGICAL_MFS;
param_ptr[2] = IO_DEV_ATTR_ERASE | IO_DEV_ATTR_POLL
| IO_DEV_ATTR_READ | IO_DEV_ATTR_REMOVE
| IO_DEV_ATTR_SEEK | IO_DEV_ATTR_WRITE;
if (info_ptr->BLOCK_MODE) {
param_ptr[2] |= IO_DEV_ATTR_BLOCK_MODE;
} /* Endif */
break;
case USB_MFS_IOCTL_GET_DRIVE_PARAMS:
drive_info_ptr = (USB_MFS_DRIVE_INFO_STRUCT_PTR)((pointer)param_ptr);
drive_info_ptr->NUMBER_OF_HEADS = info_ptr->NUMBER_OF_HEADS;
drive_info_ptr->NUMBER_OF_TRACKS = info_ptr->NUMBER_OF_TRACKS;
drive_info_ptr->SECTORS_PER_TRACK = info_ptr->SECTORS_PER_TRACK;
break;
case IO_IOCTL_GET_VENDOR_INFO:
*param_ptr = (uint_32)&(info_ptr->INQUIRY_DATA.BVID);
break;
case IO_IOCTL_GET_PRODUCT_ID:
*param_ptr = (uint_32)&(info_ptr->INQUIRY_DATA.BPID);
break;
case IO_IOCTL_GET_PRODUCT_REV:
*param_ptr = (uint_32)&(info_ptr->INQUIRY_DATA.BPRODUCT_REV);
break;
case USB_MFS_IOCTL_DEVICE_STOP:
/* Send the call now */
_lwsem_wait(&info_ptr->LWSEM);
result = _io_usb_mfs_ioctl_stop(info_ptr);
/* Wait for the completion*/
_lwsem_post(&info_ptr->LWSEM);
break;
/* Start CR 812 */
case IO_IOCTL_SET_BLOCK_MODE:
case USB_MFS_IOCTL_SET_BLOCK_MODE:
info_ptr->BLOCK_MODE = TRUE;
break;
/* End CR 812 */
default:
result = IO_ERROR_INVALID_IOCTL_CMD;
break;
} /* Endswitch */
return(result);
} /* Endbody */
/*FUNCTION*-------------------------------------------------------------------
*
* Function Name : _io_flashx_read
* Returned Value : number of characters read
* Comments : Reads data from flash driver
* NOTE: This function should normally call low-level driver read(),
* but it is not implemented yet. That's why dev_ptr->BASE_ADDR is used
* here, even if this information is for low level driver only.
* The dev_ptr->BASE_ADDR is base HW address for external flashes and should
* equal to zero for internal flashes.
*
*END*----------------------------------------------------------------------*/
_mqx_int _io_flashx_read
(
/* [IN] the file handle for the device */
MQX_FILE_PTR fd_ptr,
/* [IN] where the characters are to be stored */
char_ptr data_ptr,
/* [IN] the number of characters to input */
_mqx_int num
)
{ /* Body */
IO_FLASHX_STRUCT_PTR dev_ptr = (IO_FLASHX_STRUCT_PTR) fd_ptr->DEV_PTR->DRIVER_INIT_PTR;
IO_FLASHX_FILE_STRUCT_PTR file_ptr = (IO_FLASHX_FILE_STRUCT_PTR) fd_ptr->DEV_DATA_PTR;
_mqx_uint sb, ss, offset, fs, copy_num, remains;
if (fd_ptr->LOCATION + num > fd_ptr->SIZE) {
if (fd_ptr->LOCATION >= fd_ptr->SIZE) {
fd_ptr->ERROR = IO_ERROR_READ_ACCESS;
return 0;
}
num = fd_ptr->SIZE - fd_ptr->LOCATION;
}
_lwsem_wait(&dev_ptr->HW_ACCESS);
if (file_ptr->FLAGS & FLASHX_FLASH_BUFFER_ENABLED) {
/* We do this in order to simplify algorithm for reading.
** In true write-back caching, we check if the requested data to be read have valid
** image in the cache and if they do, we will read them from the cache instead.
*/
_io_flashx_flush_buffer(fd_ptr);
} /* Endif */
remains = num;
/* Find the first block where to read from */
_io_flashx_find_correct_sectors(fd_ptr, fd_ptr->LOCATION, &sb, &ss, &offset, &fs);
while (remains)
{
copy_num = (dev_ptr->HW_BLOCK[sb].NUM_SECTORS - ss) * dev_ptr->HW_BLOCK[sb].SECTOR_SIZE - offset;
if (copy_num > remains)
copy_num = remains;
_mem_copy((pointer)(dev_ptr->BASE_ADDR + dev_ptr->HW_BLOCK[sb].START_ADDR + ss * dev_ptr->HW_BLOCK[sb].SECTOR_SIZE + offset), (pointer) data_ptr, copy_num);
remains -= copy_num;
fd_ptr->LOCATION += copy_num; /* move LOCATION after each partial read */
ss = 0; /* ss is interesting only in first pass when reading from start block */
offset = 0; /* offset is interesting only in first pass when reading from start block */
sb++;
}
_lwsem_post(&dev_ptr->HW_ACCESS);
if (fd_ptr->LOCATION >= fd_ptr->SIZE) {
fd_ptr->FLAGS |= IO_FLAG_AT_EOF;
}
/* Return the number of read bytes, not the remaining size */
return num - remains;
} /* Endbody */
/*FUNCTION*****************************************************************
*
* Function Name : _io_spi_ioctl
* Returned Value : MQX error code
* Comments :
* Returns result of SPI ioctl operation.
*
*END*********************************************************************/
static _mqx_int _io_spi_ioctl
(
/* [IN] the file handle for the device */
MQX_FILE_PTR fd_ptr,
/* [IN] the ioctl command */
uint32_t cmd,
/* [IN] the ioctl parameters */
void *param_ptr
)
{
SPI_DEV_DATA_STRUCT_PTR dev_data;
SPI_DRIVER_DATA_STRUCT_PTR driver_data;
_mqx_int result = MQX_OK;
_mqx_int lldrv_result = MQX_OK;
dev_data = (SPI_DEV_DATA_STRUCT_PTR)(fd_ptr->DEV_DATA_PTR);
driver_data = (SPI_DRIVER_DATA_STRUCT_PTR)(fd_ptr->DEV_PTR->DRIVER_INIT_PTR);
switch (cmd) {
case IO_IOCTL_DEVICE_IDENTIFY:
/* return the device identification */
((_mqx_uint_ptr)param_ptr)[0] = IO_DEV_TYPE_PHYS_SPI;
((_mqx_uint_ptr)param_ptr)[1] = 0;
((_mqx_uint_ptr)param_ptr)[2] = IO_DEV_ATTR_READ | IO_DEV_ATTR_WRITE;
break;
case IO_IOCTL_FLUSH_OUTPUT:
result = _io_spi_flush(fd_ptr, ((dev_data->FLAGS & SPI_FLAG_NO_DEASSERT_ON_FLUSH)!=0));
break;
case IO_IOCTL_SPI_FLUSH_DEASSERT_CS:
result = _io_spi_flush(fd_ptr, 0);
break;
case IO_IOCTL_SPI_READ_WRITE:
if (NULL == param_ptr)
{
result = SPI_ERROR_INVALID_PARAMETER;
}
else
{
SPI_READ_WRITE_STRUCT_PTR rw_ptr = (SPI_READ_WRITE_STRUCT_PTR)param_ptr;
if (rw_ptr->BUFFER_LENGTH != _io_spi_read_write(fd_ptr, rw_ptr->WRITE_BUFFER, rw_ptr->READ_BUFFER, rw_ptr->BUFFER_LENGTH))
result = IO_ERROR;
}
break;
case IO_IOCTL_SPI_GET_FLAGS:
if (NULL == param_ptr)
{
result = SPI_ERROR_INVALID_PARAMETER;
}
else
{
*((uint32_t *)param_ptr) = dev_data->FLAGS;
}
break;
case IO_IOCTL_SPI_SET_FLAGS:
if (NULL == param_ptr)
{
result = SPI_ERROR_INVALID_PARAMETER;
}
else
{
dev_data->FLAGS = *((uint32_t *)param_ptr);
}
break;
case IO_IOCTL_SPI_GET_BAUD:
if (NULL == param_ptr)
{
result = SPI_ERROR_INVALID_PARAMETER;
}
else
{
*((uint32_t *)param_ptr) = dev_data->PARAMS.BAUDRATE;
/* Pass IOCTL also to the low level driver */
if (driver_data->DEVIF->IOCTL != NULL)
result = driver_data->DEVIF->IOCTL(driver_data->DEVIF_DATA, &(dev_data->PARAMS), cmd, param_ptr);
/* Invalid IOCTL reported by the low level driver is not an error (implementation is not mandatory) */
if (result == IO_ERROR_INVALID_IOCTL_CMD)
result = MQX_OK;
}
break;
case IO_IOCTL_SPI_SET_BAUD:
if (NULL == param_ptr || 0 == *((uint32_t *)param_ptr))
{
/* use default baudrate */
dev_data->PARAMS.BAUDRATE = driver_data->PARAMS.BAUDRATE;
dev_data->PARAMS_DIRTY = TRUE;
}
else
{
dev_data->PARAMS.BAUDRATE = *((uint32_t *)param_ptr);
dev_data->PARAMS_DIRTY = TRUE;
}
break;
case IO_IOCTL_SPI_GET_MODE:
if (NULL == param_ptr)
{
result = SPI_ERROR_INVALID_PARAMETER;
}
else
{
*((uint32_t *)param_ptr) = dev_data->PARAMS.MODE;
}
break;
case IO_IOCTL_SPI_SET_MODE:
if (NULL == param_ptr)
{
result = SPI_ERROR_INVALID_PARAMETER;
}
else
{
dev_data->PARAMS.MODE = *((uint32_t *)param_ptr);
dev_data->PARAMS_DIRTY = TRUE;
}
break;
case IO_IOCTL_SPI_GET_CS:
if (NULL == param_ptr)
{
result = SPI_ERROR_INVALID_PARAMETER;
}
else
{
*((uint32_t *)param_ptr) = dev_data->PARAMS.CS;
}
break;
case IO_IOCTL_SPI_SET_CS:
if (NULL == param_ptr)
{
result = SPI_ERROR_INVALID_PARAMETER;
}
else
{
dev_data->PARAMS.CS = *((uint32_t *)param_ptr);
dev_data->PARAMS_DIRTY = TRUE;
}
break;
case IO_IOCTL_SPI_GET_FRAMESIZE:
if (NULL == param_ptr)
{
result = SPI_ERROR_INVALID_PARAMETER;
}
else
{
*((uint32_t *)param_ptr) = dev_data->PARAMS.FRAMESIZE;
}
break;
case IO_IOCTL_SPI_SET_FRAMESIZE:
if (NULL == param_ptr)
{
result = SPI_ERROR_INVALID_PARAMETER;
}
else
{
dev_data->PARAMS.FRAMESIZE = *((uint32_t *)param_ptr);
dev_data->PARAMS_DIRTY = TRUE;
}
break;
case IO_IOCTL_SPI_GET_TRANSFER_MODE:
if (NULL == param_ptr)
{
result = SPI_ERROR_INVALID_PARAMETER;
}
else if ((dev_data->PARAMS.ATTR & SPI_ATTR_TRANSFER_MODE_MASK) == SPI_ATTR_SLAVE_MODE)
{
*((uint32_t *)param_ptr) = SPI_DEVICE_SLAVE_MODE;
}
else
{
*((uint32_t *)param_ptr) = SPI_DEVICE_MASTER_MODE;
}
break;
case IO_IOCTL_SPI_SET_TRANSFER_MODE:
if (NULL == param_ptr)
{
result = SPI_ERROR_INVALID_PARAMETER;
}
else if (*((uint32_t *)param_ptr) == SPI_DEVICE_SLAVE_MODE)
{
dev_data->PARAMS.ATTR &= ~SPI_ATTR_TRANSFER_MODE_MASK;
dev_data->PARAMS.ATTR |= SPI_ATTR_SLAVE_MODE;
dev_data->PARAMS_DIRTY = TRUE;
}
else if (*((uint32_t *)param_ptr) == SPI_DEVICE_MASTER_MODE)
{
dev_data->PARAMS.ATTR &= ~SPI_ATTR_TRANSFER_MODE_MASK;
dev_data->PARAMS.ATTR |= SPI_ATTR_MASTER_MODE;
dev_data->PARAMS_DIRTY = TRUE;
}
else
{
result = SPI_ERROR_TRANSFER_MODE_INVALID;
}
break;
case IO_IOCTL_SPI_GET_ENDIAN:
if (NULL == param_ptr)
{
result = SPI_ERROR_INVALID_PARAMETER;
}
else if ((dev_data->PARAMS.ATTR & SPI_ATTR_ENDIAN_MASK) == SPI_ATTR_LITTLE_ENDIAN)
{
*((uint32_t *)param_ptr) = SPI_DEVICE_LITTLE_ENDIAN;
}
else
{
*((uint32_t *)param_ptr) = SPI_DEVICE_BIG_ENDIAN;
}
break;
case IO_IOCTL_SPI_SET_ENDIAN:
if (NULL == param_ptr)
{
result = SPI_ERROR_INVALID_PARAMETER;
}
else if (*((uint32_t *)param_ptr) == SPI_DEVICE_LITTLE_ENDIAN)
{
dev_data->PARAMS.ATTR &= ~SPI_ATTR_ENDIAN_MASK;
dev_data->PARAMS.ATTR |= SPI_ATTR_LITTLE_ENDIAN;
dev_data->PARAMS_DIRTY = TRUE;
}
else if (*((uint32_t *)param_ptr) == SPI_DEVICE_BIG_ENDIAN)
{
dev_data->PARAMS.ATTR &= ~SPI_ATTR_ENDIAN_MASK;
dev_data->PARAMS.ATTR |= SPI_ATTR_BIG_ENDIAN;
dev_data->PARAMS_DIRTY = TRUE;
}
else
{
result = SPI_ERROR_ENDIAN_INVALID;
}
break;
case IO_IOCTL_SPI_GET_DUMMY_PATTERN:
if (NULL == param_ptr)
{
result = SPI_ERROR_INVALID_PARAMETER;
}
else
{
*((uint32_t *)param_ptr) = dev_data->PARAMS.DUMMY_PATTERN;
}
break;
case IO_IOCTL_SPI_SET_DUMMY_PATTERN:
if (NULL == param_ptr)
{
result = SPI_ERROR_INVALID_PARAMETER;
}
else
{
dev_data->PARAMS.DUMMY_PATTERN = *((uint32_t *)param_ptr);
dev_data->PARAMS_DIRTY = TRUE;
}
break;
case IO_IOCTL_SPI_SET_CS_CALLBACK:
if (NULL == param_ptr)
{
result = SPI_ERROR_INVALID_PARAMETER;
}
else
{
if (!(dev_data->BUS_OWNER) && ((result=_lwsem_wait(&(driver_data->BUS_LOCK))) != MQX_OK))
break;
driver_data->CS_CALLBACK = ((SPI_CS_CALLBACK_STRUCT_PTR)param_ptr)->CALLBACK;
driver_data->CS_USERDATA = ((SPI_CS_CALLBACK_STRUCT_PTR)param_ptr)->USERDATA;
if (!(dev_data->BUS_OWNER))
result = _lwsem_post(&(driver_data->BUS_LOCK));
}
break;
case IO_IOCTL_SPI_GET_STATS:
if (NULL == param_ptr)
{
result = SPI_ERROR_INVALID_PARAMETER;
}
else
{
#if BSPCFG_ENABLE_SPI_STATS
*((SPI_STATISTICS_STRUCT_PTR)param_ptr) = dev_data->STATS;
#else
_mem_zero(param_ptr, sizeof(SPI_STATISTICS_STRUCT));
result = MQX_IO_OPERATION_NOT_AVAILABLE;
#endif
}
break;
case IO_IOCTL_SPI_CLEAR_STATS:
#if BSPCFG_ENABLE_SPI_STATS
_mem_zero(&(dev_data->STATS), sizeof(dev_data->STATS));
#else
result = MQX_IO_OPERATION_NOT_AVAILABLE;
#endif
break;
case IO_IOCTL_SPI_DEVICE_ENABLE:
break;
case IO_IOCTL_SPI_DEVICE_DISABLE:
break;
default:
/* Pass unhandled IOCTL to the low level driver */
if (driver_data->DEVIF->IOCTL != NULL)
{
/* Do not assume that the low level driver is re-entrant, lock semaphore */
if (!(dev_data->BUS_OWNER) && ((result=_lwsem_wait(&(driver_data->BUS_LOCK))) != MQX_OK))
break;
lldrv_result = driver_data->DEVIF->IOCTL(driver_data->DEVIF_DATA, &(dev_data->PARAMS), cmd, param_ptr);
if (!(dev_data->BUS_OWNER))
result = _lwsem_post(&(driver_data->BUS_LOCK));
/* Report low level driver error, if any */
if (lldrv_result != MQX_OK)
result = lldrv_result;
}
else
{
result = IO_ERROR_INVALID_IOCTL_CMD;
}
break;
}
return result;
}
_mqx_int _io_flashx_write
(
/* [IN] the file handle for the device */
MQX_FILE_PTR fd_ptr,
/* [IN] where the characters are */
char_ptr data_ptr,
/* [IN] the number of characters to output */
_mqx_int num
)
{ /* Body */
IO_FLASHX_STRUCT_PTR dev_ptr = (IO_FLASHX_STRUCT_PTR) fd_ptr->DEV_PTR->DRIVER_INIT_PTR;
IO_FLASHX_FILE_STRUCT_PTR file_ptr = (IO_FLASHX_FILE_STRUCT_PTR) fd_ptr->DEV_DATA_PTR;
_mem_size copy_num, remains;
_mqx_uint b, s, offset, fs;
_mqx_uint dest_ptr;
_mqx_int result;
if (fd_ptr->LOCATION + num > fd_ptr->SIZE) {
if (fd_ptr->LOCATION >= fd_ptr->SIZE) {
fd_ptr->ERROR = IO_ERROR_WRITE_ACCESS;
return 0;
}
num = fd_ptr->SIZE - fd_ptr->LOCATION;
}
_lwsem_wait(&dev_ptr->HW_ACCESS);
remains = num;
while (remains) {
/* Get block, sector, offset and file sector */
_io_flashx_find_correct_sectors(fd_ptr, fd_ptr->LOCATION, &b, &s, &offset, &fs);
if (offset || (remains < dev_ptr->HW_BLOCK[b].SECTOR_SIZE)) {
/* Write partial sector.
** Partial sector write handles data caching. For this reason we use
** partial write also for last sector (even if it is not partial).
*/
copy_num = remains <= (dev_ptr->HW_BLOCK[b].SECTOR_SIZE - offset) ? remains : dev_ptr->HW_BLOCK[b].SECTOR_SIZE - offset;
result = _io_flashx_write_partial_sector(fd_ptr, b, s, offset, copy_num, fs, data_ptr);
if (result == IO_ERROR) {
fd_ptr->ERROR = IO_ERROR_WRITE;
_lwsem_post(&dev_ptr->HW_ACCESS);
return result;
}
}
else {
/* Write whole sector. Whole sector does not handle sector caching. */
copy_num = dev_ptr->HW_BLOCK[b].SECTOR_SIZE;
result = _io_flashx_erase_sector(fd_ptr, fs, b, s);
if (result != IO_ERROR) {
dest_ptr = dev_ptr->BASE_ADDR + dev_ptr->HW_BLOCK[b].START_ADDR + s * dev_ptr->HW_BLOCK[b].SECTOR_SIZE + offset;
if (!(*dev_ptr->SECTOR_PROGRAM)(dev_ptr, data_ptr, (char_ptr) dest_ptr, copy_num))
result = IO_ERROR;
}
if (result == IO_ERROR) {
fd_ptr->ERROR = IO_ERROR_WRITE;
_lwsem_post(&dev_ptr->HW_ACCESS);
return result;
}
if ((file_ptr->FLAGS & FLASHX_SECTOR_CACHE_ENABLED) &&
(file_ptr->CACHE_BLOCK == b) &&
(file_ptr->CACHE_SECTOR == s))
{
file_ptr->DIRTY_DATA = FALSE; /* data in the cache are invalid, because another data were written into flash */
} /* Endif */
}
/* Sector written to the flash is not erased */
file_ptr->ERASE_ARRAY[fs / 8] &= ~(0x1 << (fs % 8));
fd_ptr->LOCATION += copy_num;
data_ptr += copy_num;
remains -= copy_num;
}
_lwsem_post(&dev_ptr->HW_ACCESS);
if (fd_ptr->LOCATION >= fd_ptr->SIZE) {
fd_ptr->FLAGS |= IO_FLAG_AT_EOF;
}
return num - remains;
} /* Endbody */
static void PPP_linkup (pointer lwsem)
{
PPP_link = TRUE;
_lwsem_post(lwsem);
printf( " PPP link On \n");
}
MQX_FILE_PTR _io_fopen
(
/* [IN] the name of the device to open */
const char _PTR_ open_type_ptr,
/* [IN] I/O initialization parameter to pass to the device initialization */
const char _PTR_ open_mode_ptr
)
{ /* Body */
KERNEL_DATA_STRUCT_PTR kernel_data;
MQX_FILE_PTR file_ptr;
IO_DEVICE_STRUCT_PTR dev_ptr;
char _PTR_ dev_name_ptr;
char _PTR_ tmp_ptr;
_mqx_int result;
_GET_KERNEL_DATA(kernel_data);
_lwsem_wait((LWSEM_STRUCT_PTR)&kernel_data->IO_LWSEM);
dev_ptr = (IO_DEVICE_STRUCT_PTR)((pointer)kernel_data->IO_DEVICES.NEXT);
while (dev_ptr != (pointer)&kernel_data->IO_DEVICES.NEXT) {
dev_name_ptr = dev_ptr->IDENTIFIER;
tmp_ptr = (char _PTR_)open_type_ptr;
while (*tmp_ptr && *dev_name_ptr &&
(*tmp_ptr == *dev_name_ptr))
{
++tmp_ptr;
++dev_name_ptr;
} /* Endwhile */
if (*dev_name_ptr == '\0') {
/* Match */
break;
} /* Endif */
dev_ptr = (IO_DEVICE_STRUCT_PTR)((pointer)dev_ptr->QUEUE_ELEMENT.NEXT);
} /* Endwhile */
_lwsem_post((LWSEM_STRUCT_PTR)&kernel_data->IO_LWSEM);
if (dev_ptr == (pointer)&kernel_data->IO_DEVICES.NEXT) {
return(NULL);
} /* Endif */
file_ptr = (MQX_FILE_PTR)_mem_alloc_system_zero((_mem_size)sizeof(MQX_FILE));
#if MQX_CHECK_MEMORY_ALLOCATION_ERRORS
if (file_ptr == NULL) {
return(NULL);
} /* Endif */
#endif
_mem_set_type(file_ptr, MEM_TYPE_FILE_PTR);
file_ptr->DEV_PTR = dev_ptr;
if (dev_ptr->IO_OPEN != NULL) {
result = (*dev_ptr->IO_OPEN)(file_ptr, (char _PTR_)open_type_ptr, (char _PTR_)open_mode_ptr);
if (result != MQX_OK) {
_task_set_error(result);
_mem_free(file_ptr);
return(NULL);
} /* Endif */
} /* Endif */
return(file_ptr);
} /* Endbody */
void _io_pcb_mqxa_read_task
(
/* [IN] the device info */
uint_32 parameter
)
{ /* Body */
IO_PCB_MQXA_INFO_STRUCT_PTR info_ptr;
IO_PCB_STRUCT_PTR pcb_ptr;
uchar_ptr input_ptr;
uchar_ptr input_init_ptr;
boolean got_length = 0;
_mem_size input_length = 0;
_mem_size max_length = 0;
_mem_size count = 0;
_mqx_uint state = 0;
_mqx_uint next_state = 0;
uchar crc0 = 0;
uchar crc1 = 0;
uchar packet_crc0 = 0;
uchar packet_crc1 = 0;
uchar tmp;
uchar c;
info_ptr = (IO_PCB_MQXA_INFO_STRUCT_PTR)parameter;
/* Get a PCB */
pcb_ptr = _io_pcb_alloc(info_ptr->READ_PCB_POOL, FALSE);
#if MQX_CHECK_ERRORS
if (pcb_ptr == NULL) {
_task_block();
} /* Endif */
#endif
max_length = info_ptr->INIT.INPUT_MAX_LENGTH;
input_init_ptr = pcb_ptr->FRAGMENTS[0].FRAGMENT;
state = AP_STATE_SYNC; /* Waiting for sync */
next_state = AP_STATE_SYNC; /* Waiting for sync */
while (TRUE) {
if (info_ptr->INIT.IS_POLLED) {
while (!fstatus(info_ptr->FD)) {
_time_delay_ticks(1);
} /* Endwhile */
} /* Endif */
c = (uchar)fgetc(info_ptr->FD);
switch (state) {
case AP_STATE_SYNC:
if (c == AP_SYNC) {
/* Sync detected. Start packet reception. */
state = AP_STATE_READING;
next_state = AP_STATE_SYNC;
count = 0;
input_ptr = input_init_ptr;
crc0 = 0x7e;
crc1 = 0x7e;
got_length = FALSE;
} /* Endif */
break;
case AP_STATE_SYNC_SKIP:
if (c != AP_SYNC) {
/* Single sync detected. Restart message reception. */
count = 0;
input_ptr = input_init_ptr;
crc0 = 0x7e;
crc1 = 0x7e;
got_length = FALSE;
*input_ptr++ = c;
++count;
AP_CHECKSUM(c, crc0, crc1);
state = AP_STATE_READING;
} else {
state = next_state;
} /* Endif */
break;
case AP_STATE_READING:
*input_ptr++ = c;
++count;
AP_CHECKSUM(c, crc0, crc1);
if (got_length ) {
if (count >= input_length){
state = AP_STATE_CS0;
} /* Endif */
} else {
if ( count > MQXA_MSG_CONTROL_OFFSET) {
/* The complete packet header has been read in */
input_length = GET_LENGTH(input_init_ptr);
if (input_length > max_length) {
next_state = AP_STATE_SYNC;
++info_ptr->RX_PACKETS_TOO_LONG;
} else {
got_length = TRUE;
if (count >= input_length) {
state = AP_STATE_CS0;
} /* Endif */
} /* Endif */
} /* Endif */
} /* Endif */
if (c == AP_SYNC) {
next_state = state;
state = AP_STATE_SYNC_SKIP;
} /* Endif */
break;
case AP_STATE_CS0:
packet_crc0 = c;
state = AP_STATE_CS1;
if (c == AP_SYNC) {
next_state = state;
state = AP_STATE_SYNC_SKIP;
} /* Endif */
break;
case AP_STATE_CS1:
packet_crc1 = c;
state = AP_STATE_DONE;
if (c == AP_SYNC) {
next_state = state;
state = AP_STATE_SYNC_SKIP;
} /* Endif */
break;
default:
state = AP_STATE_SYNC;
break;
} /* Endswitch */
if ( state == AP_STATE_DONE ) {
/* Calculate the CRCs */
crc1 = (crc1 + 2 * crc0) & 0xFF;
tmp = crc0 - crc1;
crc1 = (crc1 - (crc0 * 2)) & 0xFF;
crc0 = tmp & 0xFF;
if ((crc0 == packet_crc0) && (crc1 == packet_crc1)) {
++info_ptr->RX_PACKETS;
pcb_ptr->FRAGMENTS[0].LENGTH = input_length;
if (info_ptr->READ_CALLBACK_FUNCTION) {
/* Start CR 398 */
(*info_ptr->READ_CALLBACK_FUNCTION)(info_ptr->CALLBACK_FD, pcb_ptr);
/* End CR */
} else {
_queue_enqueue((QUEUE_STRUCT_PTR)&info_ptr->READ_QUEUE,
(QUEUE_ELEMENT_STRUCT_PTR)&pcb_ptr->QUEUE);
_lwsem_post(&info_ptr->READ_LWSEM);
}/* Endif */
pcb_ptr = _io_pcb_alloc(info_ptr->READ_PCB_POOL, TRUE);
/* Start CR 385 */
if (pcb_ptr == NULL) {
/* Start CR 399 */
while (pcb_ptr == NULL) {
_time_delay_ticks(2);
pcb_ptr = _io_pcb_alloc(info_ptr->READ_PCB_POOL, TRUE);
} /* Endwhile */
/* End CR 399 */
} /* Endif */
/* End CR 385 */
input_init_ptr = pcb_ptr->FRAGMENTS[0].FRAGMENT;
} else {
++info_ptr->RX_PACKETS_BAD_CRC;
} /* Endif */
state = AP_STATE_SYNC;
} /* Endif */
} /* Endwhile */
} /* Endbody */
void USB_task(uint_32 param)
{
_usb_host_handle host_handle;
USB_STATUS error;
pointer usb_fs_handle = NULL;
#if DEMO_USE_POOLS && defined(DEMO_MFS_POOL_ADDR) && defined(DEMO_MFS_POOL_SIZE)
_MFS_pool_id = _mem_create_pool((pointer)DEMO_MFS_POOL_ADDR, DEMO_MFS_POOL_SIZE);
#endif
_lwsem_create(&USB_Stick,0);
_lwevent_create(&USB_Event,0);
USB_lock();
_int_install_unexpected_isr();
if (MQX_OK != _usb_host_driver_install(USBCFG_DEFAULT_HOST_CONTROLLER)) {
printf("\n Driver installation failed");
_task_block();
}
error = _usb_host_init(USBCFG_DEFAULT_HOST_CONTROLLER, &host_handle);
if (error == USB_OK) {
error = _usb_host_driver_info_register(host_handle, (pointer)ClassDriverInfoTable);
if (error == USB_OK) {
error = _usb_host_register_service(host_handle, USB_SERVICE_HOST_RESUME,NULL);
}
}
USB_unlock();
if (error == USB_OK) {
for ( ; ; ) {
// Wait for insertion or removal event
_lwevent_wait_ticks(&USB_Event,USB_EVENT,FALSE,0);
if ( device.STATE== USB_DEVICE_ATTACHED) {
if (device.SUPPORTED) {
error = _usb_hostdev_select_interface(device.DEV_HANDLE,
device.INTF_HANDLE, (pointer)&device.CLASS_INTF);
if(error == USB_OK) {
device.STATE = USB_DEVICE_INTERFACED;
USB_handle = (pointer)&device.CLASS_INTF;
// Install the file system
usb_fs_handle = usb_filesystem_install( USB_handle, "USB:", "PM_C1:", "c:" );
if (usb_fs_handle) {
// signal the application
_lwsem_post(&USB_Stick);
}
}
} else {
device.STATE = USB_DEVICE_INTERFACED;
}
} else if ( device.STATE==USB_DEVICE_DETACHED) {
_lwsem_wait(&USB_Stick);
// remove the file system
usb_filesystem_uninstall(usb_fs_handle);
}
// clear the event
_lwevent_clear(&USB_Event,USB_EVENT);
}
}
}
static void em9301_isr(void *parameter)
{
lwgpio_int_clear_flag((LWGPIO_STRUCT_PTR)parameter);
_lwsem_post(&IRQ_SEM);
}
LPM_NOTIFICATION_RESULT _io_serial_int_clock_configuration_callback
(
/* [IN] Low power notification */
LPM_NOTIFICATION_STRUCT_PTR notification,
/* [IN/OUT] Device specific data */
pointer device_specific_data
)
{
IO_SERIAL_INT_DEVICE_STRUCT_PTR dev_ptr = device_specific_data;
KUART_INIT_STRUCT_PTR init_data = dev_ptr->DEV_INIT_DATA_PTR;
uint_8 flags;
/* Get the device registers */
UART_MemMapPtr sci_ptr = _bsp_get_serial_base_address (init_data->DEVICE);
if (NULL == sci_ptr)
{
return LPM_NOTIFICATION_RESULT_ERROR;
}
if (LPM_NOTIFICATION_TYPE_PRE == notification->NOTIFICATION_TYPE)
{
/* Lock access from the higher level */
_lwsem_wait (&(dev_ptr->LPM_INFO.LOCK));
/* Enable module clocks to be able to write registers */
_bsp_serial_io_init (init_data->DEVICE, IO_PERIPHERAL_CLOCK_ENABLE);
/* Flush output if enabled */
if (sci_ptr->C2 & UART_C2_TE_MASK)
{
while (! (sci_ptr->SFIFO & UART_SFIFO_TXEMPT_MASK))
{ };
while (! (sci_ptr->S1 & UART_S1_TC_MASK))
{ };
}
/* Turn off module */
_kuart_int_peripheral_disable (sci_ptr);
}
if (LPM_NOTIFICATION_TYPE_POST == notification->NOTIFICATION_TYPE)
{
/* Enable module clocks to be able to write registers */
_bsp_serial_io_init (init_data->DEVICE, IO_PERIPHERAL_CLOCK_ENABLE);
/* Setup same baudrate for new clock frequency */
_kuart_change_baudrate (sci_ptr, _cm_get_clock (notification->CLOCK_CONFIGURATION, init_data->CLOCK_SOURCE), init_data->BAUD_RATE);
/* Turn on module if requested */
flags = init_data->OPERATION_MODE[notification->OPERATION_MODE].FLAGS;
if ((flags & IO_PERIPHERAL_MODULE_ENABLE) && (dev_ptr->COUNT > 0))
{
_kuart_int_peripheral_enable (sci_ptr);
}
/* Disable module clocks if required */
if (flags & IO_PERIPHERAL_CLOCK_DISABLE)
{
_bsp_serial_io_init (init_data->DEVICE, IO_PERIPHERAL_CLOCK_DISABLE);
}
/* Unlock */
_lwsem_post (&(dev_ptr->LPM_INFO.LOCK));
}
return LPM_NOTIFICATION_RESULT_OK;
}
_mqx_int _io_pcb_shm_ioctl
(
/* [IN] the file handle for the device */
FILE_DEVICE_STRUCT_PTR fd_ptr,
/* [IN] the ioctl command */
_mqx_uint cmd,
/* [IN] the ioctl parameters */
pointer param_ptr
)
{
IO_PCB_SHM_INFO_STRUCT_PTR info_ptr;
IO_PCB_STRUCT_PTR pcb_ptr;
_mqx_uint result = MQX_OK;
_psp_code_addr old_value;
_psp_code_addr_ptr pc_ptr = (_psp_code_addr_ptr)param_ptr;
_psp_data_addr_ptr pd_ptr = (_psp_data_addr_ptr)param_ptr;
boolean _PTR_ bool_param_ptr;
IO_PCB_SHM_INIT_STRUCT_PTR init_ptr;
info_ptr = (IO_PCB_SHM_INFO_STRUCT_PTR)fd_ptr->DEV_DATA_PTR;
init_ptr = &info_ptr->INIT;
switch (cmd) {
case IO_PCB_IOCTL_ENQUEUE_READQ:
pcb_ptr = (IO_PCB_STRUCT_PTR)*pd_ptr;
_queue_enqueue((QUEUE_STRUCT_PTR)&info_ptr->READ_QUEUE,
(QUEUE_ELEMENT_STRUCT_PTR)&pcb_ptr->QUEUE);
_lwsem_post(&info_ptr->READ_LWSEM);
break;
case IO_PCB_IOCTL_READ_CALLBACK_SET:
old_value = (_psp_code_addr)info_ptr->READ_CALLBACK_FUNCTION;
info_ptr->READ_CALLBACK_FUNCTION = (void (_CODE_PTR_)(
FILE_DEVICE_STRUCT_PTR, IO_PCB_STRUCT_PTR))*pc_ptr;
*pc_ptr = old_value;
break;
case IO_PCB_IOCTL_SET_INPUT_POOL:
old_value = (_psp_code_addr)info_ptr->READ_PCB_POOL;
info_ptr->READ_PCB_POOL = (_io_pcb_pool_id)*pc_ptr;
*pc_ptr = old_value;
info_ptr->FD = fd_ptr;
break;
case IO_PCB_IOCTL_START:
info_ptr->RX_OLDISR_PTR = _int_get_isr( init_ptr->RX_VECTOR);
info_ptr->RX_OLDISR_DATA = _int_get_isr_data(init_ptr->RX_VECTOR);
info_ptr->TX_OLDISR_PTR = _int_get_isr( init_ptr->TX_VECTOR);
info_ptr->TX_OLDISR_DATA = _int_get_isr_data(init_ptr->TX_VECTOR);
#if BSPCFG_IO_PCB_SHM_SUPPORT
if (_bsp_io_pcb_shm_int_install(init_ptr,info_ptr)!=MQX_OK) {
_mem_free(info_ptr);
return MQX_IO_PCB_SHM_INSTALL_ISR_FAILLED;
}
#else
/* Install rx ISR */
if (!_int_install_isr(init_ptr->RX_VECTOR, _io_pcb_shm_rx_isr, info_ptr))
{
_mem_free(info_ptr);
return MQX_IO_PCB_SHM_INSTALL_ISR_FAILLED;
}
/* Install the tx finished ISR */
if (!_int_install_isr(init_ptr->TX_VECTOR, _io_pcb_shm_tx_isr, info_ptr))
{
_mem_free(info_ptr);
return MQX_IO_PCB_SHM_INSTALL_ISR_FAILLED;
}
#endif
break;
case IO_PCB_IOCTL_UNPACKED_ONLY:
bool_param_ptr = (boolean _PTR_)param_ptr;
*bool_param_ptr = TRUE;
break;
default:
/* result = _io_ioctl(info_ptr->FD, cmd, param_ptr); */
break;
}
return result;
}
LPM_NOTIFICATION_RESULT _io_serial_int_operation_mode_callback
(
/* [IN] Low power notification */
LPM_NOTIFICATION_STRUCT_PTR notification,
/* [IN/OUT] Device specific data */
pointer device_specific_data
)
{
IO_SERIAL_INT_DEVICE_STRUCT_PTR dev_ptr = device_specific_data;
KUART_INIT_STRUCT_PTR init_data = dev_ptr->DEV_INIT_DATA_PTR;
uint_8 flags, tmp, bits;
if (LPM_NOTIFICATION_TYPE_PRE == notification->NOTIFICATION_TYPE)
{
/* Get the device registers */
UART_MemMapPtr sci_ptr = _bsp_get_serial_base_address (init_data->DEVICE);
if (NULL == sci_ptr)
{
return LPM_NOTIFICATION_RESULT_ERROR;
}
/* Lock access from the higher level */
_lwsem_wait (&(dev_ptr->LPM_INFO.LOCK));
/* Get required HW changes */
flags = init_data->OPERATION_MODE[notification->OPERATION_MODE].FLAGS;
/* Setup module clock to be able to write registers */
_bsp_serial_io_init (init_data->DEVICE, IO_PERIPHERAL_CLOCK_ENABLE);
/* Flush output if enabled */
if (sci_ptr->C2 & UART_C2_TE_MASK)
{
while (! (sci_ptr->SFIFO & UART_SFIFO_TXEMPT_MASK))
{ };
while (! (sci_ptr->S1 & UART_S1_TC_MASK))
{ };
}
/* Setup pin mux */
_bsp_serial_io_init (init_data->DEVICE, flags & (~ IO_PERIPHERAL_CLOCK_DISABLE));
/* Setup wakeup */
if (flags & IO_PERIPHERAL_WAKEUP_ENABLE)
{
bits = init_data->OPERATION_MODE[notification->OPERATION_MODE].WAKEUP_BITS;
tmp = sci_ptr->C1 & (~ (UART_C1_WAKE_MASK | UART_C1_ILT_MASK));
sci_ptr->C1 = tmp | (bits & (UART_C1_WAKE_MASK | UART_C1_ILT_MASK));
tmp = sci_ptr->C4 & (~ (UART_C4_MAEN1_MASK | UART_C4_MAEN2_MASK));
sci_ptr->C4 = tmp | (bits & (UART_C4_MAEN1_MASK | UART_C4_MAEN2_MASK));
sci_ptr->MA1 = init_data->OPERATION_MODE[notification->OPERATION_MODE].MA1;
sci_ptr->MA2 = init_data->OPERATION_MODE[notification->OPERATION_MODE].MA2;
tmp = sci_ptr->C2 & (~ (UART_C2_RWU_MASK));
sci_ptr->C2 = tmp | (bits & UART_C2_RWU_MASK);
dev_ptr->LPM_INFO.FLAGS = (flags & (IO_PERIPHERAL_WAKEUP_ENABLE | IO_PERIPHERAL_WAKEUP_SLEEPONEXIT_DISABLE));
}
else
{
sci_ptr->C2 &= (~ (UART_C2_RWU_MASK));
sci_ptr->C1 &= (~ (UART_C1_WAKE_MASK | UART_C1_ILT_MASK));
sci_ptr->C4 &= (~ (UART_C4_MAEN1_MASK | UART_C4_MAEN2_MASK));
sci_ptr->MA1 = 0;
sci_ptr->MA2 = 0;
dev_ptr->LPM_INFO.FLAGS = 0;
}
/* Enable/disable module according to operation mode */
if ((flags & IO_PERIPHERAL_MODULE_ENABLE) && (dev_ptr->COUNT > 0))
{
_kuart_int_peripheral_enable (sci_ptr);
}
else
{
_kuart_int_peripheral_disable (sci_ptr);
}
/* Disable module clocks if required */
if (flags & IO_PERIPHERAL_CLOCK_DISABLE)
{
_bsp_serial_io_init (init_data->DEVICE, IO_PERIPHERAL_CLOCK_DISABLE);
}
/* Unlock */
_lwsem_post (&(dev_ptr->LPM_INFO.LOCK));
}
return LPM_NOTIFICATION_RESULT_OK;
}
