/*
* flush_clwb -- (internal) flush the CPU cache, using clwb
*/
static void
flush_clwb(void *addr, size_t len)
{
LOG(15, "addr %p len %zu", addr, len);
uintptr_t uptr;
/*
* Loop through cache-line-size (typically 64B) aligned chunks
* covering the given range.
*/
for (uptr = (uintptr_t)addr & ~(FLUSH_ALIGN - 1);
uptr < (uintptr_t)addr + len; uptr += FLUSH_ALIGN) {
_mm_clwb((char *)uptr);
}
}
/*
* check_cpu_features -- validates CPU features detection
*/
static void
check_cpu_features(void)
{
if (is_cpu_clflush_present()) {
UT_OUT("CLFLUSH supported");
_mm_clflush(Buf);
} else {
UT_OUT("CLFLUSH not supported");
}
if (is_cpu_clflushopt_present()) {
UT_OUT("CLFLUSHOPT supported");
_mm_clflushopt(Buf);
} else {
UT_OUT("CLFLUSHOPT not supported");
}
if (is_cpu_clwb_present()) {
UT_OUT("CLWB supported");
_mm_clwb(Buf);
} else {
UT_OUT("CLWB not supported");
}
}
