void _c_int00(void)
{
/* USER CODE BEGIN (5) */
/* USER CODE END */
/* Reset handler: the following instructions read from the system exception status register
* to identify the cause of the CPU reset.
*/
switch(getResetSource())
{
case POWERON_RESET:
case DEBUG_RESET:
case EXT_RESET:
/* USER CODE BEGIN (6) */
/* USER CODE END */
/* Initialize L2RAM to avoid ECC errors right after power on */
_memInit_();
/* USER CODE BEGIN (7) */
/* USER CODE END */
/* Initialize Core Registers to avoid CCM Error */
_coreInitRegisters_();
/* USER CODE BEGIN (8) */
/* USER CODE END */
/* Initialize Stack Pointers */
_coreInitStackPointer_();
/* USER CODE BEGIN (9) */
/* USER CODE END */
/* Enable CPU Event Export */
/* This allows the CPU to signal any single-bit or double-bit errors detected
* by its ECC logic for accesses to program flash or data RAM.
*/
_coreEnableEventBusExport_();
/* USER CODE BEGIN (10) */
/* USER CODE END */
/* Check if there were ESM group3 errors during power-up.
* These could occur during eFuse auto-load or during reads from flash OTP
* during power-up. Device operation is not reliable and not recommended
* in this case. */
if ((esmREG->SR1[2]) != 0U)
{
esmGroup3Notification(esmREG,esmREG->SR1[2]);
}
/* Initialize System - Clock, Flash settings with Efuse self check */
systemInit();
/* USER CODE BEGIN (11) */
/* USER CODE END */
/* Enable IRQ offset via Vic controller */
_coreEnableIrqVicOffset_();
/* Initialize VIM table */
vimInit();
/* USER CODE BEGIN (12) */
/* USER CODE END */
/* Configure system response to error conditions signaled to the ESM group1 */
/* This function can be configured from the ESM tab of HALCoGen */
esmInit();
/* USER CODE BEGIN (13) */
/* USER CODE END */
break;
case OSC_FAILURE_RESET:
/* USER CODE BEGIN (14) */
/* USER CODE END */
break;
case WATCHDOG_RESET:
/* USER CODE BEGIN (15) */
/* USER CODE END */
break;
case CPU0_RESET:
case CPU1_RESET:
/* USER CODE BEGIN (16) */
/* USER CODE END */
/* Initialize Core Registers to avoid CCM Error */
_coreInitRegisters_();
/* USER CODE BEGIN (17) */
/* USER CODE END */
/* Initialize Stack Pointers */
_coreInitStackPointer_();
/* USER CODE BEGIN (18) */
/* USER CODE END */
/* Enable CPU Event Export */
/* This allows the CPU to signal any single-bit or double-bit errors detected
* by its ECC logic for accesses to program flash or data RAM.
*/
_coreEnableEventBusExport_();
/* USER CODE BEGIN (19) */
/* USER CODE END */
break;
case SW_RESET:
/* USER CODE BEGIN (20) */
/* USER CODE END */
break;
default:
/* USER CODE BEGIN (21) */
/* USER CODE END */
break;
}
/* USER CODE BEGIN (22) */
/* USER CODE END */
_mpuInit_();
/* USER CODE BEGIN (23) */
/* USER CODE END */
_cacheEnable_();
/* USER CODE BEGIN (24) */
/* USER CODE END */
/* USER CODE BEGIN (25) */
/* USER CODE END */
/* initialize global variable and constructors */
__TI_auto_init();
/* USER CODE BEGIN (26) */
/* USER CODE END */
/* call the application */
/*SAFETYMCUSW 296 S MR:8.6 <APPROVED> "Startup code(library functions at block scope)" */
/*SAFETYMCUSW 326 S MR:8.2 <APPROVED> "Startup code(Declaration for main in library)" */
/*SAFETYMCUSW 60 D MR:8.8 <APPROVED> "Startup code(Declaration for main in library;Only doing an extern for the same)" */
main();
/* USER CODE BEGIN (27) */
/* USER CODE END */
/*SAFETYMCUSW 122 S MR:20.11 <APPROVED> "Startup code(exit and abort need to be present)" */
exit(0);
/* USER CODE BEGIN (28) */
/* USER CODE END */
}
void main(void)
{
/* USER CODE BEGIN (3) */
uint32 No_Of_MPU_Region = 0;
uint32 error = 0;
sciInit();
sci_printf("TI Hercules Development Kit is running.\r\n", error);
sci_printf("MPU test is running...\r\n", error);
/* Initialize memory protection unit.
* Region configurations are selected using MPU Tab in HALCoGen.
* MPU is enabled in mpuInit function if "Enable MPU" in GUI is selected */
_mpuInit_();
/* This function returns the number of implemented mpu regions. */
No_Of_MPU_Region = _mpuGetNumberOfRegions_();
/* Check that device supports 12 Region. */
if(No_Of_MPU_Region != 12) {
error |= MPU_ERR_NUMBER_OF_REGIONS;
}
/* Select MPU Region 1 */
_mpuSetRegion_(mpuREGION6);
/* Check whether MPU Region 6 is selected */
if(_mpuGetRegion_() != mpuREGION6) {
/* Region 6 was Not selected */
error |= MPU_ERR_REGION_SELECTION;
}
/* Check the Base address configured for MPU Region 6 */
else if(_mpuGetRegionBaseAddress_() != SDRAM_BASE_ADDRESS) {
/*Region 6 Base address wrong */
error |= MPU_ERR_REGION_BASE_ADDRESS;
}
/* Check the Type configured for MPU Region 6 */
else if(_mpuGetRegionType_() != MPU_STRONGLYORDERED_SHAREABLE) {
/*Region 6 Type configured wrong */
error |= MPU_ERR_REGION_TYPE;
}
/* Check the Permission configured for MPU Region 6 */
else if(_mpuGetRegionPermission_() != MPU_PRIV_RW_USER_RW_EXEC) {
/*Region 6 Permission configured wrong */
error |= MPU_ERR_REGION_PERMISSION;
}
else {
/* Region 1 Configurations are checked,
* Matches MPU configuration through HALCoGen GUI */
asm(" nop");
}
if(error != 0)
{
sci_printf("MPU check failed: 0x%X\r\n", error);
/* Test Failed */
wait_forever();
}
else
{
sci_printf("MPU check passed.\r\n");
wait_forever();
}
/* USER CODE END */
}
