/**
* \brief Resets the hardware module
*
* This will reset the module to hardware defaults.
*
* \param[in,out] module Pointer to software module structure
*/
void i2c_slave_reset(
struct i2c_slave_module *const module)
{
/* Sanity check arguments */
Assert(module);
Assert(module->hw);
SercomI2cs *const i2c_hw = &(module->hw->I2CS);
#if I2C_SLAVE_CALLBACK_MODE == true
/* Reset module instance */
module->registered_callback = 0;
module->enabled_callback = 0;
module->buffer_length = 0;
module->buffer_remaining = 0;
module->buffer = NULL;
#endif
/* Disable module */
i2c_slave_disable(module);
#if I2C_SLAVE_CALLBACK_MODE == true
/* Clear all pending interrupts */
system_interrupt_enter_critical_section();
system_interrupt_clear_pending(_sercom_get_interrupt_vector(module->hw));
system_interrupt_leave_critical_section();
#endif
/* Wait for sync */
_i2c_slave_wait_for_sync(module);
/* Reset module */
i2c_hw->CTRLA.reg = SERCOM_I2CS_CTRLA_SWRST;
}
/**
* \brief Resets the hardware module
*
* Reset the module to hardware defaults.
*
* \param[in,out] module Pointer to software module structure
*/
void i2c_master_reset(struct i2c_master_module *const module)
{
/* Sanity check arguments */
Assert(module);
Assert(module->hw);
SercomI2cm *const i2c_module = &(module->hw->I2CM);
/* Wait for sync */
_i2c_master_wait_for_sync(module);
/* Disable module */
i2c_master_disable(module);
#if I2C_MASTER_CALLBACK_MODE == true
/* Clear all pending interrupts */
system_interrupt_enter_critical_section();
system_interrupt_clear_pending(_sercom_get_interrupt_vector(module->hw));
system_interrupt_leave_critical_section();
#endif
/* Wait for sync */
_i2c_master_wait_for_sync(module);
/* Reset module */
i2c_module->CTRLA.reg = SERCOM_I2CM_CTRLA_SWRST;
}
/**
* \brief Disable the SERCOM SPI module
*
* \param[in,out] module Driver instance to operate on.
*/
void spi_master_vec_disable(struct spi_master_vec_module *const module)
{
Assert(module);
Assert(module->sercom);
SercomSpi *const spi_hw = &(module->sercom->SPI);
system_interrupt_disable(_sercom_get_interrupt_vector(module->sercom));
# ifdef FEATURE_SPI_SYNC_SCHEME_VERSION_2
while (spi_hw->STATUS.reg) {
/* Intentionally left empty */
}
# else
while (spi_hw->STATUS.reg & SERCOM_SPI_STATUS_SYNCBUSY) {
/* Intentionally left empty */
}
# endif
spi_hw->CTRLB.reg = 0;
spi_hw->CTRLA.reg &= ~SERCOM_SPI_CTRLA_ENABLE;
module->rx_bufdesc_ptr = NULL;
module->tx_bufdesc_ptr = NULL;
module->direction = SPI_MASTER_VEC_DIRECTION_IDLE;
module->status = STATUS_OK;
}
/**
* \brief Enable the SERCOM SPI module
*
* This function must be called after \ref spi_master_vec_init() before a
* transfer can be started.
*
* \param[in,out] module Driver instance to operate on.
*/
void spi_master_vec_enable(const struct spi_master_vec_module *const module)
{
Assert(module);
Assert(module->sercom);
SercomSpi *const spi_hw = &(module->sercom->SPI);
spi_hw->INTENCLR.reg = SERCOM_SPI_INTFLAG_DRE | SERCOM_SPI_INTFLAG_RXC
| SERCOM_SPI_INTFLAG_TXC;
_spi_master_vec_wait_for_sync(spi_hw);
spi_hw->CTRLA.reg |= SERCOM_SPI_CTRLA_ENABLE;
system_interrupt_enable(_sercom_get_interrupt_vector(module->sercom));
}
/**
* \brief Disable the SERCOM SPI module
*
* \param[in,out] module Driver instance to operate on.
*/
void spi_master_vec_disable(struct spi_master_vec_module *const module)
{
Assert(module);
Assert(module->sercom);
SercomSpi *const spi_hw = &(module->sercom->SPI);
system_interrupt_disable(_sercom_get_interrupt_vector(module->sercom));
_spi_master_vec_wait_for_sync(spi_hw);
spi_hw->INTENCLR.reg = SERCOM_SPI_INTENCLR_MASK;
spi_hw->INTFLAG.reg = SERCOM_SPI_INTFLAG_MASK;
spi_hw->CTRLB.reg = 0;
spi_hw->CTRLA.reg &= ~SERCOM_SPI_CTRLA_ENABLE;
module->rx_bufdesc_ptr = NULL;
module->tx_bufdesc_ptr = NULL;
module->direction = SPI_MASTER_VEC_DIRECTION_IDLE;
module->status = STATUS_OK;
}
/**
* \brief Enable the SERCOM SPI module
*
* This function must be called after \ref spi_master_vec_init() before a
* transfer can be started.
*
* \param[in,out] module Driver instance to operate on.
*/
void spi_master_vec_enable(const struct spi_master_vec_module *const module)
{
Assert(module);
Assert(module->sercom);
SercomSpi *const spi_hw = &(module->sercom->SPI);
spi_hw->INTENCLR.reg = SERCOM_SPI_INTFLAG_DRE | SERCOM_SPI_INTFLAG_RXC
| SERCOM_SPI_INTFLAG_TXC;
# ifdef FEATURE_SPI_SYNC_SCHEME_VERSION_2
while (spi_hw->STATUS.reg) {
/* Intentionally left empty */
}
# else
while (spi_hw->STATUS.reg & SERCOM_SPI_STATUS_SYNCBUSY) {
/* Intentionally left empty */
}
# endif
spi_hw->CTRLA.reg |= SERCOM_SPI_CTRLA_ENABLE;
system_interrupt_enable(_sercom_get_interrupt_vector(module->sercom));
}
