void up_irqinitialize(void)
{
int i;
/* The following operations need to be atomic, but since this function is
* called early in the initialization sequence, we expect to have exclusive
* access to the INTC.
*/
/* Disable, mask, and clear all interrupts */
for (i = 0; i < A1X_IRQ_NINT; i += 32)
{
putreg32(0x00000000, A1X_INTC_EN(i)); /* 0 disables corresponding interrupt */
putreg32(0xffffffff, A1X_INTC_MASK(i)); /* 1 masks corresponding interrupt */
(void)getreg32(A1X_INTC_IRQ_PEND(i)); /* Reading status clears pending interrupts */
}
/* Colorize the interrupt stack for debug purposes */
#if defined(CONFIG_DEBUG_STACK) && CONFIG_ARCH_INTERRUPTSTACK > 3
{
size_t intstack_size = (CONFIG_ARCH_INTERRUPTSTACK & ~3);
up_stack_color((FAR void *)((uintptr_t)&g_intstackbase - intstack_size),
intstack_size);
}
#endif
/* Set the interrupt base address to zero. We do not use the vectored
* interrupts.
*/
putreg32(0, A1X_INTC_BASEADDR);
/* currents_regs is non-NULL only while processing an interrupt */
current_regs = NULL;
#ifndef CONFIG_SUPPRESS_INTERRUPTS
#ifdef CONFIG_A1X_PIO_IRQ
/* Initialize logic to support a second level of interrupt decoding for PIO pins. */
a1x_pio_irqinitialize();
#endif
/* And finally, enable interrupts */
(void)irqenable();
#endif
a1x_dumpintc("initial", 0);
}
void up_irqinitialize(void)
{
/* The following operations need to be atomic, but since this function is
* called early in the initialization sequence, we expect to have exclusive
* access to the INTC.
*/
/* Colorize the interrupt stack for debug purposes */
#if defined(CONFIG_DEBUG_STACK) && CONFIG_ARCH_INTERRUPTSTACK > 3
{
size_t intstack_size = (CONFIG_ARCH_INTERRUPTSTACK & ~3);
up_stack_color((FAR void *)((uintptr_t)&g_intstackbase - intstack_size),
intstack_size);
}
#endif
/* Set the interrupt base address to zero. We do not use the vectored
* interrupts.
*/
putreg32(0, A1X_INTC_BASEADDR);
/* currents_regs is non-NULL only while processing an interrupt */
current_regs = NULL;
#ifndef CONFIG_SUPPRESS_INTERRUPTS
#ifdef CONFIG_A1X_PIO_IRQ
/* Initialize logic to support a second level of interrupt decoding for PIO pins. */
a1x_pio_irqinitialize();
#endif
/* And finally, enable interrupts */
(void)irqenable();
#endif
}
