/*
* ABE_IRQ_PROCESSING
*
* Parameter :
* No parameter
*
* Operations :
* This subroutine is call upon reception of "MA_IRQ_99 ABE_MPU_IRQ" ABE interrupt
* This subroutine will check the IRQ_FIFO from the AE and act accordingly.
* Some IRQ source are originated for the delivery of "end of time sequenced tasks"
* notifications, some are originated from the Ping-Pong protocols, some are generated from
* the embedded debugger when the firmware stops on programmable break-points, etc …
*
* Return value :
* None.
*/
void abe_irq_processing(void)
{
abe_uint32 clear_abe_irq;
abe_uint32 abe_irq_dbg_write_ptr, i, cmem_src, sm_cm = 0;
abe_irq_data_t IRQ_data;
_lock_enter
_log(id_irq_processing,0,0,0)
#define IrqFiFoMask ((D_McuIrqFifo_sizeof >> 2) - 1)
/* extract the write pointer index from CMEM memory (INITPTR format) */
/* CMEM address of the write pointer in bytes */
cmem_src = MCU_IRQ_FIFO_ptr_labelID * 4;
abe_block_copy(COPY_FROM_ABE_TO_HOST, ABE_CMEM, cmem_src,
(abe_uint32*)&abe_irq_dbg_write_ptr,
sizeof (abe_irq_dbg_write_ptr));
abe_irq_dbg_write_ptr = sm_cm >> 16; /* AESS left-pointer index located on MSBs */
abe_irq_dbg_write_ptr &= 0xFF;
/* loop on the IRQ FIFO content */
for (i = 0; i < D_McuIrqFifo_sizeof; i++) {
/* stop when the FIFO is empty */
if (abe_irq_dbg_write_ptr == abe_irq_dbg_read_ptr)
break;
/* read the IRQ/DBG FIFO */
abe_block_copy(COPY_FROM_ABE_TO_HOST, ABE_DMEM,
D_McuIrqFifo_ADDR + (i << 2), (abe_uint32 *)&IRQ_data,
sizeof (IRQ_data));
abe_irq_dbg_read_ptr = (abe_irq_dbg_read_ptr + 1) & IrqFiFoMask;
/* select the source of the interrupt */
switch (IRQ_data.tag) {
case IRQtag_APS:
_log(id_irq_processing,(abe_uint32)(IRQ_data.data),0,1)
abe_irq_aps (IRQ_data.data);
break;
case IRQtag_PP:
_log(id_irq_processing,0,0,2)
abe_irq_ping_pong ();
break;
case IRQtag_COUNT:
_log(id_irq_processing,(abe_uint32)(IRQ_data.data),0,3)
abe_irq_check_for_sequences (IRQ_data.data);
break;
default:
break;
}
}
abe_monitoring();
clear_abe_irq = 1;
abe_block_copy(COPY_FROM_HOST_TO_ABE, ABE_ATC, ABE_MCU_IRQSTATUS,
&clear_abe_irq, 4);
_lock_exit
}
/**
* omap_abe_irq_processing - Process ABE interrupt
* @abe: Pointer on abe handle
*
* This subroutine is call upon reception of "MA_IRQ_99 ABE_MPU_IRQ" Audio
* back-end interrupt. This subroutine will check the ATC Hrdware, the
* IRQ_FIFO from the AE and act accordingly. Some IRQ source are originated
* for the delivery of "end of time sequenced tasks" notifications, some are
* originated from the Ping-Pong protocols, some are generated from
* the embedded debugger when the firmware stops on programmable break-points,
* etc ...
*/
int omap_abe_irq_processing(struct omap_abe *abe)
{
u32 abe_irq_dbg_write_ptr, i, cmem_src, sm_cm;
abe_irq_data_t IRQ_data;
_log(ABE_ID_IRQ_PROCESSING, 0, 0, 0);
/* extract the write pointer index from CMEM memory (INITPTR format) */
/* CMEM address of the write pointer in bytes */
cmem_src = MCU_IRQ_FIFO_ptr_labelID << 2;
omap_abe_mem_read(abe, OMAP_ABE_CMEM, cmem_src,
&sm_cm, sizeof(abe_irq_dbg_write_ptr));
/* AESS left-pointer index located on MSBs */
abe_irq_dbg_write_ptr = sm_cm >> 16;
abe_irq_dbg_write_ptr &= 0xFF;
/* loop on the IRQ FIFO content */
for (i = 0; i < OMAP_ABE_D_MCUIRQFIFO_SIZE; i++) {
/* stop when the FIFO is empty */
if (abe_irq_dbg_write_ptr == abe->irq_dbg_read_ptr)
break;
/* read the IRQ/DBG FIFO */
omap_abe_mem_read(abe, OMAP_ABE_DMEM,
(OMAP_ABE_D_MCUIRQFIFO_ADDR +
(abe->irq_dbg_read_ptr << 2)),
(u32 *) &IRQ_data, sizeof(IRQ_data));
abe->irq_dbg_read_ptr = (abe->irq_dbg_read_ptr + 1) & OMAP_ABE_IRQ_FIFO_MASK;
/* select the source of the interrupt */
switch (IRQ_data.tag) {
case IRQtag_APS:
_log(ABE_ID_IRQ_PROCESSING, IRQ_data.data, 0, 1);
abe_irq_aps(IRQ_data.data);
break;
case IRQtag_PP:
_log(ABE_ID_IRQ_PROCESSING, 0, 0, 2);
abe_irq_ping_pong();
break;
case IRQtag_COUNT:
_log(ABE_ID_IRQ_PROCESSING, IRQ_data.data, 0, 3);
abe_irq_check_for_sequences(IRQ_data.data);
abe_monitoring();
break;
default:
break;
}
}
return 0;
}
