Component *ComponentFactory::produce(const std::string &name, const std::vector<std::string> &inPort, const std::vector<std::string> &outPort)
{
Component *comp = produce(name);
addPorts(comp, inPort, PortType::Slot);
addPorts(comp, outPort, PortType::Signal);
postcondition(comp != nullptr);
postcondition(comp->getPorts().size() == inPort.size() + outPort.size());
return comp;
}
int capture_parsePortStr(const char *str,
uint16_t localPorts[],
size_t maxLocalPorts,
int noDup) {
const char *p, *p2, *pdata;
size_t numPortsAdded = 0;
char buf[64];
int rc;
p = str;
while(p && numPortsAdded < maxLocalPorts) {
if((p2 = strstr(p, ","))) {
pdata = strutil_safe_copyToBuf(buf, sizeof(buf), p, p2);
} else {
pdata = p;
}
if((rc = addPorts(pdata, localPorts, &numPortsAdded, maxLocalPorts, noDup)) < 0) {
LOG(X_ERROR("Invalid port specified in '%s'"), str);
return rc;
}
if((p = p2)) {
p++;
}
}
return numPortsAdded;
}
void
Oscillator::init( DataBlock* w )
{
addPorts("frq", INPUT, oscillator_frq_changed, 0, 1,
"amp", INPUT, NULL,
"zro", INPUT, NULL,
"sync", INPUT, oscillator_sync_changed, 0, 1,
"sig", OUTPUT, true,
"sync", OUTPUT, false,
NULL);
output = &outputs[ O_OSC_SIG ];
inFrq = inputs[0].data;
inAmp = inputs[1].data;
inZro = inputs[2].data;
inSync = inputs[3].data;
lastTrigger = 0;
if ( w != NULL )
{
setWaveData( w );
}
Scheduler::scheduleSampleRate(this, true);
}
Balance::Balance()
{
addPorts( "sig", OUTPUT, true,
NULL);
inputs.appendElement( rms1.getInput( I_RMS_SIG ) );
inputs.appendElement( rms2.getInput( I_RMS_SIG ) );
power1 = &rms1.getOutput( O_RMS_POWER )->data;
power2 = &rms2.getOutput( O_RMS_POWER )->data;
output = &outputs[ O_BAL_SIG ]; // just for optimization
inSig = inputs[1].data;
Scheduler::scheduleSampleRate( this, true );
}
