void dma_pi_read()
{
int i;
if (pi_register.pi_cart_addr_reg >= 0x08000000 &&
pi_register.pi_cart_addr_reg < 0x08010000)
{
if (use_flashram != 1)
{
sramWritten = TRUE;
for (i=0; i<(pi_register.pi_rd_len_reg & 0xFFFFFF)+1; i++)
sram[((pi_register.pi_cart_addr_reg-0x08000000)+i)^S8]=
((unsigned char*)rdram)[(pi_register.pi_dram_addr_reg+i)^S8];
use_flashram = -1;
}
else
dma_write_flashram();
}
// else
// printf("unknown dma read\n");
pi_register.read_pi_status_reg |= 1;
update_count();
add_interupt_event(PI_INT, 0x1000/*pi_register.pi_rd_len_reg*/);
}
static void dma_si_write(struct si_controller* si)
{
int i;
if (si->regs[SI_PIF_ADDR_WR64B_REG] != 0x1FC007C0)
{
DebugMessage(si->r4300->state, M64MSG_ERROR, "dma_si_write(): unknown SI use");
si->r4300->state->stop=1;
}
for (i = 0; i < PIF_RAM_SIZE; i += 4)
{
*((uint32_t*)(&si->pif.ram[i])) = sl(si->ri->rdram.dram[(si->regs[SI_DRAM_ADDR_REG]+i)/4]);
}
if (si->r4300->state->enable_trimming_mode)
{
for (i = 0; i < PIF_RAM_SIZE; i += 4)
{
unsigned int ram_address = si->regs[SI_DRAM_ADDR_REG] + i;
if (!bit_array_test(si->r4300->state->barray_ram_written_first, ram_address / 4))
bit_array_set(si->r4300->state->barray_ram_read, ram_address / 4);
}
}
update_pif_write(si);
update_count(si->r4300->state);
if (si->r4300->state->g_delay_si) {
add_interupt_event(si->r4300->state, SI_INT, /*0x100*/0x900);
} else {
si->regs[SI_STATUS_REG] |= 0x1000; // INTERRUPT
signal_rcp_interrupt(si->r4300, MI_INTR_SI);
}
}
static void dma_si_read(struct si_controller* si)
{
int i;
if (si->regs[SI_PIF_ADDR_RD64B_REG] != 0x1FC007C0)
{
DebugMessage(M64MSG_ERROR, "dma_si_read(): unknown SI use");
return;
}
update_pif_read(si);
for (i = 0; i < PIF_RAM_SIZE; i += 4)
{
si->ri->rdram.dram[(si->regs[SI_DRAM_ADDR_REG]+i)/4] = sl(*(uint32_t*)(&si->pif.ram[i]));
}
cp0_update_count();
if (g_delay_si) {
add_interupt_event(SI_INT, /*0x100*/0x900);
} else {
si->regs[SI_STATUS_REG] |= 0x1000; // INTERRUPT
signal_rcp_interrupt(si->r4300, MI_INTR_SI);
}
}
void dma_si_read()
{
int i;
if (si_register.si_pif_addr_rd64b != 0x1FC007C0)
{
// printf("unknown SI use\n");
stop=1;
}
update_pif_read();
for (i=0; i<(64/4); i++)
rdram[si_register.si_dram_addr/4+i] = sl(PIF_RAM[i]);
update_count();
add_interupt_event(SI_INT, /*0x100*/0x900);
}
int write_ai_regs(void* opaque, uint32_t address, uint32_t value, uint32_t mask)
{
struct ai_controller* ai = (struct ai_controller*)opaque;
uint32_t reg = ai_reg(address);
unsigned int freq,delay=0;
switch (reg)
{
case AI_LEN_REG:
masked_write(&ai->regs[AI_LEN_REG], value, mask);
audio.aiLenChanged();
freq = ROM_PARAMS.aidacrate / (ai->regs[AI_DACRATE_REG]+1);
if (freq)
delay = (unsigned int) (((unsigned long long)ai->regs[AI_LEN_REG]*ai->vi->delay*ROM_PARAMS.vilimit)/(freq*4));
if (ai->regs[AI_STATUS_REG] & 0x40000000) // busy
{
ai->fifo[1].delay = delay;
ai->fifo[1].length = ai->regs[AI_LEN_REG];
ai->regs[AI_STATUS_REG] |= 0x80000000;
}
else
{
ai->fifo[0].delay = delay;
ai->fifo[0].length = ai->regs[AI_LEN_REG];
update_count();
add_interupt_event(AI_INT, delay);
ai->regs[AI_STATUS_REG] |= 0x40000000;
}
return 0;
case AI_STATUS_REG:
clear_rcp_interrupt(ai->r4300, MI_INTR_AI);
return 0;
case AI_DACRATE_REG:
if ((ai->regs[AI_DACRATE_REG] & mask) != (value & mask))
{
masked_write(&ai->regs[AI_DACRATE_REG], value, mask);
audio.aiDacrateChanged(ROM_PARAMS.systemtype);
}
return 0;
}
masked_write(&ai->regs[reg], value, mask);
return 0;
}
void dma_pi_read()
{
int i;
if (pi_register.pi_cart_addr_reg >= 0x08000000 &&
pi_register.pi_cart_addr_reg < 0x08010000)
{
if (use_flashram != 1)
{
char *filename;
FILE *f;
filename = (char*)malloc(strlen(get_savespath())+
strlen(ROM_SETTINGS.goodname)+4+1);
strcpy(filename, get_savespath());
strcat(filename, ROM_SETTINGS.goodname);
strcat(filename, ".sra");
f = fopen(filename, "rb");
if (f)
{
fread(sram, 1, 0x8000, f);
fclose(f);
}
else for (i=0; i<0x8000; i++) sram[i] = 0;
for (i=0; i<(pi_register.pi_rd_len_reg & 0xFFFFFF)+1; i++)
sram[((pi_register.pi_cart_addr_reg-0x08000000)+i)^S8]=
((unsigned char*)rdram)[(pi_register.pi_dram_addr_reg+i)^S8];
f = fopen(filename, "wb");
fwrite(sram, 1, 0x8000, f);
fclose(f);
free(filename);
use_flashram = -1;
}
else
dma_write_flashram();
}
else
printf("unknown dma read\n");
pi_register.read_pi_status_reg |= 1;
update_count();
add_interupt_event(PI_INT, 0x1000/*pi_register.pi_rd_len_reg*/);
}
void add_interupt_event_count(int type, unsigned int count)
{
add_interupt_event(type, (count - Count)/*/2*/);
}
void dma_pi_write()
{
unsigned long longueur;
int i;
if (pi_register.pi_cart_addr_reg < 0x10000000)
{
if (pi_register.pi_cart_addr_reg >= 0x08000000 &&
pi_register.pi_cart_addr_reg < 0x08010000)
{
if (use_flashram != 1)
{
for (i=0; i<(pi_register.pi_wr_len_reg & 0xFFFFFF)+1; i++)
((unsigned char*)rdram)[(pi_register.pi_dram_addr_reg+i)^S8]=
sram[(((pi_register.pi_cart_addr_reg-0x08000000)&0xFFFF)+i)^S8];
use_flashram = -1;
}
else
dma_read_flashram();
}
else if (pi_register.pi_cart_addr_reg >= 0x06000000 &&
pi_register.pi_cart_addr_reg < 0x08000000)
{
}
// else
// printf("unknown dma write:%x\n", (int)pi_register.pi_cart_addr_reg);
pi_register.read_pi_status_reg |= 1;
update_count();
add_interupt_event(PI_INT, /*pi_register.pi_wr_len_reg*/0x1000);
return;
}
if (pi_register.pi_cart_addr_reg >= 0x1fc00000) // for paper mario
{
pi_register.read_pi_status_reg |= 1;
update_count();
add_interupt_event(PI_INT, 0x1000);
return;
}
longueur = (pi_register.pi_wr_len_reg & 0xFFFFFF)+1;
i = (pi_register.pi_cart_addr_reg-0x10000000)&0x3FFFFFF;
longueur = (i + longueur) > rom_length ?
(rom_length - i) : longueur;
longueur = (pi_register.pi_dram_addr_reg + longueur) > MEMMASK ?
(MEMMASK - pi_register.pi_dram_addr_reg) : longueur;
if(i>rom_length || pi_register.pi_dram_addr_reg > MEMMASK)
{
pi_register.read_pi_status_reg |= 3;
update_count();
add_interupt_event(PI_INT, longueur/8);
return;
}
ROMCache_read(rdramb + pi_register.pi_dram_addr_reg, (pi_register.pi_cart_addr_reg-0x10000000)&0x3FFFFFF, longueur);
if(!interpcore)
{
for (i=0; i<longueur; i++)
{
unsigned long rdram_address1 = pi_register.pi_dram_addr_reg+i+0x80000000;
unsigned long rdram_address2 = pi_register.pi_dram_addr_reg+i+0xa0000000;
invalidate_func(rdram_address1);
invalidate_func(rdram_address2);
}
}
// Set the RDRAM memory size when copying main ROM code
// (This is just a convenient way to run this code once at the beginning)
if (pi_register.pi_cart_addr_reg == 0x10001000)
{
switch(CIC_Chip)
{
case 1:
case 2:
case 3:
case 6:
#ifdef USE_EXPANSION
rdram[0x318/4] = 0x800000;
#else
rdram[0x318/4] = 0x400000;
#endif
break;
case 5:
#ifdef USE_EXPANSION
rdram[0x3F0/4] = 0x800000;
#else
rdram[0x3F0/4] = 0x400000;
#endif
break;
}
/* DK64 Fix */
/*if(strncmp(ROM_HEADER->nom, "DONKEY KONG 64", 14) == 0)
rdram[0x2FE1C0/4] = 0xAD170014;*/
}
pi_register.read_pi_status_reg |= 3;
update_count();
add_interupt_event(PI_INT, longueur/8);
return;
}
void event_sdl_keydown(int keysym, int keymod)
{
/* check for the only 2 hard-coded key commands: Alt-enter for fullscreen and 0-9 for save state slot */
if (keysym == SDLK_RETURN && keymod & (KMOD_LALT | KMOD_RALT))
{
changeWindow();
}
else if (keysym >= SDLK_0 && keysym <= SDLK_9)
{
main_state_set_slot(keysym - SDLK_0);
}
/* check all of the configurable commands */
else if (keysym == ConfigGetParamInt(g_CoreConfig, kbdStop))
main_stop();
else if (keysym == ConfigGetParamInt(g_CoreConfig, kbdFullscreen))
changeWindow();
else if (keysym == ConfigGetParamInt(g_CoreConfig, kbdSave))
main_state_save(0, NULL); /* save in mupen64plus format using current slot */
else if (keysym == ConfigGetParamInt(g_CoreConfig, kbdLoad))
main_state_load(NULL); /* load using current slot */
else if (keysym == ConfigGetParamInt(g_CoreConfig, kbdIncrement))
main_state_inc_slot();
else if (keysym == ConfigGetParamInt(g_CoreConfig, kbdReset))
{
add_interupt_event(HW2_INT, 0); /* Hardware 2 Interrupt immediately */
add_interupt_event(NMI_INT, 50000000); /* Non maskable Interrupt after 1/2 second */
}
else if (keysym == ConfigGetParamInt(g_CoreConfig, kbdSpeeddown))
main_speeddown(5);
else if (keysym == ConfigGetParamInt(g_CoreConfig, kbdSpeedup))
main_speedup(5);
else if (keysym == ConfigGetParamInt(g_CoreConfig, kbdScreenshot))
main_take_next_screenshot(); /* screenshot will be taken at the end of frame rendering */
else if (keysym == ConfigGetParamInt(g_CoreConfig, kbdPause))
main_toggle_pause();
else if (keysym == ConfigGetParamInt(g_CoreConfig, kbdMute))
{
volumeMute();
main_draw_volume_osd();
}
else if (keysym == ConfigGetParamInt(g_CoreConfig, kbdIncrease))
{
volumeUp();
main_draw_volume_osd();
}
else if (keysym == ConfigGetParamInt(g_CoreConfig, kbdDecrease))
{
volumeDown();
main_draw_volume_osd();
}
else if (keysym == ConfigGetParamInt(g_CoreConfig, kbdForward))
{
main_set_fastforward(1);
}
else if (keysym == ConfigGetParamInt(g_CoreConfig, kbdAdvance))
{
main_advance_one();
}
else if (keysym == ConfigGetParamInt(g_CoreConfig, kbdGameshark))
{
KbdGamesharkPressed = 1;
}
else
{
/* pass all other keypresses to the input plugin */
keyDown(keymod, keysym);
}
}
void add_interupt_event_count(int type, unsigned long count)
{
add_interupt_event(type, (count - Count));
}
void dma_pi_write()
{
unsigned long longueur;
int i;
if (pi_register.pi_cart_addr_reg < 0x10000000)
{
if (pi_register.pi_cart_addr_reg >= 0x08000000 &&
pi_register.pi_cart_addr_reg < 0x08010000)
{
if (use_flashram != 1)
{
char *filename;
FILE *f;
int i;
filename = (char*)malloc(strlen(get_savespath())+
strlen(ROM_SETTINGS.goodname)+4+1);
strcpy(filename, get_savespath());
strcat(filename, ROM_SETTINGS.goodname);
strcat(filename, ".sra");
f = fopen(filename, "rb");
if (f)
{
fread(sram, 1, 0x8000, f);
fclose(f);
}
else for (i=0; i<0x8000; i++) sram[i] = 0x0;
free(filename);
for (i=0; i<(pi_register.pi_wr_len_reg & 0xFFFFFF)+1; i++)
((unsigned char*)rdram)[(pi_register.pi_dram_addr_reg+i)^S8]=
sram[(((pi_register.pi_cart_addr_reg-0x08000000)&0xFFFF)+i)^S8];
use_flashram = -1;
}
else
dma_read_flashram();
}
else if (pi_register.pi_cart_addr_reg >= 0x06000000 &&
pi_register.pi_cart_addr_reg < 0x08000000)
{
}
else
printf("unknown dma write:%x\n", (int)pi_register.pi_cart_addr_reg);
pi_register.read_pi_status_reg |= 1;
update_count();
add_interupt_event(PI_INT, /*pi_register.pi_wr_len_reg*/0x1000);
return;
}
if (pi_register.pi_cart_addr_reg >= 0x1fc00000) // for paper mario
{
pi_register.read_pi_status_reg |= 1;
update_count();
add_interupt_event(PI_INT, 0x1000);
return;
}
longueur = (pi_register.pi_wr_len_reg & 0xFFFFFF)+1;
i = (pi_register.pi_cart_addr_reg-0x10000000)&0x3FFFFFF;
longueur = (i + longueur) > taille_rom ?
(taille_rom - i) : longueur;
longueur = (pi_register.pi_dram_addr_reg + longueur) > 0x7FFFFF ?
(0x7FFFFF - pi_register.pi_dram_addr_reg) : longueur;
if(i>taille_rom || pi_register.pi_dram_addr_reg > 0x7FFFFF)
{
pi_register.read_pi_status_reg |= 3;
update_count();
add_interupt_event(PI_INT, longueur/8);
return;
}
if(!interpcore)
{
for (i=0; i<longueur; i++)
{
unsigned long rdram_address1 = pi_register.pi_dram_addr_reg+i+0x80000000;
unsigned long rdram_address2 = pi_register.pi_dram_addr_reg+i+0xa0000000;
((unsigned char*)rdram)[(pi_register.pi_dram_addr_reg+i)^S8]=
rom[(((pi_register.pi_cart_addr_reg-0x10000000)&0x3FFFFFF)+i)^S8];
if(!invalid_code[rdram_address1>>12])
if(blocks[rdram_address1>>12]->block[(rdram_address1&0xFFF)/4].ops != NOTCOMPILED)
invalid_code[rdram_address1>>12] = 1;
if(!invalid_code[rdram_address2>>12])
if(blocks[rdram_address2>>12]->block[(rdram_address2&0xFFF)/4].ops != NOTCOMPILED)
invalid_code[rdram_address2>>12] = 1;
}
}
else
{
for (i=0; i<longueur; i++)
void do_SP_Task(struct rsp_core* sp)
{
uint32_t save_pc = sp->regs2[SP_PC_REG] & ~0xfff;
if (sp->mem[0xfc0/4] == 1)
{
if (sp->dp->dpc_regs[DPC_STATUS_REG] & DPC_STATUS_FREEZE) // DP frozen (DK64, BC)
{
// don't do the task now
// the task will be done when DP is unfreezed (see update_dpc_status)
return;
}
unprotect_framebuffers(sp->dp);
//gfx.processDList();
sp->regs2[SP_PC_REG] &= 0xfff;
timed_section_start(TIMED_SECTION_GFX);
rsp.doRspCycles(0xffffffff);
timed_section_end(TIMED_SECTION_GFX);
sp->regs2[SP_PC_REG] |= save_pc;
new_frame();
cp0_update_count();
if (sp->r4300->mi.regs[MI_INTR_REG] & MI_INTR_SP)
add_interupt_event(SP_INT, 1000);
if (sp->r4300->mi.regs[MI_INTR_REG] & MI_INTR_DP)
add_interupt_event(DP_INT, 1000);
sp->r4300->mi.regs[MI_INTR_REG] &= ~(MI_INTR_SP | MI_INTR_DP);
sp->regs[SP_STATUS_REG] &= ~SP_STATUS_TASKDONE;
protect_framebuffers(sp->dp);
}
else if (sp->mem[0xfc0/4] == 2)
{
//audio.processAList();
sp->regs2[SP_PC_REG] &= 0xfff;
timed_section_start(TIMED_SECTION_AUDIO);
rsp.doRspCycles(0xffffffff);
timed_section_end(TIMED_SECTION_AUDIO);
sp->regs2[SP_PC_REG] |= save_pc;
cp0_update_count();
if (sp->r4300->mi.regs[MI_INTR_REG] & MI_INTR_SP)
add_interupt_event(SP_INT, 4000/*500*/);
sp->r4300->mi.regs[MI_INTR_REG] &= ~MI_INTR_SP;
sp->regs[SP_STATUS_REG] &= ~(SP_STATUS_TASKDONE | SP_STATUS_YIELDED);
}
else
{
sp->regs2[SP_PC_REG] &= 0xfff;
rsp.doRspCycles(0xffffffff);
sp->regs2[SP_PC_REG] |= save_pc;
cp0_update_count();
if (sp->r4300->mi.regs[MI_INTR_REG] & MI_INTR_SP)
add_interupt_event(SP_INT, 0/*100*/);
sp->r4300->mi.regs[MI_INTR_REG] &= ~MI_INTR_SP;
sp->regs[SP_STATUS_REG] &= ~SP_STATUS_TASKDONE;
}
}
