static irqreturn_t mtk_wdt_isr(int irq, void *dev_id)
{
//printk("fwq mtk_wdt_isr\n" );
#ifndef __USING_DUMMY_WDT_DRV__ /* FPGA will set this flag */
//mt65xx_irq_mask(AP_RGU_WDT_IRQ_ID);
rgu_wdt_intr_has_trigger = 1;
//wdt_report_info () ;
aee_wdt_irq_info();
#endif
return IRQ_HANDLED;
}
//irq handler
static irqreturn_t wdt_handler(int irq, void *dev_id)
{
int cpu = smp_processor_id();
struct mpcore_wdt wdt;
// mt_trace_ISR_start(30);
/* Disable ext wdt (rgu) */
//mtk_wdt_disable();
wdt.base = (void __iomem*)0xf000a600;
printk("wdt_irq control: 0x%x, count:0x%x, load:0x%x\n", readl(wdt.base + TWD_WDOG_CONTROL), readl(wdt.base + TWD_WDOG_COUNTER), readl(wdt.base + TWD_WDOG_LOAD));
printk("wdt_irq Triggered :cpu-%d\n", cpu);
if (readl(wdt.base + TWD_WDOG_INTSTAT)) {
// __inc_irq_stat(cpu, local_timer_irqs);
writel(1, wdt.base + TWD_WDOG_INTSTAT);
}
printk("wdt_irq exit :cpu-%d\n", cpu);
aee_wdt_irq_info();
// mt_trace_ISR_end(30);
return IRQ_HANDLED;
}