static void __init cpe510_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f830008);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
/* Disable JTAG, enabling GPIOs 0-3 */
/* Configure OBS4 line, for GPIO 4*/
ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE,
AR934X_GPIO_FUNC_CLK_OBS4_EN);
ath79_register_leds_gpio(-1, ARRAY_SIZE(cpe510_leds_gpio),
cpe510_leds_gpio);
ath79_register_gpio_keys_polled(1, CPE510_KEYS_POLL_INTERVAL,
ARRAY_SIZE(cpe510_gpio_keys),
cpe510_gpio_keys);
ath79_wmac_set_ext_lna_gpio(0, CPE510_GPIO_EXTERNAL_LNA0);
ath79_wmac_set_ext_lna_gpio(1, CPE510_GPIO_EXTERNAL_LNA1);
ath79_register_m25p80(NULL);
ath79_register_mdio(1, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_register_eth(1);
ath79_register_wmac(ee, mac);
}
static void __init alfa_nx_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE,
AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
ath79_register_m25p80(&alfa_nx_flash_data);
ath79_register_leds_gpio(0, ARRAY_SIZE(alfa_nx_leds_gpio),
alfa_nx_leds_gpio);
ath79_register_gpio_keys_polled(-1, ALFA_NX_KEYS_POLL_INTERVAL,
ARRAY_SIZE(alfa_nx_gpio_keys),
alfa_nx_gpio_keys);
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr,
art + ALFA_NX_MAC0_OFFSET, 0);
ath79_init_mac(ath79_eth1_data.mac_addr,
art + ALFA_NX_MAC1_OFFSET, 0);
/* WAN port */
ath79_register_eth(0);
/* LAN port */
ath79_register_eth(1);
ap91_pci_init(art + ALFA_NX_CALDATA_OFFSET, NULL);
}
static void __init ds_setup(void)
{
#ifdef DS2_PREV_RESET_PIN
u32 t;
#endif
ds_common_setup();
ath79_register_leds_gpio(-1, ARRAY_SIZE(ds_leds_gpio),
ds_leds_gpio);
ath79_register_gpio_keys_polled(-1, DS_KEYS_POLL_INTERVAL,
ARRAY_SIZE(ds_gpio_keys),
ds_gpio_keys);
ath79_register_usb();
//Disable the Function for some pins to have GPIO functionality active
// GPIO6-7-8 and GPIO11
ath79_gpio_function_setup(AR933X_GPIO_FUNC_JTAG_DISABLE | AR933X_GPIO_FUNC_I2S_MCK_EN, 0);
ath79_gpio_function2_setup(AR933X_GPIO_FUNC2_JUMPSTART_DISABLE, 0);
printk("Setting DogStick2 GPIO\n");
#ifdef DS2_PREV_RESET_PIN
t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN;
ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t);
// Put the avr reset to high
if (gpio_request_one(DS_GPIO_AVR_RESET_DS2,
GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
"OE-1") != 0)
printk("Error setting GPIO OE\n");
gpio_unexport(DS_GPIO_AVR_RESET_DS2);
gpio_free(DS_GPIO_AVR_RESET_DS2);
#endif
// enable OE of level shifter
if (gpio_request_one(DS_GPIO_OE,
GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
"OE-1") != 0)
printk("Error setting GPIO OE\n");
#ifdef DS1
if (gpio_request_one(DS_GPIO_OE2,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"OE-2") != 0)
printk("Error setting GPIO OE2\n");
#else
if (gpio_request_one(DS_GPIO_UART_ENA,
GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
"UART-ENA") != 0)
printk("Error setting GPIO Uart Enable\n");
// enable OE of level shifter
if (gpio_request_one(DS_GPIO_OE2,
GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
"OE-2") != 0)
printk("Error setting GPIO OE2\n");
#endif
}
static void __init wnr2000v3_setup(void)
{
u8 wlan_mac_addr[6];
/*
* Disable JTAG to use all AR724X GPIO LEDs.
* Also disable CLKs and bit 20 as u-boot does.
* Finally, allow OS to control all link LEDs.
*/
ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE |
AR724X_GPIO_FUNC_UART_EN,
AR724X_GPIO_FUNC_CLK_OBS1_EN |
AR724X_GPIO_FUNC_CLK_OBS2_EN |
AR724X_GPIO_FUNC_CLK_OBS3_EN |
AR724X_GPIO_FUNC_CLK_OBS4_EN |
AR724X_GPIO_FUNC_CLK_OBS5_EN |
AR724X_GPIO_FUNC_GE0_MII_CLK_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN |
BIT(20));
wnr_get_wmac(wlan_mac_addr, WNR2000V3_MAC0_OFFSET,
WNR2000V3_MAC1_OFFSET, WNR2000V3_WMAC_OFFSET);
wnr_common_setup(wlan_mac_addr);
ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr2000v3_leds_gpio),
wnr2000v3_leds_gpio);
/* Do not use id=-1, we can have more GPIO key-polled devices */
ath79_register_gpio_keys_polled(PLATFORM_DEVID_AUTO,
WNR2000V3_KEYS_POLL_INTERVAL,
ARRAY_SIZE(wnr2000v3_keys_gpio),
wnr2000v3_keys_gpio);
ap9x_pci_setup_wmac_led_pin(0, WNR2000V3_GPIO_WMAC_LED_WLAN_BLUE);
ap9x_pci_setup_wmac_led_name(0, wnr2000v3_wmac_led_name);
ap9x_pci_setup_wmac_leds(0, wnr2000v3_wmac_leds_gpio,
ARRAY_SIZE(wnr2000v3_wmac_leds_gpio));
ap9x_pci_setup_wmac_btns(0, wnr2000v3_wmac_keys_gpio,
ARRAY_SIZE(wnr2000v3_wmac_keys_gpio),
WNR2000V3_KEYS_POLL_INTERVAL);
}
static void __init wnr612v2_setup(void)
{
u8 wlan_mac_addr[6];
/*
* Disable JTAG and CLKs. Allow OS to control all link LEDs.
* Note: U-Boot for WNR612v2 sets undocumented bit 15 but
* we leave it for now.
*/
ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE |
AR724X_GPIO_FUNC_UART_EN,
AR724X_GPIO_FUNC_CLK_OBS1_EN |
AR724X_GPIO_FUNC_CLK_OBS2_EN |
AR724X_GPIO_FUNC_CLK_OBS3_EN |
AR724X_GPIO_FUNC_CLK_OBS4_EN |
AR724X_GPIO_FUNC_CLK_OBS5_EN |
AR724X_GPIO_FUNC_GE0_MII_CLK_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
wnr_get_wmac(wlan_mac_addr, WNR2000V3_MAC0_OFFSET,
WNR2000V3_MAC1_OFFSET, WNR2000V3_WMAC_OFFSET);
wnr_common_setup(wlan_mac_addr);
ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr612v2_leds_gpio),
wnr612v2_leds_gpio);
/*
* This device has no buttons on AR7241 GPIO and no extra LEDs
* connected to AR9285 so setup is simpler than for WNR2000v3.
*/
ap9x_pci_setup_wmac_led_pin(0, WNR612V2_GPIO_WMAC_LED_WLAN_GREEN);
ap9x_pci_setup_wmac_led_name(0, wnr612v2_wmac_led_name);
ap9x_pci_setup_wmac_leds(0, NULL, 0);
ap9x_pci_setup_wmac_btns(0, wnr612v2_wmac_keys_gpio,
ARRAY_SIZE(wnr612v2_wmac_keys_gpio),
WNR2000V3_KEYS_POLL_INTERVAL);
}
static void __init wnr1000v2_setup(void)
{
u8 wlan_mac_addr[6];
/*
* Disable JTAG and CLKs. Allow OS to control all link LEDs.
* Note: U-Boot for WNR1000v2 sets undocumented bit 15 but
* we leave it for now.
*/
ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE |
AR724X_GPIO_FUNC_UART_EN,
AR724X_GPIO_FUNC_CLK_OBS1_EN |
AR724X_GPIO_FUNC_CLK_OBS2_EN |
AR724X_GPIO_FUNC_CLK_OBS3_EN |
AR724X_GPIO_FUNC_CLK_OBS4_EN |
AR724X_GPIO_FUNC_CLK_OBS5_EN |
AR724X_GPIO_FUNC_GE0_MII_CLK_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
wnr_get_wmac(wlan_mac_addr, WNR2000V3_MAC0_OFFSET,
WNR2000V3_MAC1_OFFSET, WNR2000V3_WMAC_OFFSET);
wnr_common_setup(wlan_mac_addr);
ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr1000v2_leds_gpio),
wnr1000v2_leds_gpio);
ap9x_pci_setup_wmac_led_pin(0, WNR1000V2_GPIO_WMAC_LED_WLAN_BLUE);
ap9x_pci_setup_wmac_led_name(0, wnr2000v3_wmac_led_name);
ap9x_pci_setup_wmac_leds(0, wnr1000v2_wmac_leds_gpio,
ARRAY_SIZE(wnr1000v2_wmac_leds_gpio));
/* All 3 buttons are connected to wireless chip */
ap9x_pci_setup_wmac_btns(0, wnr1000v2_wmac_keys_gpio,
ARRAY_SIZE(wnr1000v2_wmac_keys_gpio),
WNR2000V3_KEYS_POLL_INTERVAL);
}
static void __init tl_wa850re_v2_setup(void)
{
tl_ap143_setup();
/* For GPIO 0~4 */
ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE,
AR934X_GPIO_FUNC_CLK_OBS4_EN);
/* Allow to enable/disable all LEDs from userspace */
gpio_request_one(TL_WA850RE_V2_GPIO_ENABLE_LEDS,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"LEDs enable");
ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa850re_v2_leds_gpio),
tl_wa850re_v2_leds_gpio);
ath79_register_gpio_keys_polled(-1, TL_WAX50RE_KEYS_POLL_INTERVAL,
ARRAY_SIZE(tl_wax50re_gpio_keys),
tl_wax50re_gpio_keys);
}
static void __init cf_e355ac_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1f010000);
/* Disable JTAG, enabling GPIOs 0-3 */
ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE, 0);
cf_exxxn_common_setup(0x10000, CF_E355AC_GPIO_EXT_WDT);
cf_exxxn_qca953x_eth_setup();
ath79_gpio_output_select(CF_E355AC_GPIO_LED_LAN, 0);
ath79_gpio_output_select(CF_E355AC_GPIO_LED_WLAN2G, 0);
ath79_gpio_output_select(CF_E355AC_GPIO_LED_WLAN5G, 0);
ap91_pci_init(art + 0x5000, NULL);
ath79_register_gpio_keys_polled(1, CF_EXXXN_KEYS_POLL_INTERVAL,
ARRAY_SIZE(cf_e355ac_gpio_keys),
cf_e355ac_gpio_keys);
}
static void __init wpn824n_setup(void)
{
ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE,
AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN |
AR724X_GPIO_FUNC_CLK_OBS3_EN);
wnr_common_setup(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(wpn824n_leds_gpio),
wpn824n_leds_gpio);
ap9x_pci_setup_wmac_leds(0, wpn824n_wmac_leds_gpio,
ARRAY_SIZE(wpn824n_wmac_leds_gpio));
ap9x_pci_setup_wmac_btns(0, wpn824n_wmac_keys_gpio,
ARRAY_SIZE(wpn824n_wmac_keys_gpio),
WNR2000V3_KEYS_POLL_INTERVAL);
}
static void __init ds_setup(void)
{
u32 t=0;
ds_common_setup();
ath79_register_leds_gpio(-1, ARRAY_SIZE(ds_leds_gpio), ds_leds_gpio);
ath79_register_gpio_keys_polled(-1, DS_KEYS_POLL_INTERVAL,
ARRAY_SIZE(ds_gpio_keys), ds_gpio_keys);
ath79_register_usb();
// use the swtich_led directly form sysfs
ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN);
/*
* Disable the Function for some pins to have GPIO functionality active
* GPIO6-7-8 and GPIO11
*/
ath79_gpio_function_setup(GPIO_FUNC_SET, GPIO_FUNC_CLEAR);
ath79_gpio_function2_setup(GPIO_FUNC2_SET, GPIO_FUNC2_CLEAR);
pr_info("mach-linino: setting GPIO\n");
/* Enable GPIO26 instead of MDC function */
t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN;
ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t);
/* enable OE of level shifters */
ds_setup_level_shifter_oe();
/* enable uart */
ds_setup_uart_enable();
/* Register Software SPI controller */
ds_register_spi();
}
static void __init tl_ap123_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
/* Disable JTAG, enabling GPIOs 0-3 */
/* Configure OBS4 line, for GPIO 4*/
ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE,
AR934X_GPIO_FUNC_CLK_OBS4_EN);
/* config gpio4 as normal gpio function */
ath79_gpio_output_select(TL_MR3420V2_GPIO_USB_POWER,
AR934X_GPIO_OUT_GPIO);
ath79_register_m25p80(&tl_wr841n_v8_flash_data);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP);
ath79_register_mdio(1, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, -1);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
/* GMAC0 is connected to the PHY0 of the internal switch */
ath79_switch_data.phy4_mii_en = 1;
ath79_switch_data.phy_poll_mask = BIT(0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
ath79_register_eth(0);
/* GMAC1 is connected to the internal switch */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_register_eth(1);
ath79_register_wmac(ee, mac);
}
static void __init omy_x1_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE,
AR934X_GPIO_FUNC_CLK_OBS4_EN);
ath79_register_m25p80(&omy_x1_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(omy_x1_leds_gpio),
omy_x1_leds_gpio);
ath79_register_gpio_keys_polled(1, OMY_X1_KEYS_POLL_INTERVAL,
ARRAY_SIZE(omy_x1_gpio_keys),
omy_x1_gpio_keys);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP);
ath79_register_mdio(1, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, -1);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_switch_data.phy4_mii_en = 1;
ath79_switch_data.phy_poll_mask = BIT(0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
ath79_register_eth(0);
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_register_eth(1);
ath79_register_wmac(ee, mac);
}
static void __init cf_e375ac_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f040000);
/* Disable JTAG, enabling GPIOs 0-3 */
ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE, 0);
cf_exxxn_common_setup(0x40000, CF_E375AC_GPIO_EXT_WDT);
ath79_gpio_output_select(CF_E375AC_GPIO_LED_LAN, 0);
ath79_gpio_output_select(CF_E375AC_GPIO_LED_WLAN2G, 0);
ath79_gpio_output_select(CF_E375AC_GPIO_LED_WLAN5G, 0);
ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e375ac_leds_gpio),
cf_e375ac_leds_gpio);
ath79_register_gpio_keys_polled(-1, CF_EXXXN_KEYS_POLL_INTERVAL,
ARRAY_SIZE(cf_e375ac_gpio_keys),
cf_e375ac_gpio_keys);
platform_device_register(&ath79_mdio0_device);
mdiobus_register_board_info(cf_e375ac_mdio0_info,
ARRAY_SIZE(cf_e375ac_mdio0_info));
/* GMAC0 is connected to an AR8337 switch */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth0_data.speed = SPEED_1000;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_register_eth(0);
ath79_register_pci();
}
static void rb750_nand_disable_pins(void)
{
ath79_gpio_function_setup(AR724X_GPIO_FUNC_SPI_EN,
AR724X_GPIO_FUNC_JTAG_DISABLE);
rb750_latch_change(0, RB750_LVC573_LE);
}
void ath79_gpio_function_enable(u32 mask)
{
ath79_gpio_function_setup(mask, 0);
}
void ath79_gpio_function_disable(u32 mask)
{
ath79_gpio_function_setup(0, mask);
}
static void rb750_nand_enable_pins(void)
{
rb750_latch_change(RB750_LVC573_LE, 0);
ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE,
AR724X_GPIO_FUNC_SPI_EN);
}
static void rb750gr3_nand_disable_pins(void)
{
ath79_gpio_function_setup(AR724X_GPIO_FUNC_SPI_EN |
AR724X_GPIO_FUNC_SPI_CS_EN2,
AR724X_GPIO_FUNC_JTAG_DISABLE);
}
