Beispiel #1
0
//!  Turns off the BDM interface
//!
void bdm_interfaceOff( void ) {
#if (HW_CAPABILITY&CAP_CFVx)
#ifndef SPI1C1
#define SPI1C1 SPIC1
#endif
   SPI1C1 = 0; // Disable SPI1
#endif
#if (HW_CAPABILITY&CAP_FLASH)
   (void)bdmSetVpp(BDM_TARGET_VPP_OFF);
#endif
#ifdef TA_3STATE
   TA_3STATE();
#endif
#ifdef JTAG_DRV_DISABLE
   JTAG_DRV_DISABLE();
#endif
#ifdef BKPT_DISABLE
   BKPT_DISABLE();
#endif
#ifdef RESET_IN_FINI
   RESET_IN_FINI();
#endif
#ifdef RESET_OUT_FINI
   RESET_OUT_FINI();
#endif
#ifdef CF_DRV_DISABLE
   CF_DRV_DISABLE();
#endif
#ifdef TCLK_DISABLE
   TCLK_DISABLE();
#endif   
#ifdef DSCLK_DRV_DISABLE
   DSCLK_DRV_DISABLE();
#endif
#ifdef TRST_3STATE
   TRST_3STATE();
#endif
#ifdef TDI_DISABLE
   TDI_DISABLE();
#endif
#ifdef BDM_3STATE
   BDM_3STATE();
#endif
#ifdef TCLK_CTL_DISABLE
   TCLK_CTL_DISABLE();
#endif
#ifdef SWD_OUT_FINI
   SWD_OUT_FINI();
#endif
#ifdef SWCLK_OUT_FINI
   SWCLK_OUT_FINI();
#endif
#ifdef SWD_IN_FINI
   SWD_IN_FINI();
#endif
//   SPIxC1 = SPIxC1_OFF; // Disable SPI (MOSI/MISO pins now GPIO)
}
Beispiel #2
0
//!  Sets the BDM interface to a suspended state
//!
//!  - All signals idle \n
//!  - All voltages off.
//!
void bdm_suspend(void){
#if (HW_CAPABILITY&CAP_FLASH)
   (void)bdmSetVpp(BDM_TARGET_VPP_OFF);
#endif
#if (HW_CAPABILITY&CAP_CFVx_HW)
   bdmCF_suspend();
#endif
#if (HW_CAPABILITY&CAP_BDM)    	  
   bdmHCS_suspend();
#endif   
}
Beispiel #3
0
//! Once off initialisation
//!
void bdm_init(void) {

   // Turn off important things
#if (HW_CAPABILITY&CAP_FLASH)
   (void)bdmSetVpp(BDM_TARGET_VPP_OFF);
#endif   
   
   VDD_OFF();
   (void)bdm_clearStatus();

   // Update power status
   (void)bdm_checkTargetVdd();
}
//! Control target VPP level
//!
//! @note
//!  commandBuffer                 \n
//!  - [2] =>       (FlashState_t) control value for VPP \n
//!
//! @return
//!     BDM_RC_OK   => success \n
//!     else        => Error
//!
U8 f_CMD_SET_VPP(void) {
   return bdmSetVpp(commandBuffer[2]);
}
/*! \brief Initialise the system.
 *
 *  Initialisation of the following:
 *  \li  Default port values
 *  \li  Watchdog (off),
 *  \li  Stack,
 *  \li  BDM interface,
 *  \li  USB interface.
 *  \li  Configure Clock for 48MHz operation
 */
static void init(void) {

   // Default ports to inputs
   PTADD = 0x00;
   PTBDD = 0x00;
#if (CPU==JMxx)
   PTCDD = 0x00;
   PTDDD = 0x00;
   PTEDD = 0x00;
   PTFDD = 0x00;
   PTGDD = 0x00;
#endif

//    Turn off important things
#if ((HW_CAPABILITY & CAP_FLASH) != 0)
   (void)bdmSetVpp(BDM_TARGET_VPP_OFF);
#endif
   VDD_OFF();
   
   // Default to Ports have PUPs
   // Note - this doesn't affect outputs
   PTAPE = 0xFF;
   PTBPE = 0xFF;
#if (CPU==JMxx)
   PTCPE = 0xFF;
   PTDPE = 0xFF;
   PTEPE = 0xFF;
   PTFPE = 0xFF;
   PTGPE = 0xFF;
#endif

   EnableInterrupts;

#ifndef SOPT1_BKGDPE_MASK
#define SOPT1_BKGDPE_MASK (0)
#endif
   SOPT1 = SOPT1_STOPE_MASK|SOPT1_BKGDPE_MASK; // Disable COP, enable STOP instr. & BKGD pin
   
#if (HW_CAPABILITY&CAP_VDDSENSE)
   SPMSC1_BGBE = 1;                // Enable Bandgap Reference
#endif
   
   LED_INIT();
   clearStack();
   initUSB();  // Assumes clock already done
   
   (void)bdm_init();
   (void)bdm_off();
   
#ifdef VDD_ON_INITIALLY
   // For compatibility with original board s/w
   // The board is powered when initially plugged in
#if (VDD_ON_INITIALLY == 3)
   bdm_option.targetVdd = BDM_TARGET_VDD_3V3;
#elif (VDD_ON_INITIALLY == 5)
   bdm_option.targetVdd = BDM_TARGET_VDD_5;
#else
#error "Illegal VDD_ON_INITIALLY value"   
#endif
   (void)bdm_interfaceOff();
   (void)bdm_setTargetVdd();
#endif
   
#if (DEBUG&SCI_DEBUG) != 0)   
   debugSCIInit();
#endif
}