C++ (Cpp) bfin_read_IMEM_CONTROL Beispiele

Beispiel #1

Datei: cache-c.c Projekt: Blackburn29/PsycoKernel

void blackfin_invalidate_entire_icache(void)
{
	u32 imem = bfin_read_IMEM_CONTROL();
	bfin_write_IMEM_CONTROL(imem & ~0x4);
	SSYNC();
	bfin_write_IMEM_CONTROL(imem);
	SSYNC();
}

Beispiel #2

Datei: cplbmgr.c Projekt: 10x-Amin/nAa-kernel

static inline void write_icplb_data(int cpu, int idx, unsigned long data,
				    unsigned long addr)
{
	unsigned long ctrl = bfin_read_IMEM_CONTROL();

	bfin_write_IMEM_CONTROL_SSYNC(ctrl & ~ENICPLB);
	bfin_write32(ICPLB_DATA0 + idx * 4, data);
	bfin_write32(ICPLB_ADDR0 + idx * 4, addr);
	bfin_write_IMEM_CONTROL_SSYNC(ctrl);

#ifdef CONFIG_CPLB_INFO
	icplb_tbl[cpu][idx].addr = addr;
	icplb_tbl[cpu][idx].data = data;
#endif
}

Beispiel #3

Datei: cacheinit.c Projekt: ysei/linux-2.6.x

void __cpuinit bfin_icache_init(struct cplb_entry *icplb_tbl)
{
	unsigned long ctrl;
	int i;

	for (i = 0; i < MAX_CPLBS; i++) {
		bfin_write32(ICPLB_ADDR0 + i * 4, icplb_tbl[i].addr);
		bfin_write32(ICPLB_DATA0 + i * 4, icplb_tbl[i].data);
	}
	ctrl = bfin_read_IMEM_CONTROL();
	ctrl |= IMC | ENICPLB;
	/* CSYNC to ensure load store ordering */
	CSYNC();
	bfin_write_IMEM_CONTROL(ctrl);
	SSYNC();
}

Beispiel #4

Datei: cacheinit.c Projekt: PennPanda/linux-repo

void bfin_icache_init(void)
{
	unsigned long *table = icplb_table;
	unsigned long ctrl;
	int i;

	for (i = 0; i < MAX_CPLBS; i++) {
		unsigned long addr = *table++;
		unsigned long data = *table++;
		if (addr == (unsigned long)-1)
			break;
		bfin_write32(ICPLB_ADDR0 + i * 4, addr);
		bfin_write32(ICPLB_DATA0 + i * 4, data);
	}
	ctrl = bfin_read_IMEM_CONTROL();
	ctrl |= IMC | ENICPLB;
	bfin_write_IMEM_CONTROL(ctrl);
}

Beispiel #5

Datei: cache.c Projekt: kipr/u-boot-2009.07-silvermoon

int icache_status(void)
{
	return bfin_read_IMEM_CONTROL() & IMC;
}