void brw_init_state( struct brw_context *brw )
{
   const struct brw_tracked_state **atoms;
   int num_atoms;

   brw_init_caches(brw);

   if (brw->intel.gen >= 7) {
      atoms = gen7_atoms;
      num_atoms = ARRAY_SIZE(gen7_atoms);
   } else if (brw->intel.gen == 6) {
      atoms = gen6_atoms;
      num_atoms = ARRAY_SIZE(gen6_atoms);
   } else {
      atoms = gen4_atoms;
      num_atoms = ARRAY_SIZE(gen4_atoms);
   }

   brw->atoms = atoms;
   brw->num_atoms = num_atoms;

   while (num_atoms--) {
      assert((*atoms)->dirty.mesa |
	     (*atoms)->dirty.brw |
	     (*atoms)->dirty.cache);
      assert((*atoms)->emit);
      atoms++;
   }
}
void brw_init_state( struct brw_context *brw )
{
   struct gl_context *ctx = &brw->ctx;
   const struct gen_device_info *devinfo = &brw->screen->devinfo;

   /* Force the first brw_select_pipeline to emit pipeline select */
   brw->last_pipeline = BRW_NUM_PIPELINES;

   brw_init_caches(brw);

   if (devinfo->gen >= 11)
      gen11_init_atoms(brw);
   else if (devinfo->gen >= 10)
      gen10_init_atoms(brw);
   else if (devinfo->gen >= 9)
      gen9_init_atoms(brw);
   else if (devinfo->gen >= 8)
      gen8_init_atoms(brw);
   else if (devinfo->is_haswell)
      gen75_init_atoms(brw);
   else if (devinfo->gen >= 7)
      gen7_init_atoms(brw);
   else if (devinfo->gen >= 6)
      gen6_init_atoms(brw);
   else if (devinfo->gen >= 5)
      gen5_init_atoms(brw);
   else if (devinfo->is_g4x)
      gen45_init_atoms(brw);
   else
      gen4_init_atoms(brw);

   brw_upload_initial_gpu_state(brw);

   brw->NewGLState = ~0;
   brw->ctx.NewDriverState = ~0ull;

   /* ~0 is a nonsensical value which won't match anything we program, so
    * the programming will take effect on the first time around.
    */
   brw->pma_stall_bits = ~0;

   /* Make sure that brw->ctx.NewDriverState has enough bits to hold all possible
    * dirty flags.
    */
   STATIC_ASSERT(BRW_NUM_STATE_BITS <= 8 * sizeof(brw->ctx.NewDriverState));

   ctx->DriverFlags.NewTransformFeedback = BRW_NEW_TRANSFORM_FEEDBACK;
   ctx->DriverFlags.NewTransformFeedbackProg = BRW_NEW_TRANSFORM_FEEDBACK;
   ctx->DriverFlags.NewRasterizerDiscard = BRW_NEW_RASTERIZER_DISCARD;
   ctx->DriverFlags.NewUniformBuffer = BRW_NEW_UNIFORM_BUFFER;
   ctx->DriverFlags.NewShaderStorageBuffer = BRW_NEW_UNIFORM_BUFFER;
   ctx->DriverFlags.NewTextureBuffer = BRW_NEW_TEXTURE_BUFFER;
   ctx->DriverFlags.NewAtomicBuffer = BRW_NEW_UNIFORM_BUFFER;
   ctx->DriverFlags.NewImageUnits = BRW_NEW_IMAGE_UNITS;
   ctx->DriverFlags.NewDefaultTessLevels = BRW_NEW_DEFAULT_TESS_LEVELS;
   ctx->DriverFlags.NewIntelConservativeRasterization = BRW_NEW_CONSERVATIVE_RASTERIZATION;
}
void brw_init_state( struct brw_context *brw )
{
   struct gl_context *ctx = &brw->ctx;
   const struct brw_tracked_state **atoms;
   int num_atoms;

   brw_init_caches(brw);

   if (brw->gen >= 8) {
      atoms = gen8_atoms;
      num_atoms = ARRAY_SIZE(gen8_atoms);
   } else if (brw->gen == 7) {
      atoms = gen7_atoms;
      num_atoms = ARRAY_SIZE(gen7_atoms);
   } else if (brw->gen == 6) {
      atoms = gen6_atoms;
      num_atoms = ARRAY_SIZE(gen6_atoms);
   } else {
      atoms = gen4_atoms;
      num_atoms = ARRAY_SIZE(gen4_atoms);
   }

   brw->atoms = atoms;
   brw->num_atoms = num_atoms;

   while (num_atoms--) {
      assert((*atoms)->dirty.mesa | (*atoms)->dirty.brw);
      assert((*atoms)->emit);
      atoms++;
   }

   brw_upload_initial_gpu_state(brw);

   brw->state.dirty.mesa = ~0;
   brw->state.dirty.brw = ~0ull;

   /* ~0 is a nonsensical value which won't match anything we program, so
    * the programming will take effect on the first time around.
    */
   brw->pma_stall_bits = ~0;

   /* Make sure that brw->state.dirty.brw has enough bits to hold all possible
    * dirty flags.
    */
   STATIC_ASSERT(BRW_NUM_STATE_BITS <= 8 * sizeof(brw->state.dirty.brw));

   ctx->DriverFlags.NewTransformFeedback = BRW_NEW_TRANSFORM_FEEDBACK;
   ctx->DriverFlags.NewTransformFeedbackProg = BRW_NEW_TRANSFORM_FEEDBACK;
   ctx->DriverFlags.NewRasterizerDiscard = BRW_NEW_RASTERIZER_DISCARD;
   ctx->DriverFlags.NewUniformBuffer = BRW_NEW_UNIFORM_BUFFER;
   ctx->DriverFlags.NewTextureBuffer = BRW_NEW_TEXTURE_BUFFER;
   ctx->DriverFlags.NewAtomicBuffer = BRW_NEW_ATOMIC_BUFFER;
}
Beispiel #4
0
void brw_init_state( struct brw_context *brw )
{
   struct gl_context *ctx = &brw->ctx;
   const struct brw_tracked_state **atoms;
   int num_atoms;

   brw_init_caches(brw);

   if (brw->gen >= 7) {
      atoms = gen7_atoms;
      num_atoms = ARRAY_SIZE(gen7_atoms);
   } else if (brw->gen == 6) {
      atoms = gen6_atoms;
      num_atoms = ARRAY_SIZE(gen6_atoms);
   } else {
      atoms = gen4_atoms;
      num_atoms = ARRAY_SIZE(gen4_atoms);
   }

   brw->atoms = atoms;
   brw->num_atoms = num_atoms;

   while (num_atoms--) {
      assert((*atoms)->dirty.mesa |
	     (*atoms)->dirty.brw |
	     (*atoms)->dirty.cache);
      assert((*atoms)->emit);
      atoms++;
   }

   brw_upload_initial_gpu_state(brw);

   brw->state.dirty.mesa = ~0;
   brw->state.dirty.brw = ~0;

   /* Make sure that brw->state.dirty.brw has enough bits to hold all possible
    * dirty flags.
    */
   STATIC_ASSERT(BRW_NUM_STATE_BITS <= 8 * sizeof(brw->state.dirty.brw));

   ctx->DriverFlags.NewTransformFeedback = BRW_NEW_TRANSFORM_FEEDBACK;
   ctx->DriverFlags.NewRasterizerDiscard = BRW_NEW_RASTERIZER_DISCARD;
   ctx->DriverFlags.NewUniformBuffer = BRW_NEW_UNIFORM_BUFFER;
   ctx->DriverFlags.NewAtomicBuffer = BRW_NEW_ATOMIC_BUFFER;
}
Beispiel #5
0
void brw_init_state( struct brw_context *brw )
{
   GLuint i;

   brw_init_pools(brw);
   brw_init_caches(brw);

   brw->state.atoms = _mesa_malloc(sizeof(atoms));
   brw->state.nr_atoms = sizeof(atoms)/sizeof(*atoms);
   _mesa_memcpy(brw->state.atoms, atoms, sizeof(atoms));

   /* Patch in a pointer to the dynamic state atom:
    */
   for (i = 0; i < brw->state.nr_atoms; i++)
      if (brw->state.atoms[i] == NULL)
	 brw->state.atoms[i] = &brw->curbe.tracked_state;

   _mesa_memcpy(&brw->curbe.tracked_state, 
		&brw_constant_buffer,
		sizeof(brw_constant_buffer));
}
void brw_init_state( struct brw_context *brw )
{
   struct gl_context *ctx = &brw->ctx;

   /* Force the first brw_select_pipeline to emit pipeline select */
   brw->last_pipeline = BRW_NUM_PIPELINES;

   STATIC_ASSERT(ARRAY_SIZE(gen4_atoms) <= ARRAY_SIZE(brw->render_atoms));
   STATIC_ASSERT(ARRAY_SIZE(gen6_atoms) <= ARRAY_SIZE(brw->render_atoms));
   STATIC_ASSERT(ARRAY_SIZE(gen7_render_atoms) <=
                 ARRAY_SIZE(brw->render_atoms));
   STATIC_ASSERT(ARRAY_SIZE(gen8_render_atoms) <=
                 ARRAY_SIZE(brw->render_atoms));
   STATIC_ASSERT(ARRAY_SIZE(gen7_compute_atoms) <=
                 ARRAY_SIZE(brw->compute_atoms));
   STATIC_ASSERT(ARRAY_SIZE(gen8_compute_atoms) <=
                 ARRAY_SIZE(brw->compute_atoms));

   brw_init_caches(brw);

   if (brw->gen >= 8) {
      brw_copy_pipeline_atoms(brw, BRW_RENDER_PIPELINE,
                              gen8_render_atoms,
                              ARRAY_SIZE(gen8_render_atoms));
      brw_copy_pipeline_atoms(brw, BRW_COMPUTE_PIPELINE,
                              gen8_compute_atoms,
                              ARRAY_SIZE(gen8_compute_atoms));
   } else if (brw->gen == 7) {
      brw_copy_pipeline_atoms(brw, BRW_RENDER_PIPELINE,
                              gen7_render_atoms,
                              ARRAY_SIZE(gen7_render_atoms));
      brw_copy_pipeline_atoms(brw, BRW_COMPUTE_PIPELINE,
                              gen7_compute_atoms,
                              ARRAY_SIZE(gen7_compute_atoms));
   } else if (brw->gen == 6) {
      brw_copy_pipeline_atoms(brw, BRW_RENDER_PIPELINE,
                              gen6_atoms, ARRAY_SIZE(gen6_atoms));
   } else {
      brw_copy_pipeline_atoms(brw, BRW_RENDER_PIPELINE,
                              gen4_atoms, ARRAY_SIZE(gen4_atoms));
   }

   brw_upload_initial_gpu_state(brw);

   brw->NewGLState = ~0;
   brw->ctx.NewDriverState = ~0ull;

   /* ~0 is a nonsensical value which won't match anything we program, so
    * the programming will take effect on the first time around.
    */
   brw->pma_stall_bits = ~0;

   /* Make sure that brw->ctx.NewDriverState has enough bits to hold all possible
    * dirty flags.
    */
   STATIC_ASSERT(BRW_NUM_STATE_BITS <= 8 * sizeof(brw->ctx.NewDriverState));

   ctx->DriverFlags.NewTransformFeedback = BRW_NEW_TRANSFORM_FEEDBACK;
   ctx->DriverFlags.NewTransformFeedbackProg = BRW_NEW_TRANSFORM_FEEDBACK;
   ctx->DriverFlags.NewRasterizerDiscard = BRW_NEW_RASTERIZER_DISCARD;
   ctx->DriverFlags.NewUniformBuffer = BRW_NEW_UNIFORM_BUFFER;
   ctx->DriverFlags.NewShaderStorageBuffer = BRW_NEW_UNIFORM_BUFFER;
   ctx->DriverFlags.NewTextureBuffer = BRW_NEW_TEXTURE_BUFFER;
   ctx->DriverFlags.NewAtomicBuffer = BRW_NEW_ATOMIC_BUFFER;
   ctx->DriverFlags.NewImageUnits = BRW_NEW_IMAGE_UNITS;
   ctx->DriverFlags.NewDefaultTessLevels = BRW_NEW_DEFAULT_TESS_LEVELS;
}
Beispiel #7
0
void brw_init_state( struct brw_context *brw )
{
   brw_init_caches(brw);
}