void m68705_device::interrupt()
{
if (m_pending_interrupts & M68705_INT_MASK)
{
if ((CC & IFLAG) == 0)
{
pushword(m_pc);
pushbyte(m_x);
pushbyte(m_a);
pushbyte(m_cc);
SEI;
standard_irq_callback(0);
if (BIT(m_pending_interrupts, M68705_IRQ_LINE))
{
LOGINT("servicing /INT interrupt\n");
m_pending_interrupts &= ~(1 << M68705_IRQ_LINE);
rm16(M68705_VECTOR_INT, m_pc);
}
else if (BIT(m_pending_interrupts, M68705_INT_TIMER))
{
LOGINT("servicing timer/counter interrupt\n");
rm16(M68705_VECTOR_TIMER, m_pc);
}
else
{
throw emu_fatalerror("Unknown pending interrupt");
}
m_icount -= 11;
burn_cycles(11);
}
}
}
/* Generate interrupts */
void m6805_base_device::interrupt()
{
/* the 6805 latches interrupt requests internally, so we don't clear */
/* pending_interrupts until the interrupt is taken, no matter what the */
/* external IRQ pin does. */
if (BIT(m_pending_interrupts, HD63705_INT_NMI))
{
pushword(m_pc);
pushbyte(m_x);
pushbyte(m_a);
pushbyte(m_cc);
SEI;
/* no vectors supported, just do the callback to clear irq_state if needed */
standard_irq_callback(0);
rm16(0x1ffc, m_pc);
m_pending_interrupts &= ~(1 << HD63705_INT_NMI);
m_icount -= 11;
burn_cycles(11);
}
else if ((m_pending_interrupts & ((1 << M6805_IRQ_LINE) | HD63705_INT_MASK)) != 0)
{
if ((CC & IFLAG) == 0)
{
/* standard IRQ */
pushword(m_pc);
pushbyte(m_x);
pushbyte(m_a);
pushbyte(m_cc);
SEI;
/* no vectors supported, just do the callback to clear irq_state if needed */
standard_irq_callback(0);
interrupt_vector();
m_pending_interrupts &= ~(1 << M6805_IRQ_LINE);
m_icount -= 11;
burn_cycles(11);
}
}
}
/* execute instructions on this CPU until icount expires */
void m6805_base_device::execute_run()
{
S = SP_ADJUST( S ); /* Taken from CPU_SET_CONTEXT when pointer'afying */
do
{
if (m_pending_interrupts != 0)
{
interrupt();
}
debugger_instruction_hook(this, PC);
u8 const ireg = rdop(PC++);
(this->*m_params.m_ops[ireg])();
m_icount -= m_params.m_cycles[ireg];
burn_cycles(m_params.m_cycles[ireg]);
}
while (m_icount > 0);
}
