//------------------------------------------------------------------------------
//  @fn can_init
//!
//! CAN macro initialization. Reset the CAN peripheral, initialize the bit
//! timing, initialize all the registers mapped in SRAM to put MObs in
//! inactive state and enable the CAN macro.
//!
//! @warning The CAN macro will be enable after seen on CAN bus a receceive
//!          level as long as of an inter frame (hardware feature).
//!
//! @param  Mode (for "can_fixed_baudrate" param not used)
//!         ==0: start CAN bit timing evaluation from faster baudrate
//!         ==1: start CAN bit timing evaluation with CANBTx registers
//!              contents
//!
//! @return Baudrate Status
//!         ==0: research of bit timing configuration failed
//!         ==1: baudrate performed 
//!
//------------------------------------------------------------------------------
U8 can_init(U8 mode)
{
    if ((Can_bit_timing(mode))==0) return (0);  // c.f. macro in "can_drv.h"
    can_clear_all_mob();                        // c.f. function in "can_drv.c"
    Can_enable();                               // c.f. macro in "can_drv.h" 
    return (1);
}
int can_init(can_speed_t can_speed, can_send_callback_t send_callback, can_recv_callback_t recv_callback,
        uint32_t send_timeout_real_us, can_mask_t masked_id, can_mask_t mask) {

    if((send_callback == NULL) || (recv_callback == NULL)) {
        return 1;
    }

    cli();
    can_send_callback = send_callback;
    can_recv_callback = recv_callback;
    can_send_timeout_ms = send_timeout_real_us / 1000;

    can_masked_id = masked_id;
    can_mask = mask;

    if(can_set_speed(can_speed) == -1) return -1;

    list_init(can_cmd_list);
    can_clear_all_mob();

    CAN_ENABLE();
    CAN_SET_TCON(199); // FIXME for F_CPU = 16 Mhz -> CAN timestamp will be 100uS resolution
    CAN_INT_MOB_ENABLE();
    CAN_INT_ENABLE();
    sei();

    if(init_recv_buffers() == -1) {
        return -2;
    }

    return 0;
}
Beispiel #3
0
//------------------------------------------------------------------------------
//  @fn can_init
//!
//! CAN macro initialization. Reset the CAN peripheral, initialize the bit
//! timing, initialize all the registers mapped in SRAM to put MObs in
//! inactive state and enable the CAN macro.
//!
//! @warning The CAN macro will be enable after seen on CAN bus a receceive
//!          level as long as of an inter frame (hardware feature).
//!
//! @param  Mode (for "can_fixed_baudrate" param not used)
//!         ==0: start CAN bit timing evaluation from faster baudrate
//!         ==1: start CAN bit timing evaluation with CANBTx registers
//!              contents
//!
//! @return Baudrate Status
//!         ==0: research of bit timing configuration failed
//!         ==1: baudrate performed 
//!
//------------------------------------------------------------------------------
U8 can_init(U8 mode)
{
		
//	PIND |= (1<<PD5);	//Setzen auf High um CAN-Bus Nicht zu blockieren
//	DDRD |= (1<<PD5);	//Pin6 := Output (Can_Tx)
//	PIND |= (1<<PD5);	//Setzen auf High um CAN-Bus Nicht zu blockieren

    if ((Can_bit_timing(mode))==0) return (0);  // c.f. macro in "can_drv.h"
    can_clear_all_mob();                        // c.f. function in "can_drv.c"
    Can_enable();                               // c.f. macro in "can_drv.h" 
    return (1);
}
void DeviceCAN_AT90CAN::implInit(unsigned char mode)
  {
    OSDeviceDebug::putString_P(PSTR("DeviceCAN_AT90CAN::implInit()"));
    OSDeviceDebug::putNewLine();

    transceiverInit();

    Can_reset();

    interruptInit(); // must be after reset()

    /* CAN_KING setting */
    /* 125K, 75%, Tq=0.5uS, Tbit=16*Tq=8uS */
    /* Tprs=7*Tq, Tph1=4*Tq, Tph2=4*Tq, Tsjw=1*Tq */
    CANBT1 = 0x0E; /* 125K@16MHz */
    CANBT2 = 0x0C;
    CANBT3 = 0x37;

    can_clear_all_mob();

    // enable reception on the reception mob
    Can_set_mob(NB_MOB_RX);
    Can_config_rx();

    // enable both RX and TX mobs
    CANEN2 = _BV(NB_MOB_RX) | _BV(NB_MOB_TX);

    // enable interrupts for both RX and TX mobs
    CANIE2 = _BV(NB_MOB_RX) | _BV(NB_MOB_TX);

    mode = mode; // set to given mode
    Can_enable();

    transceiverHighSpeed();

    //OSDebugLed2::init();

    interruptEnable();

    m_isConnected = true;
  }
//******************************************************************************
//  @fn main
//!
//! Core of "main_can_boot_loader.c".
//!
//! @brief: This application performs a CAN boot loader for AT90CAN128/64/32
//!         with aut-bitrate, IAP (In Application Programming) and API
//!         (Application Programming Interface).
//!
//! @warning: Don't forget to full locate the boot loader in "Boot Loader
//!           Flash Section".
//!           xxx_HWCB defined in "board.h" file
//!
//! @param none.
//!
//! @return Integer 0
//!
//******************************************************************************
int main (void)
{
    //U8      hwcb = FALSE;
    Bool    auto_b = 1;

    if(eeprom_rd_byte( (U16) ENNB  )  != 254)
      eeprom_wr_byte((U16) ENNB, 254);
       
    //DDRA = 0xFF;
	//PORTA = 0x00;

        //boot_conf[6] = 0x05;
		
    //uint8_t NNB;
    //NNB = eeprom_read_byte( (uint8_t*) 0 );
    //eeprom_update_byte((uint8_t*)0, NNB);
    
    
    //U8 mup = get_conf_byte(NNB);
    //U8 mupp[64];
    //------
    //put_conf_byte(NNB, 0x02);	//set node id
    //put_conf_byte(BSB, 0xFF);	//start programming
    //eeprom_wr_byte(NNB, 0x03);
    
    //------
    
    
//! --- First of all, disabling the Global Interrupt
    Disable_interrupt();

    
//! --- If comming from RESET then test of the HardWare Condition Bit
    if (MCUSR != 0)
    {
      //- Clear all reset flags
      MCUSR = 0;
    }
      if(eeprom_rd_byte( (U16) EBSB ) != 0xFF){
        // Start application
        //PORTA = 0xFF;
        isp_jump_to( (((U16)SA_H)<<8) | ((U16)SA_L));
      }
    

//! --- Open CAN communication

    can_communication_opened = 0;   // Not opened

    //- Pull-up on TxCAN & RxCAN one by one to use bit-addressing
    CAN_PORT_DIR &= ~(1<<CAN_INPUT_PIN );
    CAN_PORT_DIR &= ~(1<<CAN_OUTPUT_PIN);
    CAN_PORT_OUT |=  (1<<CAN_INPUT_PIN );
    CAN_PORT_OUT |=  (1<<CAN_OUTPUT_PIN);

    while (1)
    {
        auto_b = ((~auto_b)&0x01);      // Flip of "auto_b"

        //- Wait until activity on RxCAN
        while ((CAN_PORT_IN & (1<<CAN_INPUT_PIN)) != 0);

        //- Reset CAN peripheral
	    Can_reset();

	    //- Set CAN Bit-timming
        if (EB != 0xFF)
        {
//            CANBT1 = get_conf_byte(BTC1);
//            CANBT2 = get_conf_byte(BTC2);
//            CANBT3 = get_conf_byte(BTC3);
            
            CANBT1 = BTC1;
            CANBT2 = BTC2;
            CANBT3 = BTC3;

        }
        else
        //- Loop on auto-bitrate until it is performed
        {
            while ((Can_bit_timing(auto_b))==0);        // c.f. macro in "can_drv.h"
        }

	    //- Enable CAN peripheral
        can_clear_all_mob();                        // c.f. function in "can_drv.c"
        Can_enable();                               // c.f. macro in "can_drv.h"

//! --- CAN ISP protocol execution
        //- Initialization of CAN ISP PROTOCOL only when CAN communication NOT opened
        if(!can_communication_opened) can_isp_protocol_init();

        //- Exit with "0" only if CAN hardware error occurs
        while(can_isp_protocol_task());
    }
}   // End of "main"