/*******************************************************************************
* @fn rxFifoAboveThresholdISR
*
* @brief Function running every time the RX FIFO is filled above
* threshold (FIFO_THR = 120)
*
* @param none
*
* @return none
*/
static void rxFifoAboveThresholdISR(void) {
uint8 writeByte;
if (!packetReceived) {
// Change to fixed packet length mode when there is less than 256
// bytes left to receive
if (((bytesLeft - BYTES_IN_RX_FIFO) < (MAX_VARIABLE_LENGTH + 1)) && (pktFormat == INFINITE)) {
writeByte = FIXED_PACKET_LENGTH_MODE;
cc112xSpiWriteReg(CC112X_PKT_CFG0, &writeByte, 1);
pktFormat = FIXED;
}
// Read BYTS_IN_RX_FIFO bytes from the RX FIFO and update the variables
// keeping track of how many more bytes need to be read and where in
// rxBuffer they should be storeds
cc112xSpiReadRxFifo(pBufferIndex, BYTES_IN_RX_FIFO);
bytesLeft -= BYTES_IN_RX_FIFO;
pBufferIndex += BYTES_IN_RX_FIFO;
// Clear ISR flag
ioPinIntClear(IO_PIN_PORT_1, GPIO0);
}
}
/******************************************************************************
* @fn perCC1120CC1190SetOutputPower
*
* @brief Configures the output power of CC112x according to the provided
* index:
* 0 = xx dBm
* 1 = 26 dBm
* NOTE: for PG2.0 pa_shape_en and pa_power_ramp has swapped
* position
*
*
*
* input parameters
*
* @param index - index to table <=> wanted output level
*
* output parameters
*
* @return void
*/
void perCC1120CC1190SetOutputPower(uint8 index)
{
uint8 level;
/* Reading the PA_CFG2 value to account for pa_shape_en */
cc112xSpiReadReg(CC112X_PA_CFG2,&level,1);
/* Saving pa_shape_en */
level &= 0x40;
/* Oring in the PA power ramp value */
level |= paPowerRamp[index];
/* Updating PA_CFG2 register with its' new value */
cc112xSpiWriteReg(CC112X_PA_CFG2,&level,1);
return;
}
/*******************************************************************************
* @fn registerConfig
*
* @brief Write register settings as given by SmartRF Studio found in
* cc112x_infinite_packet_length_mode_reg_config.h
*
* @param none
*
* @return none
*/
static void registerConfig(void) {
uint8 writeByte;
// Reset radio
trxSpiCmdStrobe(CC112X_SRES);
// Write registers to radio
for(uint16 i = 0;
i < (sizeof(preferredSettings)/sizeof(registerSetting_t)); i++) {
writeByte = preferredSettings[i].data;
cc112xSpiWriteReg(preferredSettings[i].addr, &writeByte, 1);
}
}
/*******************************************************************************
* @fn syncReceivedISR
*
* @brief Function running every time a sync word has been received
*
* @param none
*
* @return none
*/
static void syncReceivedISR(void) {
uint8 numRxBytes;
uint8 writeByte;
// After the sync word is received one needs to wait for the two
// length bytes to be put in the RX FIFO
do {
cc112xSpiReadReg(CC112X_NUM_RXBYTES, &numRxBytes, 1);
} while (numRxBytes < 2);
// Read the length byte and store it in the packetLength variable
cc112xSpiReadRxFifo(rxBuffer, 2);
pBufferIndex += 2;
packetLength = (uint16)(((uint16)(rxBuffer[0] << 8)) | rxBuffer[1]);
// Make sure that the packet length is in the correct range, update
// variables and enable interrupt on falling edge of GPIO3 (PKT_SYNC_RXTX)
if ((packetLength > MAX_VARIABLE_LENGTH)
&& (packetLength <= PACKET_LENGTH)) {
bytesLeft = packetLength + 2;
fixedPacketLength = bytesLeft % (MAX_VARIABLE_LENGTH + 1);
writeByte = fixedPacketLength;
cc112xSpiWriteReg(CC112X_PKT_LEN, &writeByte, 1);
// Clear interrupt flag and enable GPIO3
ioPinIntClear(IO_PIN_PORT_1, GPIO3);
ioPinIntEnable(IO_PIN_PORT_1, GPIO3);
} else { // Exit RX and flush RX FIFO due to length byte being out of range
trxSpiCmdStrobe(CC112X_SIDLE);
trxSpiCmdStrobe(CC112X_SFRX);
state = RX_START;
}
// Clear ISR flag
ioPinIntClear(IO_PIN_PORT_1, GPIO2);
}
static void setDirection(uint8 dir){
uint8 writeByte;
//dir = 1 => RX
//dir = 0 => TX
if (dir) {
// Application specific registers
// FIFO_THR = 120
// GPIO0 = RXFIFO_THR
// GPIO2 = PKT_SYNC_RXTX
// GPIO3 = PKT_SYNC_RXTX
writeByte = INFINITE_PACKET_LENGTH_MODE;
cc112xSpiWriteReg(CC112X_PKT_CFG0, &writeByte, 1);
writeByte = 0x78; cc112xSpiWriteReg(CC112X_FIFO_CFG, &writeByte, 1);
writeByte = 0x00; cc112xSpiWriteReg(CC112X_IOCFG0, &writeByte, 1);
writeByte = 0x06; cc112xSpiWriteReg(CC112X_IOCFG2, &writeByte, 1);
writeByte = 0x06; cc112xSpiWriteReg(CC112X_IOCFG3, &writeByte, 1);
// Connect ISR function to GPIO0
ioPinIntRegister(IO_PIN_PORT_1, GPIO0, &rxFifoAboveThresholdISR);
// Interrupt on falling edge
ioPinIntTypeSet(IO_PIN_PORT_1, GPIO0, IO_PIN_RISING_EDGE);
// Clear interrupt
ioPinIntClear(IO_PIN_PORT_1, GPIO0);
// Enable interrupt
ioPinIntEnable(IO_PIN_PORT_1, GPIO0);
// Connect ISR function to GPIO2
ioPinIntRegister(IO_PIN_PORT_1, GPIO2, &syncReceivedISR);
// Interrupt on falling edge
ioPinIntTypeSet(IO_PIN_PORT_1, GPIO2, IO_PIN_RISING_EDGE);
// Clear interrupt
ioPinIntClear(IO_PIN_PORT_1, GPIO2);
// Enable interrupt
ioPinIntEnable(IO_PIN_PORT_1, GPIO2);
// Set up interrupt on GPIO3 (PKT_SYNC_RXTX)
ioPinIntRegister(IO_PIN_PORT_1, GPIO3, &packetReceivedISR);
// Interrupt on falling edge
ioPinIntTypeSet(IO_PIN_PORT_1, GPIO3, IO_PIN_FALLING_EDGE);
}
else {
// Application specific registers
// FIFO_THR = 120
// GPIO0 = TXFIFO_THR
// GPIO2 = PKT_SYNC_RXTX
writeByte = INFINITE_PACKET_LENGTH_MODE;
cc112xSpiWriteReg(CC112X_PKT_CFG0, &writeByte, 1);
writeByte = 0x78; cc112xSpiWriteReg(CC112X_FIFO_CFG, &writeByte, 1);
writeByte = 0x02; cc112xSpiWriteReg(CC112X_IOCFG0, &writeByte, 1);
writeByte = 0x06; cc112xSpiWriteReg(CC112X_IOCFG2, &writeByte, 1);
// Connect ISR function to GPIO0
ioPinIntRegister(IO_PIN_PORT_1, GPIO0, &txFifoBelowThresholdISR);
// Interrupt on falling edge
ioPinIntTypeSet(IO_PIN_PORT_1, GPIO0, IO_PIN_FALLING_EDGE);
// Clear interrupt
ioPinIntClear(IO_PIN_PORT_1, GPIO0);
// Enable interrupt
ioPinIntEnable(IO_PIN_PORT_1, GPIO0);
// Connect ISR function to GPIO2
ioPinIntRegister(IO_PIN_PORT_1, GPIO2, &packetSentISR);
// Interrupt on falling edge
ioPinIntTypeSet(IO_PIN_PORT_1, GPIO2, IO_PIN_FALLING_EDGE);
// Clear interrupt
ioPinIntClear(IO_PIN_PORT_1, GPIO2);
// Enable interrupt
ioPinIntEnable(IO_PIN_PORT_1, GPIO2);
}
}
/******************************************************************************
* @fn perCC1120CC1190RegConfig
*
* @brief Configures the CC1120 radio with the selected
* paramteres and test properties or uses the base configuration
* with no address check. Assumes that the radio is in IDLE.
*
* input parameters
*
* output parameters
*
* @return void
*/
void perCC1120CC1190RegConfig(void)
{
uint8 data;
/* Log that radio is in IDLE state */
cc1120cc1190RxIdle();
cc1120cc1190RadioTxRx = CC112X_STATE_IDLE;
/* Extract what radio configuration to use */
/* Only one configuration implemented so far, but keeping structure to add
more configurations later */
if((perSettings.masterSlaveLinked==PER_DEVICE_LINKED) ||
(perSettings.masterSlaveLinked == PER_DEVICE_LINK_BYPASS))
{
switch(perSettings.smartRfConfiguration)
{
case 0:
for(uint16 i = 0; i < (sizeof cc1120cc1190LowDataRateRfSettings/sizeof(registerSetting_t));i++)
{
data = cc1120cc1190LowDataRateRfSettings[i].data;
cc112xSpiWriteReg(cc1120cc1190LowDataRateRfSettings[i].addr,&data,1);
}
if(perSettings.frequencyBand == 0){
perSettings.sensitivity = sensitivity869Mhz[0];
cc1120cc1190RssiOffset = rssiOffset869Mhz[0];
}
else{
perSettings.sensitivity = sensitivity915Mhz[0];
cc1120cc1190RssiOffset = rssiOffset915Mhz[0];
}
break;
case 1:
for(uint16 i = 0; i < (sizeof cc1120cc1190MediumDataRateRfSettings/sizeof(registerSetting_t));i++)
{
data = cc1120cc1190MediumDataRateRfSettings[i].data;
cc112xSpiWriteReg(cc1120cc1190MediumDataRateRfSettings[i].addr,&data,1);
}
if(perSettings.frequencyBand == 0){
perSettings.sensitivity = sensitivity869Mhz[1];
cc1120cc1190RssiOffset = rssiOffset869Mhz[1];
}
else{
perSettings.sensitivity = sensitivity915Mhz[1];
cc1120cc1190RssiOffset = rssiOffset915Mhz[1];
}
break;
default:
for(uint16 i = 0; i < (sizeof cc1120cc1190LowDataRateRfSettings/sizeof(registerSetting_t));i++)
{
data = cc1120cc1190LowDataRateRfSettings[i].data;
cc112xSpiWriteReg(cc1120cc1190LowDataRateRfSettings[i].addr,&data,1);
}
if(perSettings.frequencyBand == 0){
perSettings.sensitivity = sensitivity869Mhz[0];
cc1120cc1190RssiOffset = rssiOffset869Mhz[0];
}
else{
perSettings.sensitivity = sensitivity915Mhz[0];
cc1120cc1190RssiOffset = rssiOffset915Mhz[0];
}
break;
}
}
else
{
/* Base settings for communication */
for(uint16 i = 0; i < (sizeof cc1120cc1190LowDataRateRfSettings/sizeof(registerSetting_t));i++)
{
data = cc1120cc1190LowDataRateRfSettings[i].data;
cc112xSpiWriteReg(cc1120cc1190LowDataRateRfSettings[i].addr,&data,1);
}
if(perSettings.frequencyBand == 0){
perSettings.sensitivity = sensitivity869Mhz[0];
cc1120cc1190RssiOffset = rssiOffset869Mhz[0];
}
else{
perSettings.sensitivity = sensitivity915Mhz[0];
cc1120cc1190RssiOffset = rssiOffset915Mhz[0];
}
}
/* Correct for chosen frequency band */
switch(perSettings.frequencyBand)
{
case 0:
cc112xSpiWriteReg(CC112X_FS_CFG,&cc112xFsCfgs[0],1);
cc112xSpiWriteReg(CC112X_FREQ2,freqConfiguration[0],3);
break;
case 1:
cc112xSpiWriteReg(CC112X_FS_CFG,&cc112xFsCfgs[1],1);
cc112xSpiWriteReg(CC112X_FREQ2,freqConfiguration[1],3);
break;
default: // 869.525 MHz
cc112xSpiWriteReg(CC112X_FS_CFG,&cc112xFsCfgs[0],1);
cc112xSpiWriteReg(CC112X_FREQ2,freqConfiguration[0],3);
break;
}
if(perSettings.masterSlaveLinked==PER_DEVICE_LINKED)
{
/* PKT_LEN set to user specified packet length: HW length filtering */
cc112xSpiWriteReg(CC112X_PKT_LEN, &(perSettings.payloadLength),1);
/* Turn on HW Address filtering */
uint8 pkt_cfg1 = 0x10|0x05;
cc112xSpiWriteReg(CC112X_PKT_CFG1,&pkt_cfg1,1);
/* Set address */
cc112xSpiWriteReg(CC112X_DEV_ADDR,&perSettings.address,1);
/* Note: The Two-way link for the CC1120 PG1.0 use a different implementation
* of the two-way link on the master side than what CC1101 and CC1120 PG2.0
* will. RXOFF and TXOFF mode is in this case the same as for the one-way link.
*
*/
if((perSettings.linkTopology == LINK_2_WAY))
{
if(perSettings.deviceMode == MASTER_DEVICE)
{
/* IDLE after RX, RX after TX */
data = 0x0F;
cc112xSpiWriteReg(CC112X_RFEND_CFG1,&data,1);
data = 0x30;
cc112xSpiWriteReg(CC112X_RFEND_CFG0,&data,1);
}
}
}
else if(perSettings.masterSlaveLinked == PER_DEVICE_LINK_BYPASS)
{
//Change sync word to apply to link bypass configuration
for(uint16 i = 0; i < (sizeof linkBypassSettings/sizeof(registerSetting_t));i++)
{
data = linkBypassSettings[i].data;
cc112xSpiWriteReg(linkBypassSettings[i].addr,&data,1);
}
/* PKT_LEN set to user specified packet length: HW length filtering */
cc112xSpiWriteReg(CC112X_PKT_LEN, &(perSettings.payloadLength),1);
}
else
{
/* length of configuration packet + filter byte */
data = PER_SETTINGS_PACKET_LEN;
cc112xSpiWriteReg(CC112X_PKT_LEN, &data,1);
}
// do manual calibration according to errata
manualCalibration();
return;
}
/*******************************************************************************
* @fn manualCalibration
*
* @brief Perform manual calibration according to the errata note
* @param none
*
* @return none
*/
static void manualCalibration(void) {
uint8 original_fs_cal2;
uint8 calResults_for_vcdac_start_high[3];
uint8 calResults_for_vcdac_start_mid[3];
uint8 marcstate;
uint8 writeByte;
// 1) Set VCO cap-array to 0 (FS_VCO2 = 0x00)
writeByte = 0x00;
cc112xSpiWriteReg(CC112X_FS_VCO2, &writeByte, 1);
// 2) Start with high VCDAC (original VCDAC_START + 2):
cc112xSpiReadReg(CC112X_FS_CAL2, &original_fs_cal2, 1);
writeByte = original_fs_cal2 + VCDAC_START_OFFSET;
cc112xSpiWriteReg(CC112X_FS_CAL2, &writeByte, 1);
// 3) Calibrate and wait for calibration to be done (radio back in IDLE state)
trxSpiCmdStrobe(CC112X_SCAL);
do {
cc112xSpiReadReg(CC112X_MARCSTATE, &marcstate, 1);
} while (marcstate != 0x41);
// 4) Read FS_VCO2, FS_VCO4 and FS_CHP register obtained with high VCDAC_START value
cc112xSpiReadReg(CC112X_FS_VCO2, &calResults_for_vcdac_start_high[FS_VCO2_INDEX], 1);
cc112xSpiReadReg(CC112X_FS_VCO4, &calResults_for_vcdac_start_high[FS_VCO4_INDEX], 1);
cc112xSpiReadReg(CC112X_FS_CHP, &calResults_for_vcdac_start_high[FS_CHP_INDEX], 1);
// 5) Set VCO cap-array to 0 (FS_VCO2 = 0x00)
writeByte = 0x00;
cc112xSpiWriteReg(CC112X_FS_VCO2, &writeByte, 1);
// 6) Continue with mid VCDAC (original VCDAC_START):
writeByte = original_fs_cal2;
cc112xSpiWriteReg(CC112X_FS_CAL2, &writeByte, 1);
// 7) Calibrate and wait for calibration to be done (radio back in IDLE state)
trxSpiCmdStrobe(CC112X_SCAL);
do {
cc112xSpiReadReg(CC112X_MARCSTATE, &marcstate, 1);
} while (marcstate != 0x41);
// 8) Read FS_VCO2, FS_VCO4 and FS_CHP register obtained with mid VCDAC_START value
cc112xSpiReadReg(CC112X_FS_VCO2, &calResults_for_vcdac_start_mid[FS_VCO2_INDEX], 1);
cc112xSpiReadReg(CC112X_FS_VCO4, &calResults_for_vcdac_start_mid[FS_VCO4_INDEX], 1);
cc112xSpiReadReg(CC112X_FS_CHP, &calResults_for_vcdac_start_mid[FS_CHP_INDEX], 1);
// 9) Write back highest FS_VCO2 and corresponding FS_VCO and FS_CHP result
if (calResults_for_vcdac_start_high[FS_VCO2_INDEX] > calResults_for_vcdac_start_mid[FS_VCO2_INDEX]) {
writeByte = calResults_for_vcdac_start_high[FS_VCO2_INDEX];
cc112xSpiWriteReg(CC112X_FS_VCO2, &writeByte, 1);
writeByte = calResults_for_vcdac_start_high[FS_VCO4_INDEX];
cc112xSpiWriteReg(CC112X_FS_VCO4, &writeByte, 1);
writeByte = calResults_for_vcdac_start_high[FS_CHP_INDEX];
cc112xSpiWriteReg(CC112X_FS_CHP, &writeByte, 1);
}
else {
writeByte = calResults_for_vcdac_start_mid[FS_VCO2_INDEX];
cc112xSpiWriteReg(CC112X_FS_VCO2, &writeByte, 1);
writeByte = calResults_for_vcdac_start_mid[FS_VCO4_INDEX];
cc112xSpiWriteReg(CC112X_FS_VCO4, &writeByte, 1);
writeByte = calResults_for_vcdac_start_mid[FS_CHP_INDEX];
cc112xSpiWriteReg(CC112X_FS_CHP, &writeByte, 1);
}
}
/*******************************************************************************
* @fn main
*
* @brief Runs the main routine
*
* @param none
*
* @return none
*/
void main(void) {
uint8 writeByte;
// Initialize MCU and peripherals
initMCU();
// Write radio registers (preferred settings from SmartRF Studio)
registerConfig();
// Application specific registers
// FIFO_THR = 120
// GPIO0 = RXFIFO_THR
// GPIO2 = PKT_SYNC_RXTX
// GPIO3 = PKT_SYNC_RXTX
writeByte = INFINITE_PACKET_LENGTH_MODE;
cc112xSpiWriteReg(CC112X_PKT_CFG0, &writeByte, 1);
writeByte = 0x78; cc112xSpiWriteReg(CC112X_FIFO_CFG, &writeByte, 1);
writeByte = 0x00; cc112xSpiWriteReg(CC112X_IOCFG0, &writeByte, 1);
writeByte = 0x06; cc112xSpiWriteReg(CC112X_IOCFG2, &writeByte, 1);
writeByte = 0x06; cc112xSpiWriteReg(CC112X_IOCFG3, &writeByte, 1);
bspLedSet(BSP_LED_ALL);
// Calibrate the radio according to the errata note
manualCalibration();
// Connect ISR function to GPIO0
ioPinIntRegister(IO_PIN_PORT_1, GPIO0, &rxFifoAboveThresholdISR);
// Interrupt on falling edge
ioPinIntTypeSet(IO_PIN_PORT_1, GPIO0, IO_PIN_RISING_EDGE);
// Clear interrupt
ioPinIntClear(IO_PIN_PORT_1, GPIO0);
// Enable interrupt
ioPinIntEnable(IO_PIN_PORT_1, GPIO0);
// Connect ISR function to GPIO2
ioPinIntRegister(IO_PIN_PORT_1, GPIO2, &syncReceivedISR);
// Interrupt on falling edge
ioPinIntTypeSet(IO_PIN_PORT_1, GPIO2, IO_PIN_RISING_EDGE);
// Clear interrupt
ioPinIntClear(IO_PIN_PORT_1, GPIO2);
// Enable interrupt
ioPinIntEnable(IO_PIN_PORT_1, GPIO2);
// Set up interrupt on GPIO3 (PKT_SYNC_RXTX)
ioPinIntRegister(IO_PIN_PORT_1, GPIO3, &packetReceivedISR);
// Interrupt on falling edge
ioPinIntTypeSet(IO_PIN_PORT_1, GPIO3, IO_PIN_FALLING_EDGE);
printWelcomeMessage();
while (TRUE) {
switch (state) {
//------------------------------------------------------------------
case RX_START:
//------------------------------------------------------------------
trxSpiCmdStrobe(CC112X_SRX);
pBufferIndex = rxBuffer;
// Disable interrupt on GPIO3
ioPinIntDisable(IO_PIN_PORT_1, GPIO3);
state = RX_WAIT;
//------------------------------------------------------------------
case RX_WAIT:
//------------------------------------------------------------------
if (packetReceived) {
packetReceived = FALSE;
// Check CRC and update LCD if CRC OK
if ((rxBuffer[packetLength + 3]) & CRC_OK)
updateLcd();
// Change to infinite packet length mode
pktFormat = INFINITE;
writeByte = INFINITE_PACKET_LENGTH_MODE;
cc112xSpiWriteReg(CC112X_PKT_CFG0, &writeByte, 1);
state = RX_START;
}
break;
//------------------------------------------------------------------
default:
//------------------------------------------------------------------
break;
}
}
}
/******************************************************************************
* @fn cc120x_masterStartApp
*
* @brief
*
* input parameters
*
* @param pDummy - pointer to pointer to void. Not used
*
* output parameters
*
* @return SNIFF_RETURN_SUCCESS
*/
uint8 cc120x_masterStartApp(void)
{
static uint8 marcState;
// Set first packet number
pkt = 1;
// Set up GPIO pins. For debug
cc112xSpiWriteReg(CC120X_IOCFG3,&cc120x_gpioConfigMaster[0],4);
//Display while configuring radios*
lcdBufferClear(0);
lcdBufferPrintString(0," RX Sniff Test ",0,eLcdPage0);
lcdBufferSetHLine(0,0,LCD_COLS-1,eLcdPage7);
lcdBufferPrintString(0," Radio in TX ",0,eLcdPage2);
lcdBufferPrintString(0," ",0,eLcdPage3);
lcdBufferPrintString(0," Press right button ",0,eLcdPage4);
lcdBufferPrintString(0," to send packet ",0,eLcdPage5);
lcdBufferPrintString(0," 1 Abort Master Mode ",0,eLcdPage7);
lcdBufferSetHLine(0,0,LCD_COLS-1,55);
lcdBufferInvertPage(0,0,LCD_COLS,eLcdPage7);
lcdSendBuffer(0);
// Calibrate radio
trxSpiCmdStrobe(CC120X_SCAL);
// Wait for calibration to be done (radio back in IDLE state)
do {
cc120xSpiReadReg(CC120X_MARCSTATE, &marcState, 1);
} while (marcState != 0x41);
// Put MCU to sleep
__low_power_mode_3();
while(1)
{
if(buttonPressed = bspKeyPushed(BSP_KEY_ALL))
{
if(buttonPressed == BSP_KEY_LEFT)
{
// Left button pressed. Abort function
// Put radio in powerdown to save power
trxSpiCmdStrobe(CC120X_SPWD);
//Insert Carrier Sense threshold warning in Sniff Test Menu
drawInfo();
return SNIFF_RETURN_FAILURE;
}
else if (buttonPressed == BSP_KEY_RIGHT)
{
//Right button pressed, send packet
lcdBufferClear(0);
// build packet
comArray[0] = PKTLEN; // length field
comArray[1] = 0x00; // address field
comArray[2] = pkt>>24; // payload
comArray[3] = pkt>>16;
comArray[4] = pkt>>8;
comArray[5] = pkt;
// Update LCD
lcdBufferPrintString(0," RX Sniff Test ",0,eLcdPage0);
lcdBufferSetHLine(0,0,LCD_COLS-1,eLcdPage7);
lcdBufferPrintString(0,"Sent Pkt number:",0,eLcdPage3);
lcdBufferPrintInt(0,pkt,70,eLcdPage4);
lcdBufferPrintString(0," 1 Abort Master Mode ",0,eLcdPage7);
lcdBufferSetHLine(0,0,LCD_COLS-1,55);
lcdBufferInvertPage(0,0,LCD_COLS,eLcdPage7);
lcdSendBuffer(0);
// Update packet counter
pkt++;
// Strobe IDLE and fill TX FIFO
trxSpiCmdStrobe(CC120X_SIDLE);
// wait for radio to enter IDLE state
while((trxSpiCmdStrobe(CC112X_SNOP)& 0xF0) != 0x00);
cc112xSpiWriteTxFifo(comArray,PKTLEN+1);
// Send packet
trxSpiCmdStrobe(CC120X_STX);
// Wait for radio to finish sending packet
while((trxSpiCmdStrobe(CC120X_SNOP)& 0xF0) != 0x00);
// Put radio in powerdown to save power
trxSpiCmdStrobe(CC120X_SPWD);
//Put MCU to sleep
__low_power_mode_3();
}
}
}
uint8_t halRfWriteReg(uint16_t addr, uint8_t data)
{
return cc112xSpiWriteReg(addr, &data, 1);
}
