C++ (Cpp) cgs_set_clockgating_state Beispiele

Beispiel #1

Datei: cz_clockpowergating.c Projekt: AshishNamdev/linux

int cz_dpm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate)
{
	struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);

	if (bgate) {
		cgs_set_powergating_state(
					hwmgr->device,
					AMD_IP_BLOCK_TYPE_VCE,
					AMD_PG_STATE_GATE);
		cgs_set_clockgating_state(
					hwmgr->device,
					AMD_IP_BLOCK_TYPE_VCE,
					AMD_CG_STATE_GATE);
		cz_enable_disable_vce_dpm(hwmgr, false);
		cz_dpm_powerdown_vce(hwmgr);
		cz_hwmgr->vce_power_gated = true;
	} else {
		cz_dpm_powerup_vce(hwmgr);
		cz_hwmgr->vce_power_gated = false;
		cgs_set_clockgating_state(
					hwmgr->device,
					AMD_IP_BLOCK_TYPE_VCE,
					AMD_PG_STATE_UNGATE);
		cgs_set_powergating_state(
					hwmgr->device,
					AMD_IP_BLOCK_TYPE_VCE,
					AMD_CG_STATE_UNGATE);
		cz_dpm_update_vce_dpm(hwmgr);
		cz_enable_disable_vce_dpm(hwmgr, true);
		return 0;
	}

	return 0;
}

Beispiel #2

Datei: cz_clockpowergating.c Projekt: AshishNamdev/linux

int cz_dpm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
{
	struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);

	cz_hwmgr->uvd_power_gated = bgate;

	if (bgate) {
		cgs_set_powergating_state(hwmgr->device,
						AMD_IP_BLOCK_TYPE_UVD,
						AMD_PG_STATE_GATE);
		cgs_set_clockgating_state(hwmgr->device,
						AMD_IP_BLOCK_TYPE_UVD,
						AMD_CG_STATE_GATE);
		cz_dpm_update_uvd_dpm(hwmgr, true);
		cz_dpm_powerdown_uvd(hwmgr);
	} else {
		cz_dpm_powerup_uvd(hwmgr);
		cgs_set_clockgating_state(hwmgr->device,
						AMD_IP_BLOCK_TYPE_UVD,
						AMD_PG_STATE_UNGATE);
		cgs_set_powergating_state(hwmgr->device,
						AMD_IP_BLOCK_TYPE_UVD,
						AMD_CG_STATE_UNGATE);
		cz_dpm_update_uvd_dpm(hwmgr, false);
	}

	return 0;
}

Beispiel #3

Datei: cz_clockpowergating.c Projekt: forgivemyheart/linux

int cz_dpm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate)
{
	struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);

	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
					PHM_PlatformCaps_VCEPowerGating)) {
		if (cz_hwmgr->vce_power_gated != bgate) {
			if (bgate) {
				cgs_set_clockgating_state(
							hwmgr->device,
							AMD_IP_BLOCK_TYPE_VCE,
							AMD_CG_STATE_UNGATE);
				cgs_set_powergating_state(
							hwmgr->device,
							AMD_IP_BLOCK_TYPE_VCE,
							AMD_PG_STATE_GATE);
				cz_enable_disable_vce_dpm(hwmgr, false);
				cz_dpm_powerdown_vce(hwmgr);
				cz_hwmgr->vce_power_gated = true;
			} else {
				cz_dpm_powerup_vce(hwmgr);
				cz_hwmgr->vce_power_gated = false;
				cgs_set_powergating_state(
							hwmgr->device,
							AMD_IP_BLOCK_TYPE_VCE,
							AMD_CG_STATE_UNGATE);
				cgs_set_clockgating_state(
							hwmgr->device,
							AMD_IP_BLOCK_TYPE_VCE,
							AMD_PG_STATE_GATE);
				cz_dpm_update_vce_dpm(hwmgr);
				cz_enable_disable_vce_dpm(hwmgr, true);
				return 0;
			}
		}
	} else {
		cz_hwmgr->vce_power_gated = bgate;
		cz_dpm_update_vce_dpm(hwmgr);
		cz_enable_disable_vce_dpm(hwmgr, !bgate);
		return 0;
	}

	if (!cz_hwmgr->vce_power_gated)
		cz_dpm_update_vce_dpm(hwmgr);

	return 0;
}

Beispiel #4

Datei: fiji_clockpowergating.c Projekt: AK101111/linux

int fiji_phm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
{
	struct fiji_hwmgr *data = (struct fiji_hwmgr *)(hwmgr->backend);

	if (data->uvd_power_gated == bgate)
		return 0;

	data->uvd_power_gated = bgate;

	if (bgate) {
		cgs_set_clockgating_state(hwmgr->device,
					  AMD_IP_BLOCK_TYPE_UVD,
					  AMD_CG_STATE_GATE);
		fiji_update_uvd_dpm(hwmgr, true);
	} else {
		fiji_update_uvd_dpm(hwmgr, false);
		cgs_set_clockgating_state(hwmgr->device,
					  AMD_IP_BLOCK_TYPE_UVD,
					  AMD_CG_STATE_UNGATE);
	}

	return 0;
}

Beispiel #5

Datei: smu7_clockpowergating.c Projekt: dznm/linux

int smu7_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate)
{
	struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);

	if (data->vce_power_gated == bgate)
		return 0;

	data->vce_power_gated = bgate;

	if (bgate) {
		cgs_set_clockgating_state(hwmgr->device,
				AMD_IP_BLOCK_TYPE_VCE,
				AMD_CG_STATE_GATE);
		smu7_update_vce_dpm(hwmgr, true);
		smu7_powerdown_vce(hwmgr);
	} else {
		smu7_powerup_vce(hwmgr);
		smu7_update_vce_dpm(hwmgr, false);
		cgs_set_clockgating_state(hwmgr->device,
				AMD_IP_BLOCK_TYPE_VCE,
				AMD_CG_STATE_UNGATE);
	}
	return 0;
}