static void integrator_clocksource_init(u32 khz)
{
struct clocksource *cs = &clocksource_timersp;
void __iomem *base = clksrc_base;
u32 ctrl = TIMER_CTRL_ENABLE;
if (khz >= 1500) {
khz /= 16;
ctrl = TIMER_CTRL_DIV16;
}
writel(ctrl, base + TIMER_CTRL);
writel(0xffff, base + TIMER_LOAD);
clocksource_register_khz(cs, khz);
}
static void __init periph_timer_clocksource_init(void)
{
if (timer_cs_used != -1)
return;
timer_cs_used = ext_timer_alloc(-1, PERIPH_TIMER_PERIOD_MAX, NULL, 0);
/* cannot allocate timer, just quit. Shouldn't happen! */
if (timer_cs_used == -1)
return;
ext_timer_start(timer_cs_used);
/* bcm63xx_clocksource->shift/mult will be computed by the following
* register function */
clocksource_register_khz(&bcm63xx_clocksource, PERIPH_TIMER_CLK_FREQ);
}
static void __init meson_clocksource_init(void)
{
aml_clr_reg32_mask(P_ISA_TIMER_MUX, TIMER_E_RESOLUTION_MASK);
aml_set_reg32_mask(P_ISA_TIMER_MUX, TIMER_E_RESOLUTION_1us << TIMER_E_RESOLUTION_BIT);
/// aml_write_reg32(P_ISA_TIMERE, 0);
/**
* (counter*mult)>>shift=xxx ns
*/
/**
* Constants generated by clocks_calc_mult_shift(m, s, 1MHz, NSEC_PER_SEC, 0).
* This gives a resolution of about 1us and a wrap period of about 1h11min.
*/
clocksource_timer_e.shift = 22;
clocksource_timer_e.mult = 4194304000u;
clocksource_register_khz(&clocksource_timer_e,1000);
setup_sched_clock(meson8_read_sched_clock, 32,USEC_PER_SEC);
}
void __init time_init_deferred(void)
{
struct resource *resource = NULL;
struct clock_event_device *ce_dev = &hexagon_clockevent_dev;
struct device_node *dn;
struct resource r;
int err;
ce_dev->cpumask = cpu_all_mask;
if (!resource)
resource = rtos_timer_device.resource;
rtos_timer = ioremap(resource->start, resource->end
- resource->start + 1);
if (!rtos_timer) {
release_mem_region(resource->start, resource->end
- resource->start + 1);
}
clocksource_register_khz(&hexagon_clocksource, pcycle_freq_mhz * 1000);
clockevents_calc_mult_shift(ce_dev, sleep_clk_freq, 4);
ce_dev->max_delta_ns = clockevent_delta2ns(0x7fffffff, ce_dev);
ce_dev->min_delta_ns = clockevent_delta2ns(0xf, ce_dev);
#ifdef CONFIG_SMP
setup_percpu_clockdev();
#endif
clockevents_register_device(ce_dev);
setup_irq(ce_dev->irq, &rtos_timer_intdesc);
}
/*
* time_init_deferred - called by start_kernel to set up timer/clock source
*
* Install the IRQ handler for the clock, setup timers.
* This is done late, as that way, we can use ioremap().
*
* This runs just before the delay loop is calibrated, and
* is used for delay calibration.
*/
void __init time_init_deferred(void)
{
struct resource *resource = NULL;
struct clock_event_device *ce_dev = &hexagon_clockevent_dev;
ce_dev->cpumask = cpu_all_mask;
if (!resource)
resource = rtos_timer_device.resource;
/* ioremap here means this has to run later, after paging init */
rtos_timer = ioremap(resource->start, resource_size(resource));
if (!rtos_timer) {
release_mem_region(resource->start, resource_size(resource));
}
clocksource_register_khz(&hexagon_clocksource, pcycle_freq_mhz * 1000);
/* Note: the sim generic RTOS clock is apparently really 18750Hz */
/*
* Last arg is some guaranteed seconds for which the conversion will
* work without overflow.
*/
clockevents_calc_mult_shift(ce_dev, sleep_clk_freq, 4);
ce_dev->max_delta_ns = clockevent_delta2ns(0x7fffffff, ce_dev);
ce_dev->min_delta_ns = clockevent_delta2ns(0xf, ce_dev);
#ifdef CONFIG_SMP
setup_percpu_clockdev();
#endif
clockevents_register_device(ce_dev);
setup_irq(ce_dev->irq, &rtos_timer_intdesc);
}
