void
at91ohci_attach(device_t parent, device_t self, void *aux)
{
struct at91ohci_softc *sc = device_private(self);
struct at91bus_attach_args *sa = aux;
sc->sc.sc_dev = self;
sc->sc.sc_bus.hci_private = sc;
sc->sc.sc_bus.dmatag = sa->sa_dmat;
sc->sc.iot = sa->sa_iot;
sc->sc_pid = sa->sa_pid;
/* Map I/O space */
if (bus_space_map(sc->sc.iot, sa->sa_addr, sa->sa_size,
0, &sc->sc.ioh)) {
printf(": cannot map mem space\n");
return;
}
sc->sc.sc_size = sa->sa_size;
/* enable peripheral clock */
at91_peripheral_clock(sc->sc_pid, 1);
printf("\n");
/* Defer the rest until later */
config_defer(self, at91ohci_callback);
}
void
txioman_attach(device_t parent, device_t self, void *aux)
{
printf("\n");
config_defer(self, txioman_callback);
}
void
pcppi_attach(struct pcppi_softc *sc)
{
struct pcppi_attach_args pa;
device_t self = sc->sc_dv;
callout_init(&sc->sc_bell_ch, CALLOUT_MPSAFE);
callout_setfunc(&sc->sc_bell_ch, pcppi_bell_callout, sc);
cv_init(&sc->sc_slp, "bell");
sc->sc_bellactive = sc->sc_bellpitch = 0;
#if NPCKBD > 0
/* Provide a beeper for the PC Keyboard, if there isn't one already. */
pckbd_hookup_bell(pcppi_pckbd_bell, sc);
#endif
#if NATTIMER > 0
config_defer(sc->sc_dv, pcppi_attach_speaker);
#endif
if (!pmf_device_register(self, NULL, NULL))
aprint_error_dev(self, "couldn't establish power handler\n");
pa.pa_cookie = sc;
config_search_loc(pcppisearch, sc->sc_dv, "pcppi", NULL, &pa);
}
void
pcibattach(struct device *parent, struct device *self, void *aux)
{
/*
* Cannot attach isa bus now; must postpone for various reasons
*/
printf("\n");
config_defer(self, pcib_callback);
}
void
snapper_attach(struct device *parent, struct device *self, void *aux)
{
struct snapper_softc *sc = (struct snapper_softc *)self;
sc->sc_setvolume = snapper_set_volume;
sc->sc_setbass = snapper_set_bass;
sc->sc_settreble = snapper_set_treble;
i2s_attach(parent, sc, aux);
config_defer(self, snapper_defer);
}
void
octohci_attach(struct device *parent, struct device *self, void *aux)
{
struct octohci_softc *sc = (struct octohci_softc *)self;
struct octuctl_attach_args *aa = aux;
char *devname;
uint64_t port_ctl;
int rc;
int s;
sc->sc_ohci.iot = aa->aa_bust;
sc->sc_ohci.sc_bus.pipe_size = sizeof(struct usbd_pipe);
sc->sc_ohci.sc_bus.dmatag = aa->aa_dmat;
rc = bus_space_map(sc->sc_ohci.iot, UCTL_OHCI_BASE, UCTL_OHCI_SIZE,
0, &sc->sc_ohci.ioh);
KASSERT(rc == 0);
port_ctl = bus_space_read_8(aa->aa_octuctl_bust, aa->aa_ioh,
UCTL_OHCI_CTL);
port_ctl &= ~UCTL_OHCI_CTL_L2C_ADDR_MSB_MASK;
port_ctl |= (1 << UCTL_OHCI_CTL_L2C_DESC_EMOD_SHIFT);
port_ctl |= (1 << UCTL_OHCI_CTL_L2C_BUFF_EMOD_SHIFT);
bus_space_write_8(aa->aa_octuctl_bust, aa->aa_ioh, UCTL_OHCI_CTL,
port_ctl);
s = splusb();
sc->sc_ohci.sc_id_vendor = 0;
strlcpy(sc->sc_ohci.sc_vendor, "Octeon", sizeof(sc->sc_ohci.sc_vendor));
sc->sc_ih = octeon_intr_establish(CIU_INT_USB, IPL_USB, ohci_intr,
(void *)&sc->sc_ohci, devname);
KASSERT(sc->sc_ih != NULL);
if ((ohci_checkrev(&sc->sc_ohci) != USBD_NORMAL_COMPLETION) ||
(ohci_handover(&sc->sc_ohci) != USBD_NORMAL_COMPLETION))
goto failed;
/* ignore interrupts for now */
sc->sc_ohci.sc_bus.dying = 1;
config_defer(self, octohci_attach_deferred);
splx(s);
return;
failed:
octeon_intr_disestablish(sc->sc_ih);
bus_space_unmap(sc->sc_ohci.iot, sc->sc_ohci.ioh, UCTL_OHCI_SIZE);
splx(s);
return;
}
static void
empb_attach(device_t parent, device_t self, void *aux)
{
struct empb_softc *sc;
struct zbus_args *zap;
volatile char *ba;
zap = aux;
sc = device_private(self);
sc->sc_dev = self;
ba = zap->va;
sc->model = zap->prodid;
switch (sc->model) {
case ZORRO_PRODID_MED1K2:
aprint_normal(": ELBOX Mediator PCI 1200\n");
break;
case ZORRO_PRODID_MED1K2SX:
aprint_normal(": ELBOX Mediator PCI 1200 SX\n");
break;
case ZORRO_PRODID_MED1K2LT2:
aprint_normal(": ELBOX Mediator PCI 1200 LT2\n");
break;
case ZORRO_PRODID_MED1K2LT4:
aprint_normal(": ELBOX Mediator PCI 1200 LT4\n");
break;
case ZORRO_PRODID_MED1K2TX:
aprint_normal(": ELBOX Mediator PCI 1200 TX\n");
break;
default:
aprint_normal(": ELBOX Mediator PCI (unknown)\n");
break;
}
/* Setup bus space mappings. */
sc->pci_confio_area.base = (bus_addr_t) ba + EMPB_BRIDGE_OFF;
sc->pci_confio_area.absm = &amiga_bus_stride_1swap;
sc->setup_area.base = (bus_addr_t) ba + EMPB_SETUP_OFF;
sc->setup_area.absm = &amiga_bus_stride_1;
/*
* Defer everything until later, we need to wait for possible
* emmem attachments.
*/
config_defer(self, empb_callback);
}
static void
obio_attach(device_t parent, device_t self, void *aux)
{
struct obio_softc *sc = device_private(self);
struct mainbus_attach_args *mb = (struct mainbus_attach_args *)aux;
sc->sc_dev = self;
sc->sc_iot = &omap_bs_tag;
aprint_normal(": On-Board IO\n");
sc->sc_ioh = 0;
sc->sc_dmat = &omap_bus_dma_tag;
sc->sc_base = mb->mb_iobase;
sc->sc_size = mb->mb_iosize;
#ifdef OMAP2_OBIO_0_BASE
if (mb->mb_iobase == OMAP2_OBIO_0_BASE)
obio_attached |= 1;
#endif
#ifdef OMAP2_OBIO_1_BASE
else if (mb->mb_iobase == OMAP2_OBIO_1_BASE)
obio_attached |= 2;
#endif
#ifdef OMAP2_OBIO_2_BASE
else if (mb->mb_iobase == OMAP2_OBIO_2_BASE)
obio_attached |= 4;
#endif
#ifdef OMAP2_OBIO_3_BASE
else if (mb->mb_iobase == OMAP2_OBIO_3_BASE)
obio_attached |= 8;
#endif
#ifdef TI_AM335X
obio_attached = 1;
#endif
/*
* Attach critical devices first.
*/
obio_attach_critical(sc);
/*
* Attach the rest of our devices once all obio devices
* have attached.
*/
config_defer(self, obio_attach1);
}
void
pcibattach(struct device *parent, struct device *self, void *aux)
{
struct pcib_softc *sc = (struct pcib_softc *)self;
struct pci_attach_args *pa = (struct pci_attach_args *)aux;
printf("\n");
/*
* Wait until all PCI devices are attached before attaching isa;
* otherwise this might mess the interrupt setup on some systems.
*/
sc->sc_iot = pa->pa_iot;
sc->sc_memt = pa->pa_memt;
sc->sc_dmat = pa->pa_dmat;
config_defer(self, pcib_callback);
}
void
tx39biu_attach(device_t parent, device_t self, void *aux)
{
struct txsim_attach_args *ta = aux;
struct tx39biu_softc *sc = device_private(self);
tx_chipset_tag_t tc;
#ifdef TX39_WATCHDOGTIMER
txreg_t reg;
#endif
sc->sc_tc = tc = ta->ta_tc;
printf("\n");
#ifdef TX39BIU_DEBUG
tx39biu_dump(tc);
#endif
#ifdef TX39_WATCHDOGTIMER
/*
* CLRWRBUSERRINT Bus error connected CPU HwInt0
*/
reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG);
reg |= TX39_MEMCONFIG4_ENWATCH;
reg = TX39_MEMCONFIG4_WATCHTIMEVAL_SET(reg, 0xf);
tx_conf_write(tc, TX39_MEMCONFIG4_REG, reg);
reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG);
if (reg & TX39_MEMCONFIG4_ENWATCH) {
int i;
i = TX39_MEMCONFIG4_WATCHTIMEVAL(reg);
i = (1000 * (i + 1) * 64) / 36864;
printf("WatchDogTimerRate: %dus\n", i);
}
#endif
__sc = sc;
/* Clear watch dog timer interrupt */
tx39biu_intr(sc);
/*
* Chip select virtual bridge
*/
config_defer(self, tx39biu_callback);
}
void
pcmbattach(device_t parent, device_t self, void *aux)
{
struct pci_attach_args *pa = aux;
char devinfo[256];
aprint_naive("\n");
aprint_normal("\n");
/*
* Just print out a description and defer configuration
* until all PCI devices have been attached.
*/
pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
aprint_normal_dev(self, "%s (rev. 0x%02x)\n", devinfo,
PCI_REVISION(pa->pa_class));
config_defer(self, pcmb_callback);
}
void
sxipio_attach(struct device *parent, struct device *self, void *args)
{
struct sxipio_softc *sc = (struct sxipio_softc *)self;
struct armv7_attach_args *aa = args;
/* XXX check unit, bail if != 0 */
sc->sc_iot = sxipio_iot = aa->aa_iot;
if (bus_space_map(sxipio_iot, aa->aa_dev->mem[0].addr,
aa->aa_dev->mem[0].size, 0, &sc->sc_ioh))
panic("sxipio_attach: bus_space_map failed!");
sxipio_ioh = sc->sc_ioh;
sxipio_sc = sc;
sc->sc_irq = aa->aa_dev->irq[0];
config_defer(self, sxipio_attach_gpio);
printf("\n");
}
static void
dwctwo_plb_attach(device_t parent, device_t self, void *aux)
{
struct dwc2_softc *sc = device_private(self);
struct plb_attach_args *paa = aux;
prop_dictionary_t dict = device_properties(self);
uint32_t srst0;
sc->sc_dev = self;
/* get core parameters */
if (!prop_dictionary_get_uint32(dict, "params",
(uint32_t *)&sc->sc_params)) {
aprint_error("struct dwc2_core_params not found\n");
return;
}
dwctwo_tag.pbs_base = paa->plb_addr;
dwctwo_tag.pbs_limit += paa->plb_addr;
if (bus_space_init(&dwctwo_tag, "dwctwotag", ex_storage,
sizeof(ex_storage)))
panic("dwctwo_attach: Failed to initialise opb_tag");
sc->sc_iot = &dwctwo_tag;
bus_space_map(sc->sc_iot, paa->plb_addr, DWCTWO_SIZE, 0, &sc->sc_ioh);
sc->sc_bus.dmatag = paa->plb_dmat;
intr_establish(paa->plb_irq, IST_LEVEL, IPL_SCHED, dwc2_intr, sc);
/* Enable the USB interface. */
mtsdr(DCR_SDR0_PFC1, mfsdr(DCR_SDR0_PFC1) | SDR0_PFC1_USBEN);
srst0 = mfsdr(DCR_SDR0_SRST0);
mtsdr(DCR_SDR0_SRST0, srst0 | SDR0_SRST0_UPRST | SDR0_SRST0_AHB);
delay(200 * 1000); /* XXXX */
mtsdr(DCR_SDR0_SRST0, srst0);
config_defer(self, dwctwo_plb_deferred);
}
void
ohci_voyager_attach(struct device *parent, struct device *self, void *aux)
{
struct ohci_voyager_softc *sc = (struct ohci_voyager_softc *)self;
struct voyager_attach_args *vaa = (struct voyager_attach_args *)aux;
struct pci_attach_args *pa = vaa->vaa_pa;
int s;
const char *vendor;
char *devname = sc->sc.sc_bus.bdev.dv_xname;
/* Map I/O registers */
sc->sc.sc_size = VOYAGER_OHCI_SIZE;
sc->sc.iot = vaa->vaa_mmiot;
if (bus_space_subregion(vaa->vaa_mmiot, vaa->vaa_mmioh,
VOYAGER_OHCI_BASE, VOYAGER_OHCI_SIZE, &sc->sc.ioh) != 0) {
printf(": can't map mem space\n");
return;
}
/* Record what interrupts were enabled by SMM/BIOS. */
sc->sc.sc_intre = bus_space_read_4(sc->sc.iot, sc->sc.ioh,
OHCI_INTERRUPT_ENABLE);
/* Disable interrupts, so we don't get any spurious ones. */
bus_space_write_4(sc->sc.iot, sc->sc.ioh, OHCI_INTERRUPT_DISABLE,
OHCI_MIE);
sc->sc.sc_bus.dmatag = pa->pa_dmat;
bus_space_barrier(sc->sc.iot, sc->sc.ioh, 0, sc->sc.sc_size,
BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE);
bus_space_write_4(sc->sc.iot, sc->sc.ioh,
OHCI_INTERRUPT_DISABLE, OHCI_MIE);
s = splusb();
/* establish the interrupt. */
sc->sc_ih = voyager_intr_establish(parent, VOYAGER_INTR_USB_HOST,
IPL_USB, ohci_intr, sc, devname);
if (sc->sc_ih == NULL) {
printf(": couldn't establish interrupt\n");
splx(s);
return;
}
printf(": %s", voyager_intr_string(sc->sc_ih));
/* Figure out vendor for root hub descriptor. */
vendor = pci_findvendor(pa->pa_id);
sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id);
if (vendor)
strlcpy(sc->sc.sc_vendor, vendor, sizeof (sc->sc.sc_vendor));
else
snprintf(sc->sc.sc_vendor, sizeof (sc->sc.sc_vendor),
"vendor 0x%04x", PCI_VENDOR(pa->pa_id));
/* Display revision and perform legacy emulation handover. */
if (ohci_checkrev(&sc->sc) != USBD_NORMAL_COMPLETION ||
ohci_handover(&sc->sc) != USBD_NORMAL_COMPLETION) {
splx(s);
return;
}
/* Ignore interrupts for now */
sc->sc.sc_bus.dying = 1;
config_defer(self, ohci_voyager_attach_deferred);
splx(s);
}
void
ohci_pci_attach(struct device *parent, struct device *self, void *aux)
{
struct ohci_pci_softc *sc = (struct ohci_pci_softc *)self;
struct pci_attach_args *pa = (struct pci_attach_args *)aux;
pci_chipset_tag_t pc = pa->pa_pc;
char const *intrstr;
pci_intr_handle_t ih;
int s;
const char *vendor;
char *devname = sc->sc.sc_bus.bdev.dv_xname;
/* Map I/O registers */
if (pci_mapreg_map(pa, PCI_CBMEM, PCI_MAPREG_TYPE_MEM, 0,
&sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size, 0)) {
printf(": can't map mem space\n");
return;
}
/* Record what interrupts were enabled by SMM/BIOS. */
sc->sc.sc_intre = bus_space_read_4(sc->sc.iot, sc->sc.ioh,
OHCI_INTERRUPT_ENABLE);
/* Disable interrupts, so we don't get any spurious ones. */
bus_space_write_4(sc->sc.iot, sc->sc.ioh, OHCI_INTERRUPT_DISABLE,
OHCI_MIE);
sc->sc_pc = pc;
sc->sc.sc_bus.dmatag = pa->pa_dmat;
bus_space_barrier(sc->sc.iot, sc->sc.ioh, 0, sc->sc.sc_size,
BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE);
bus_space_write_4(sc->sc.iot, sc->sc.ioh,
OHCI_INTERRUPT_DISABLE, OHCI_MIE);
s = splusb();
/* Map and establish the interrupt. */
if (pci_intr_map(pa, &ih)) {
printf(": couldn't map interrupt\n");
bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
splx(s);
return;
}
intrstr = pci_intr_string(pc, ih);
sc->sc_ih = pci_intr_establish(pc, ih, IPL_USB, ohci_intr, sc, devname);
if (sc->sc_ih == NULL) {
printf(": couldn't establish interrupt");
if (intrstr != NULL)
printf(" at %s", intrstr);
printf("\n");
bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
splx(s);
return;
}
printf(": %s", intrstr);
/* Figure out vendor for root hub descriptor. */
vendor = pci_findvendor(pa->pa_id);
sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id);
if (vendor)
strlcpy(sc->sc.sc_vendor, vendor, sizeof (sc->sc.sc_vendor));
else
snprintf(sc->sc.sc_vendor, sizeof (sc->sc.sc_vendor),
"vendor 0x%04x", PCI_VENDOR(pa->pa_id));
/* Display revision and perform legacy emulation handover. */
if (ohci_checkrev(&sc->sc) != USBD_NORMAL_COMPLETION ||
ohci_handover(&sc->sc) != USBD_NORMAL_COMPLETION) {
bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
splx(s);
return;
}
/* Ignore interrupts for now */
sc->sc.sc_dying = 1;
config_defer(self, ohci_pci_attach_deferred);
splx(s);
return;
}
static void
yds_attach(device_t parent, device_t self, void *aux)
{
struct yds_softc *sc;
struct pci_attach_args *pa;
pci_chipset_tag_t pc;
char const *intrstr;
pci_intr_handle_t ih;
pcireg_t reg;
struct yds_codec_softc *codec;
int i, r, to;
int revision;
int ac97_id2;
char intrbuf[PCI_INTRSTR_LEN];
sc = device_private(self);
sc->sc_dev = self;
pa = (struct pci_attach_args *)aux;
pc = pa->pa_pc;
revision = PCI_REVISION(pa->pa_class);
pci_aprint_devinfo(pa, NULL);
/* Map register to memory */
if (pci_mapreg_map(pa, YDS_PCI_MBA, PCI_MAPREG_TYPE_MEM, 0,
&sc->memt, &sc->memh, NULL, NULL)) {
aprint_error_dev(self, "can't map memory space\n");
return;
}
/* Map and establish the interrupt. */
if (pci_intr_map(pa, &ih)) {
aprint_error_dev(self, "couldn't map interrupt\n");
return;
}
mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_AUDIO); /* XXX IPL_NONE? */
mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO);
intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf));
sc->sc_ih = pci_intr_establish(pc, ih, IPL_AUDIO, yds_intr, sc);
if (sc->sc_ih == NULL) {
aprint_error_dev(self, "couldn't establish interrupt");
if (intrstr != NULL)
aprint_error(" at %s", intrstr);
aprint_error("\n");
mutex_destroy(&sc->sc_lock);
mutex_destroy(&sc->sc_intr_lock);
return;
}
aprint_normal_dev(self, "interrupting at %s\n", intrstr);
sc->sc_dmatag = pa->pa_dmat;
sc->sc_pc = pc;
sc->sc_pcitag = pa->pa_tag;
sc->sc_id = pa->pa_id;
sc->sc_revision = revision;
sc->sc_flags = yds_get_dstype(sc->sc_id);
#ifdef AUDIO_DEBUG
if (ydsdebug) {
char bits[80];
snprintb(bits, sizeof(bits), YDS_CAP_BITS, sc->sc_flags);
printf("%s: chip has %s\n", device_xname(self), bits);
}
#endif
/* Disable legacy mode */
reg = pci_conf_read(pc, pa->pa_tag, YDS_PCI_LEGACY);
pci_conf_write(pc, pa->pa_tag, YDS_PCI_LEGACY,
reg & YDS_PCI_LEGACY_LAD);
/* Enable the device. */
reg = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
reg |= (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
PCI_COMMAND_MASTER_ENABLE);
pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg);
reg = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
/* Mute all volumes */
for (i = 0x80; i < 0xc0; i += 2)
YWRITE2(sc, i, 0);
/* Initialize the device */
if (yds_init(sc)) {
aprint_error_dev(self, "initialize failed\n");
mutex_destroy(&sc->sc_lock);
mutex_destroy(&sc->sc_intr_lock);
return;
}
/*
* Detect primary/secondary AC97
* YMF754 Hardware Specification Rev 1.01 page 24
*/
reg = pci_conf_read(pc, pa->pa_tag, YDS_PCI_DSCTRL);
pci_conf_write(pc, pa->pa_tag, YDS_PCI_DSCTRL, reg & ~YDS_DSCTRL_CRST);
delay(400000); /* Needed for 740C. */
/* Primary */
for (to = 0; to < AC97_TIMEOUT; to++) {
if ((YREAD2(sc, AC97_STAT_ADDR1) & AC97_BUSY) == 0)
break;
delay(1);
}
if (to == AC97_TIMEOUT) {
aprint_error_dev(self, "no AC97 available\n");
mutex_destroy(&sc->sc_lock);
mutex_destroy(&sc->sc_intr_lock);
return;
}
/* Secondary */
/* Secondary AC97 is used for 4ch audio. Currently unused. */
ac97_id2 = -1;
if ((YREAD2(sc, YDS_ACTIVITY) & YDS_ACTIVITY_DOCKA) == 0)
goto detected;
#if 0 /* reset secondary... */
YWRITE2(sc, YDS_GPIO_OCTRL,
YREAD2(sc, YDS_GPIO_OCTRL) & ~YDS_GPIO_GPO2);
YWRITE2(sc, YDS_GPIO_FUNCE,
(YREAD2(sc, YDS_GPIO_FUNCE)&(~YDS_GPIO_GPC2))|YDS_GPIO_GPE2);
#endif
for (to = 0; to < AC97_TIMEOUT; to++) {
if ((YREAD2(sc, AC97_STAT_ADDR2) & AC97_BUSY) == 0)
break;
delay(1);
}
if (to < AC97_TIMEOUT) {
/* detect id */
for (ac97_id2 = 1; ac97_id2 < 4; ac97_id2++) {
YWRITE2(sc, AC97_CMD_ADDR,
AC97_CMD_READ | AC97_ID(ac97_id2) | 0x28);
for (to = 0; to < AC97_TIMEOUT; to++) {
if ((YREAD2(sc, AC97_STAT_ADDR2) & AC97_BUSY)
== 0)
goto detected;
delay(1);
}
}
if (ac97_id2 == 4)
ac97_id2 = -1;
detected:
;
}
pci_conf_write(pc, pa->pa_tag, YDS_PCI_DSCTRL, reg | YDS_DSCTRL_CRST);
delay (20);
pci_conf_write(pc, pa->pa_tag, YDS_PCI_DSCTRL, reg & ~YDS_DSCTRL_CRST);
delay (400000);
for (to = 0; to < AC97_TIMEOUT; to++) {
if ((YREAD2(sc, AC97_STAT_ADDR1) & AC97_BUSY) == 0)
break;
delay(1);
}
/*
* Attach ac97 codec
*/
for (i = 0; i < 2; i++) {
static struct {
int data;
int addr;
} statregs[] = {
{AC97_STAT_DATA1, AC97_STAT_ADDR1},
{AC97_STAT_DATA2, AC97_STAT_ADDR2},
};
if (i == 1 && ac97_id2 == -1)
break; /* secondary ac97 not available */
codec = &sc->sc_codec[i];
codec->sc = sc;
codec->id = i == 1 ? ac97_id2 : 0;
codec->status_data = statregs[i].data;
codec->status_addr = statregs[i].addr;
codec->host_if.arg = codec;
codec->host_if.attach = yds_attach_codec;
codec->host_if.read = yds_read_codec;
codec->host_if.write = yds_write_codec;
codec->host_if.reset = yds_reset_codec;
r = ac97_attach(&codec->host_if, self, &sc->sc_lock);
if (r != 0) {
aprint_error_dev(self, "can't attach codec (error 0x%X)\n", r);
mutex_destroy(&sc->sc_lock);
mutex_destroy(&sc->sc_intr_lock);
return;
}
}
if (0 != auconv_create_encodings(yds_formats, YDS_NFORMATS,
&sc->sc_encodings)) {
mutex_destroy(&sc->sc_lock);
mutex_destroy(&sc->sc_intr_lock);
return;
}
audio_attach_mi(&yds_hw_if, sc, self);
sc->sc_legacy_iot = pa->pa_iot;
config_defer(self, yds_configure_legacy);
if (!pmf_device_register(self, yds_suspend, yds_resume))
aprint_error_dev(self, "couldn't establish power handler\n");
}
void
pcic_pci_attach(device_t parent, device_t self, void *aux)
{
struct pcic_pci_softc *psc = device_private(self);
struct pcic_softc *sc = &psc->sc_pcic;
struct pci_attach_args *pa = aux;
pci_chipset_tag_t pc = pa->pa_pc;
bus_space_tag_t memt = pa->pa_memt;
bus_space_handle_t memh;
const char *model;
sc->dev = self;
aprint_naive(": PCMCIA controller\n");
if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0,
&sc->iot, &sc->ioh, NULL, NULL)) {
aprint_error(": can't map i/o space\n");
return;
}
/*
* XXX need some memory for mapping pcmcia cards into. Ideally, this
* would be completely dynamic. Practically this doesn't work,
* because the extent mapper doesn't know about all the devices all
* the time. With ISA we could finesse the issue by specifying the
* memory region in the config line. We can't do that here, so we
* cheat for now. Jason Thorpe, you are my Savior, come up with a fix
* :-)
*/
/* Map mem space. */
if (bus_space_map(memt, 0xd0000, 0x4000, 0, &memh))
panic("pcic_pci_attach: can't map mem space");
sc->membase = 0xd0000;
sc->subregionmask = (1 << (0x4000 / PCIC_MEM_PAGESIZE)) - 1;
/* same deal for io allocation */
sc->iobase = 0x400;
sc->iosize = 0xbff;
/* end XXX */
sc->pct = &pcic_pci_functions;
sc->memt = memt;
sc->memh = memh;
switch (PCI_PRODUCT(pa->pa_id)) {
case PCI_PRODUCT_CIRRUS_CL_PD6729:
model = "Cirrus Logic PD6729 PCMCIA controller";
break;
default:
model = "Model unknown";
break;
}
aprint_normal(": %s\n", model);
/* Enable the card. */
pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
PCI_COMMAND_MASTER_ENABLE);
pcic_attach(sc);
/*
* Check to see if we're using PCI or ISA interrupts. I don't
* know of any i386 systems that use the 6729 in PCI interrupt
* mode, but maybe when the PCMCIA code runs on other platforms
* we'll need to fix this.
*/
pcic_write(&sc->handle[0], PCIC_CIRRUS_EXTENDED_INDEX,
PCIC_CIRRUS_EXT_CONTROL_1);
if ((pcic_read(&sc->handle[0], PCIC_CIRRUS_EXTENDED_DATA) &
PCIC_CIRRUS_EXT_CONTROL_1_PCI_INTR_MASK)) {
aprint_error_dev(self, "PCI interrupts not supported\n");
return;
}
psc->intr_est = pcic_pci_machdep_intr_est(pc);
sc->irq = -1;
#if 0
/* Map and establish the interrupt. */
sc->ih = pcic_pci_machdep_pcic_intr_establish(sc, pcic_intr);
if (sc->ih == NULL) {
aprint_error_dev(self, "couldn't map interrupt\n");
return;
}
#endif
/*
* Defer configuration of children until ISA has had its chance
* to use up whatever IO space and IRQs it wants. XXX This will
* only work if ISA is attached to a pcib, AND the PCI probe finds
* and defers the ISA attachment before this one.
*/
config_defer(self, pcic_pci_callback);
config_interrupts(self, pcic_isa_config_interrupts);
}
static void
p5bus_attach(device_t parent, device_t self, void *aux)
{
struct p5bus_softc *sc;
struct zbus_args *zap;
struct p5bus_attach_args p5baa;
char *sn;
zap = aux;
sc = device_private(self);
sc->sc_dev = self;
sn = p5bus_cardsn();
aprint_normal(": Phase5 PowerUP on-board bus\n");
/* "Detect" what devices are present and attach the right drivers. */
if (zap->prodid == ZORRO_PRODID_CSPPC) {
if (sn[0] == 'F') {
aprint_normal_dev(sc->sc_dev,
"CyberStorm Mk-III (sn %s)\n", sn);
sc->sc_has_ppc = P5BUS_PPC_NONE;
} else {
aprint_normal_dev(sc->sc_dev,
"CyberStorm PPC 604e (sn %s)\n", sn);
sc->sc_has_ppc = P5BUS_PPC_OK;
}
sc->sc_cardtype = P5_CARDTYPE_CS;
sc->sc_has_scsi = P5BUS_SCSI_770;
} else if (zap->prodid == ZORRO_PRODID_BPPC) {
if (sn[0] != 'I') { /* only "+" model has SCSI */
aprint_normal_dev(sc->sc_dev,
"BlizzardPPC 603e (sn %s)\n", sn);
sc->sc_has_scsi = P5BUS_SCSI_NONE;
} else {
aprint_normal_dev(sc->sc_dev,
"BlizzardPPC 603e+ (sn %s)\n", sn);
sc->sc_has_scsi = P5BUS_SCSI_710;
}
sc->sc_cardtype = P5_CARDTYPE_BPPC;
sc->sc_has_ppc = P5BUS_PPC_OK;
}
p5baa.p5baa_cardtype = sc->sc_cardtype;
/* Attach the SCSI host adapters. */
switch (sc->sc_has_scsi) {
case P5BUS_SCSI_710:
strcpy(p5baa.p5baa_name, "bppcsc");
config_found_ia(sc->sc_dev, "p5bus", &p5baa, p5bus_print);
break;
case P5BUS_SCSI_770:
strcpy(p5baa.p5baa_name, "cbiiisc");
config_found_ia(sc->sc_dev, "p5bus", &p5baa, p5bus_print);
break;
default:
break;
}
/*
* We need to wait for possible p5membar attachments. Defer the rest
* until parent (zbus) is completely configured.
*/
config_defer(self, p5bus_callback);
}
static void
pckbc_acpi_attach(device_t parent, device_t self, void *aux)
{
struct pckbc_acpi_softc *psc = device_private(self);
struct pckbc_softc *sc = &psc->sc_pckbc;
struct pckbc_internal *t;
struct acpi_attach_args *aa = aux;
bus_space_handle_t ioh_d, ioh_c;
pckbc_slot_t peer;
struct acpi_resources res;
struct acpi_io *io0, *io1, *ioswap;
struct acpi_irq *irq;
ACPI_STATUS rv;
sc->sc_dv = self;
psc->sc_ic = aa->aa_ic;
if (acpi_match_hid(aa->aa_node->ad_devinfo, pckbc_acpi_ids_kbd)) {
psc->sc_slot = PCKBC_KBD_SLOT;
peer = PCKBC_AUX_SLOT;
} else if (acpi_match_hid(aa->aa_node->ad_devinfo, pckbc_acpi_ids_ms)) {
psc->sc_slot = PCKBC_AUX_SLOT;
peer = PCKBC_KBD_SLOT;
} else {
aprint_error(": unknown port!\n");
panic("pckbc_acpi_attach: impossible");
}
aprint_naive("\n");
aprint_normal(": %s port\n", pckbc_slot_names[psc->sc_slot]);
/* parse resources */
rv = acpi_resource_parse(sc->sc_dv, aa->aa_node->ad_handle, "_CRS",
&res, &acpi_resource_parse_ops_default);
if (ACPI_FAILURE(rv))
return;
/* find our IRQ */
irq = acpi_res_irq(&res, 0);
if (irq == NULL) {
aprint_error_dev(self, "unable to find irq resource\n");
goto out;
}
psc->sc_irq = irq->ar_irq;
psc->sc_ist = (irq->ar_type == ACPI_EDGE_SENSITIVE) ? IST_EDGE : IST_LEVEL;
if (psc->sc_slot == PCKBC_KBD_SLOT)
first = psc;
if ((!first || !first->sc_pckbc.id) &&
(psc->sc_slot == PCKBC_KBD_SLOT)) {
io0 = acpi_res_io(&res, 0);
io1 = acpi_res_io(&res, 1);
if (io0 == NULL || io1 == NULL) {
aprint_error_dev(self,
"unable to find i/o resources\n");
goto out;
}
/*
* JDM: Some firmware doesn't report resources in the order we
* expect; sort IO resources here (lowest first)
*/
if (io0->ar_base > io1->ar_base) {
ioswap = io0;
io0 = io1;
io1 = ioswap;
}
if (pckbc_is_console(aa->aa_iot, io0->ar_base)) {
t = &pckbc_consdata;
ioh_d = t->t_ioh_d;
ioh_c = t->t_ioh_c;
pckbc_console_attached = 1;
/* t->t_cmdbyte was initialized by cnattach */
} else {
if (bus_space_map(aa->aa_iot, io0->ar_base,
io0->ar_length, 0, &ioh_d) ||
bus_space_map(aa->aa_iot, io1->ar_base,
io1->ar_length, 0, &ioh_c))
panic("pckbc_acpi_attach: couldn't map");
t = malloc(sizeof(struct pckbc_internal),
M_DEVBUF, M_WAITOK|M_ZERO);
t->t_iot = aa->aa_iot;
t->t_ioh_d = ioh_d;
t->t_ioh_c = ioh_c;
t->t_addr = io0->ar_base;
t->t_cmdbyte = KC8_CPU; /* Enable ports */
callout_init(&t->t_cleanup, 0);
}
t->t_sc = &first->sc_pckbc;
first->sc_pckbc.id = t;
if (!pmf_device_register(self, NULL, pckbc_resume))
aprint_error_dev(self,
"couldn't establish power handler\n");
first->sc_pckbc.intr_establish = pckbc_acpi_intr_establish;
config_defer(first->sc_pckbc.sc_dv, pckbc_acpi_finish_attach);
} else if (!pmf_device_register(self, NULL, NULL))
aprint_error_dev(self, "couldn't establish power handler\n");
out:
acpi_resource_cleanup(&res);
}
void
uhci_pci_attach(struct device *parent, struct device *self, void *aux)
{
struct uhci_pci_softc *sc = (struct uhci_pci_softc *)self;
struct pci_attach_args *pa = (struct pci_attach_args *)aux;
pci_chipset_tag_t pc = pa->pa_pc;
pcitag_t tag = pa->pa_tag;
char const *intrstr;
pci_intr_handle_t ih;
const char *vendor;
char *devname = sc->sc.sc_bus.bdev.dv_xname;
int s;
/* Map I/O registers */
if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0,
&sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size, 0)) {
printf(": can't map i/o space\n");
return;
}
/* Disable interrupts, so we don't get any spurious ones. */
s = splhardusb();
bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_INTR, 0);
sc->sc_pc = pc;
sc->sc_tag = tag;
sc->sc.sc_bus.dmatag = pa->pa_dmat;
/* Map and establish the interrupt. */
if (pci_intr_map(pa, &ih)) {
printf(": couldn't map interrupt\n");
goto unmap_ret;
}
intrstr = pci_intr_string(pc, ih);
sc->sc_ih = pci_intr_establish(pc, ih, IPL_USB, uhci_intr, sc,
devname);
if (sc->sc_ih == NULL) {
printf(": couldn't establish interrupt");
if (intrstr != NULL)
printf(" at %s", intrstr);
printf("\n");
goto unmap_ret;
}
printf(": %s\n", intrstr);
/* Set LEGSUP register to its default value. */
pci_conf_write(pc, tag, PCI_LEGSUP, PCI_LEGSUP_USBPIRQDEN);
switch(pci_conf_read(pc, tag, PCI_USBREV) & PCI_USBREV_MASK) {
case PCI_USBREV_PRE_1_0:
sc->sc.sc_bus.usbrev = USBREV_PRE_1_0;
break;
case PCI_USBREV_1_0:
sc->sc.sc_bus.usbrev = USBREV_1_0;
break;
case PCI_USBREV_1_1:
sc->sc.sc_bus.usbrev = USBREV_1_1;
break;
default:
sc->sc.sc_bus.usbrev = USBREV_UNKNOWN;
break;
}
uhci_run(&sc->sc, 0); /* stop the controller */
/* disable interrupts */
bus_space_barrier(sc->sc.iot, sc->sc.ioh, 0, sc->sc.sc_size,
BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE);
bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_INTR, 0);
/* Figure out vendor for root hub descriptor. */
vendor = pci_findvendor(pa->pa_id);
sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id);
if (vendor)
strlcpy(sc->sc.sc_vendor, vendor, sizeof (sc->sc.sc_vendor));
else
snprintf(sc->sc.sc_vendor, sizeof (sc->sc.sc_vendor),
"vendor 0x%04x", PCI_VENDOR(pa->pa_id));
config_defer(self, uhci_pci_attach_deferred);
/* Ignore interrupts for now */
sc->sc.sc_bus.dying = 1;
splx(s);
return;
unmap_ret:
bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
splx(s);
}
