static void DRR_SendCmd(int cmda, int cmdb) { if (!cmda) { // I couldn't figure out the proper stop command, so here's the cheat. cpu_set_reset_line(0, ASSERT_LINE); cpu_set_reset_line(0, CLEAR_LINE); buffer1[0] = 0x40; buffer1[1] = 0xff; buffer1[2] = 0x01; buffer1[3] = 0xff; buffer1[4] = 0x01; buffer1[5] = 0xff; buffer1[6] = 0x00; buffer1[7] = 0x00; buffer1[8] = 0x3f; } else { buffer1[0] = 0x44; buffer1[1] = cmda; // 8/4c 7/4b 6/4a buffer1[2] = 0x01; buffer1[3] = 0x18; buffer1[4] = 0x4; buffer1[5] = 0x1a; buffer1[6] = 0x4; buffer1[7] = 0x0; buffer1[8] = 0x7f + cmda; } cpu_set_irq_line(0, IRQ_LINE_NMI, ASSERT_LINE); }
static void pacland_halt_mcu_w( int offset, int data ) { if (offset == 0) cpu_set_reset_line(1,CLEAR_LINE); else cpu_set_reset_line(1,ASSERT_LINE); }
void punchout_2a03_reset_w(int offset,int data) { if (data & 1) cpu_set_reset_line(1,ASSERT_LINE); else cpu_set_reset_line(1,CLEAR_LINE); }
static WRITE_HANDLER( pacland_halt_mcu_w ) { if (offset == 0) cpu_set_reset_line(1,CLEAR_LINE); else cpu_set_reset_line(1,ASSERT_LINE); }
static void subcpu_reset_w(int offset,int data) { if (data & 1) cpu_set_reset_line(1,CLEAR_LINE); else cpu_set_reset_line(1,ASSERT_LINE); }
void polepos_init_machine(void) { /* reset all the interrupt states */ z80_irq_enabled = z8002_1_nvi_enabled = z8002_2_nvi_enabled = 0; /* reset the ADC state */ adc_input = 0; /* reset the protection state */ ic25_last_result = 0; ic25_last_signed = 0; ic25_last_unsigned = 0; /* Initialize the MCU */ polepos_mcu.enabled = 0; /* disabled */ polepos_mcu.status = 0x10; /* ready to transfer */ polepos_mcu.transfer_id = 0; /* clear out the transfer id */ polepos_mcu.timer = 0; polepos_mcu.start = 0; /* halt the two Z8002 cpus */ cpu_set_reset_line(1, ASSERT_LINE); cpu_set_reset_line(2, ASSERT_LINE); /* start a timer for the Z80's interrupt */ timer_set(cpu_getscanlinetime(0), 0, z80_interrupt); }
static WRITE_HANDLER( subcpu_reset_w ) { if (data & 1) cpu_set_reset_line(1,CLEAR_LINE); else cpu_set_reset_line(1,ASSERT_LINE); }
void vastar_hold_cpu2_w(int offset,int data) { /* I'm not sure that this works exactly like this */ if (data & 1) cpu_set_reset_line(1,CLEAR_LINE); else cpu_set_reset_line(1,ASSERT_LINE); }
static WRITE_HANDLER( vastar_hold_cpu2_w ) { /* I'm not sure that this works exactly like this */ if (data & 1) cpu_set_reset_line(1,CLEAR_LINE); else cpu_set_reset_line(1,ASSERT_LINE); }
void eprom_latch_w(int offset, int data) { (void)offset; /* reset extra CPU */ if (!(data & 0x00ff0000)) { if (data & 1) cpu_set_reset_line(1,CLEAR_LINE); else cpu_set_reset_line(1,ASSERT_LINE); } }
void digdug_halt_w(int offset,int data) { if (data & 1) { cpu_set_reset_line(1,CLEAR_LINE); cpu_set_reset_line(2,CLEAR_LINE); } else { cpu_set_reset_line(1,ASSERT_LINE); cpu_set_reset_line(2,ASSERT_LINE); } }
static WRITE_HANDLER( latch_w ) { /* reset extra CPU */ if (!(data & 0x00ff0000)) { /* 0 means hold CPU 2's reset low */ if (data & 1) cpu_set_reset_line(1,CLEAR_LINE); else cpu_set_reset_line(1,ASSERT_LINE); /* bits 2-5 are the alpha bank */ thunderj_set_alpha_bank((data >> 2) & 7); } }
static void Hexion_SendCmd (int cmda, int cmdb) { memset(hex_mem,0,0x2000); prgrom[0x0d] = cmda & 0xff; hex_mem[0x1fcf] = cmda & 0xff; cpu_set_reset_line(0,0xFF); }
void parse_control( void ) /* assumes Z80 sandwiched between 68Ks */ { /* bit 0 enables cpu B */ /* however this fails when recovering from a save state if cpu B is disabled !! */ cpu_set_reset_line(2,(cpua_ctrl &0x1) ? CLEAR_LINE : ASSERT_LINE); }
int blockade_interrupt(void) { timer_suspendcpu(0, 0, SUSPEND_ANY_REASON); if ((input_port_0_r(0) & 0x80) == 0) { just_been_reset = 1; cpu_set_reset_line(0,PULSE_LINE); } return ignore_interrupt(); }
static WRITE_HANDLER( io_latch_w ) { /* lower byte */ if (!(data & 0x00ff0000)) { /* bit 4 resets the sound CPU */ cpu_set_reset_line(1, (data & 0x10) ? CLEAR_LINE : ASSERT_LINE); if (!(data & 0x10)) atarijsa_reset(); } //logerror("sound control = %04X\n", data); }
void slapfight_init_machine(void) { /* MAIN CPU */ slapfight_status_state=0; slapfight_status = 0xc7; getstar_sequence_index = 0; getstar_sh_intenabled = 0; /* disable sound cpu interrupts */ /* SOUND CPU */ cpu_set_reset_line(1,ASSERT_LINE); }
static WRITE16_HANDLER( io_latch_w ) { /* lower byte */ if (ACCESSING_LSB) { /* bit 4 resets the sound CPU */ cpu_set_reset_line(1, (data & 0x10) ? CLEAR_LINE : ASSERT_LINE); if (!(data & 0x10)) atarijsa_reset(); /* bit 5 is /XRESET, probably related to the ASIC */ /* bits 3 and 0 are coin counters */ } logerror("sound control = %04X\n", data); }
static void friskyt_portB_w(int offset,int data) { //if (errorlog) fprintf(errorlog,"PC %04x: 8910 port B = %02x\n",cpu_get_pc(),data); /* bit 0 is IRQ enable */ interrupt_enable_w(0,data & 1); /* bit 1 flips screen */ /* bit 2 resets the microcontroller */ if (((portb & 4) == 0) && (data & 4)) { /* reset and start the protection mcu */ cpu_set_reset_line(1, PULSE_LINE); cpu_set_halt_line(1, CLEAR_LINE); } /* other bits unknown */ portb = data; }
static void init_machine(void) { atarigen_eeprom_reset(); atarigen_slapstic_reset(); atarigen_interrupt_reset(update_interrupts); atarigen_scanline_timer_reset(cyberbal_scanline_update, 8); atarigen_sound_io_reset(1); /* reset the sound system */ bank_base = &memory_region(REGION_CPU2)[0x10000]; cpu_setbank(8, &bank_base[0x0000]); fast_68k_int = io_68k_int = 0; sound_data_from_68k = sound_data_from_6502 = 0; sound_data_from_68k_ready = sound_data_from_6502_ready = 0; /* CPU 2 doesn't run until reset */ cpu_set_reset_line(2,ASSERT_LINE); /* make sure we're pointing to the right screen by default */ cyberbal_set_screen(0); }
void carnival_sh_port2_w( int offset, int data ) { int bitsChanged; int bitsGoneHigh; int bitsGoneLow; /* U63 74LS374 8 bit latch */ /* bit 0: connector pin 48 */ /* bit 1: connector pin 47 */ /* bit 2: connector pin 45 - bear */ /* bit 3: connector pin 46 - Music !T1 input */ /* bit 4: connector pin 44 - Music reset */ /* bit 5: connector pin 43 - ranking */ /* bit 6: connector pin 42 */ /* bit 7: connector pin 41 */ bitsChanged = port2State ^ data; bitsGoneHigh = bitsChanged & data; bitsGoneLow = bitsChanged & ~data; port2State = data; if ( bitsGoneLow & OUT_PORT_2_BEAR ) { PLAY( SND_BEAR, 0 ); } if ( bitsGoneLow & OUT_PORT_2_RANKING ) { PLAY( SND_RANKING, 0 ); } if ( bitsGoneHigh & OUT_PORT_2_MUSIC_RESET ) { /* reset output is no longer asserted active low */ cpu_set_reset_line( CPU_MUSIC_ID, PULSE_LINE ); } }
/* $f008 - write bit 7 = ? (unused?) bit 6 = ? (unused?) bit 5 = ? (unused?) bit 4 = ? (usually set in game) bit 3 = ? (usually set in game) bit 2 = sound cpu reset line bit 1 = microcontroller reset line bit 0 = ? (unused?) */ static WRITE_HANDLER( mexico86_f008_w ) { cpu_set_reset_line(1,(data & 4) ? CLEAR_LINE : ASSERT_LINE); cpu_set_reset_line(2,(data & 2) ? CLEAR_LINE : ASSERT_LINE); }
void vastar_init_machine(void) { /* we must start with the second CPU halted */ cpu_set_reset_line(1,ASSERT_LINE); }
static WRITE_HANDLER( sound_reset_w ) { if ( data & 1 ) cpu_set_reset_line( 1, PULSE_LINE ); }
static WRITE32_HANDLER( sound_reset_w ) { logerror("Sound reset = %d\n", !offset); cpu_set_reset_line(1, offset ? CLEAR_LINE : ASSERT_LINE); }
static MACHINE_INIT( vastar ) { /* we must start with the second CPU halted */ cpu_set_reset_line(1,ASSERT_LINE); }
static WRITE_HANDLER( p2_reset_w ) { (void)offset; (void)data; cpu_set_reset_line(2,CLEAR_LINE); }
/* $f008 - write bit 7 = ? (unused?) bit 6 = ? (unused?) bit 5 = ? (unused?) bit 4 = ? (usually set in game) bit 3 = ? (usually set in game) bit 2 = sound cpu reset line bit 1 = microcontroller reset line bit 0 = ? (unused?) */ static void mexico86_f008_w(int offset,int data) { cpu_set_reset_line(1,(data & 4) ? CLEAR_LINE : ASSERT_LINE); cpu_set_reset_line(2,(data & 2) ? CLEAR_LINE : ASSERT_LINE); }