//----------------------------------------------------------------------
static void apply_symbols(void)
{
free_mappings();
if ( dataseg != BADADDR )
{
for ( int i=0; i < numports; i++ )
{
ea_t ea = calc_data_mem(ports[i].address);
segment_t *s = getseg(ea);
if ( s == NULL || s->type != SEG_IMEM )
continue;
doByte(ea, 1);
const char *name = ports[i].name;
if ( !set_name(ea, name, SN_NOWARN) )
set_cmt(ea, name, 0);
}
ea_t ea = dataseg;
segment_t *d = getseg(dataseg);
if ( d != NULL )
{
ea_t dataend = d->endEA;
while ( 1 )
{
ea = next_unknown(ea, dataend);
if ( ea == BADADDR )
break;
ea_t end = nextthat(ea, dataend, f_isHead, NULL);
if ( end == BADADDR )
end = dataend;
doByte(ea, end-ea);
}
create_mappings();
}
}
}
static void load_symbols_without_infotype(int respect_args)
{
free_ioports(ports, numports);
respect_info = respect_args;
ports = read_ioports(&numports, cfgname, device, sizeof(device), callback);
create_mappings();
}
/* Set up the xenheap: up to 1GB of contiguous, always-mapped memory. */
void __init setup_xenheap_mappings(unsigned long base_mfn,
unsigned long nr_mfns)
{
create_mappings(XENHEAP_VIRT_START, base_mfn, nr_mfns);
/* Record where the xenheap is, for translation routines. */
xenheap_virt_end = XENHEAP_VIRT_START + nr_mfns * PAGE_SIZE;
xenheap_mfn_start = base_mfn;
xenheap_mfn_end = base_mfn + nr_mfns;
}
static int notify(processor_t::idp_notify msgid, ...)
{
va_list va;
va_start(va, msgid);
// A well behaving processor module should call invoke_callbacks()
// in his notify() function. If this function returns 0, then
// the processor module should process the notification itself
// Otherwise the code should be returned to the caller:
int code = invoke_callbacks(HT_IDP, msgid, va);
if ( code ) return code;
switch(msgid)
{
case processor_t::init:
helper.create("$ pic");
helper.supval(0, device, sizeof(device));
default:
break;
case processor_t::term:
free_mappings();
free_ioports(ports, numports);
break;
case processor_t::newfile: // new file loaded
{
segment_t *s0 = get_first_seg();
if ( s0 != NULL )
{
set_segm_name(s0, "CODE");
dataseg = AdditionalSegment(0x200, 0, "DATA");
segment_t *s1 = get_next_seg(s0->startEA);
SetDefaultRegisterValue(s0, BANK, 0);
SetDefaultRegisterValue(s1, BANK, 0);
SetDefaultRegisterValue(s0, PCLATH, 0);
SetDefaultRegisterValue(s1, PCLATH, 0);
SetDefaultRegisterValue(s0, PCLATU, 0);
SetDefaultRegisterValue(s1, PCLATU, 0);
setup_device(IORESP_INT);
apply_symbols();
}
}
break;
case processor_t::oldfile: // old file loaded
idpflags = (ushort)helper.altval(-1);
dataseg = helper.altval(0);
create_mappings();
for ( segment_t *s=get_first_seg(); s != NULL; s=get_next_seg(s->startEA) )
{
if ( s->defsr[PCLATH-ph.regFirstSreg] == BADSEL )
s->defsr[PCLATH-ph.regFirstSreg] = 0;
}
break;
case processor_t::closebase:
case processor_t::savebase:
helper.altset(0, dataseg);
helper.altset(-1, idpflags);
helper.supset(0, device);
break;
case processor_t::newprc: // new processor type
{
int n = va_arg(va, int);
static bool set = false;
if ( set )
return 0;
set = true;
if ( ptypes[n] != ptype )
{
ptype = ptypes[n];
ph.cnbits = 12 + 2*n;
}
switch ( ptype )
{
case PIC12:
register_names[PCLATH] = "status";
cfgname = "pic12.cfg";
break;
case PIC14:
cfgname = "pic14.cfg";
break;
case PIC16:
register_names[BANK] = "bsr";
cfgname = "pic16.cfg";
idpflags = 0;
ph.cnbits = 8;
ph.regLastSreg = PCLATU;
break;
default:
error("interr in setprc");
break;
}
}
break;
case processor_t::newasm: // new assembler type
break;
case processor_t::newseg: // new segment
break;
}
va_end(va);
return 1;
}
