// performs a check, whether two given blocks are similar
double get_block_distance (block_t* ref_block, block_t* cmp_block, int const sigma, double const th_2d) {
int const bs = ref_block->block_size;
double ref_mat[bs][bs];
double cmp_mat[bs][bs];
double sub_mat[bs][bs];
double distance = 0.0;
// subtract 128 for DCT transformation
shift_values (bs, ref_block, ref_mat);
shift_values (bs, cmp_block, cmp_mat);
// perform DCT on reference block by two matrix multiplications
dct_2d (bs, ref_mat);
// perform DCT on compare block by two matrix multiplications
dct_2d (bs, cmp_mat);
// perform thresholding on reference block
hard_threshold_2d (bs, ref_mat, th_2d, sigma);
// perform thresholding on compare block
hard_threshold_2d (bs, cmp_mat, th_2d, sigma);
// subtract compare block from reference block
subtract_blocks (bs, ref_mat, cmp_mat, sub_mat);
// perform L2 norm on the difference of the two matrices
distance = l2_norm(bs, sub_mat) / (double)bs;
return distance;
}
void dct(short input[DW * N], short output[DW * N])
{
int i;
short buf_2d_in[DCT_SIZE][DCT_SIZE];
short buf_2d_out[DCT_SIZE][DCT_SIZE];
for (i = 0; i < DW; i++) {
// Read input data. Fill the internal buffer.
read_data(input + i * N, buf_2d_in);
dct_2d(buf_2d_in, buf_2d_out);
// Write out the results.
write_data(buf_2d_out, output + i * N);
}
}
void *half_dct_2d_pth_0(void *params)
{
int i;
TP0Params *p = (TP0Params *)params;
#ifdef FPGA
dct_data_t *in, *out;
int len;
len = SFN * DCT_SIZE * DCT_SIZE;
in = (dct_data_t *)malloc((1 + len) * sizeof(dct_data_t));
in[0] = 0;
for (i = 1; i <= len; i++)
in[i] = p->col_inbuf[i - 1];
out = p->col_outbuf;
#endif
for (i = 1; i < FF; i++) {
#ifdef FPGA
write(fdw, (void *)in, (len + 1) * sizeof(dct_data_t));
read(fdr, (void *)out, len * sizeof(dct_data_t));
#else
dct_2d(p->col_inbuf, p->col_outbuf);
#endif
transpose(p->col_outbuf, p->buf_2d_out);
sync_threads();
if (i + 1 < FF) {
read_data(p->input + (i + 1) * SFN * N, p->nii_block);
}
write_data(p->buf_2d_out, p->output + (i - 1) * SFN * N);
// sync_threads();
}
#ifdef FPGA
free(in);
#endif
return NULL;
}
void *half_dct_2d_pth_1(void *params)
{
int i;
Params *p = (Params *)params;
#ifdef FPGA
dct_data_t *in, *out;
int len;
len = SFN * DCT_SIZE * DCT_SIZE;
in = (dct_data_t *)malloc((1 + len) * sizeof(dct_data_t));
in[0] = 1;
for (i = 1; i <= len; i++)
in[i] = p->buf_2d_in[i - 1];
out = p->row_outbuf;
#endif
for (i = 1; i < FF; i++) {
#ifdef FPGA
write(fdw, (void *)in, (len + 1) * sizeof(dct_data_t));
read(fdr, (void *)out, len * sizeof(dct_data_t));
#else
dct_2d(p->buf_2d_in, p->row_outbuf);
#endif
transpose(p->row_outbuf, p->col_inbuf);
sync_threads();
if (i + 1 < FF) {
block_memcpy(p->col_inbuf, p->nii_block);
}
// sync_threads();
}
#ifdef FPGA
free(in);
#endif
return NULL;
}
void dct(dct_data_t input[DW * N], dct_data_t output[DW * N])
{
pthread_t thread_id[D];
Params thread_args[D];
TP0Params tp0_thread_args;
#ifdef FPGA
// int fdr, fdw;
fdr = open("/dev/xillybus_read_32", O_RDONLY);
fdw = open("/dev/xillybus_write_32", O_WRONLY);
if ((fdr < 0) || (fdw < 0)) {
perror("Failed to open Xillybus device file(s)");
exit(1);
}
#endif
// int buf_2d_in[D][DCT_SIZE][DCT_SIZE];
// int buf_2d_out[D][DCT_SIZE][DCT_SIZE];
dct_data_t *buf_2d_in0, *buf_2d_in1;
dct_data_t *buf_2d_out0, *buf_2d_out1;
// dct_data_t row_outbuf[D][DCT_SIZE][DCT_SIZE];
// dct_data_t col_outbuf[D][DCT_SIZE][DCT_SIZE], col_inbuf[D][DCT_SIZE][DCT_SIZE];
dct_data_t *row_outbuf0, *row_outbuf1;
dct_data_t *col_outbuf0, *col_outbuf1;
dct_data_t *col_inbuf0, *col_inbuf1;
buf_2d_in0 = (dct_data_t *)malloc(SFN * DCT_SIZE * DCT_SIZE * sizeof(dct_data_t));
buf_2d_in1 = (dct_data_t *)malloc(SFN * DCT_SIZE * DCT_SIZE * sizeof(dct_data_t));
buf_2d_out0 = (dct_data_t *)malloc(SFN * DCT_SIZE * DCT_SIZE * sizeof(dct_data_t));
buf_2d_out1 = (dct_data_t *)malloc(SFN * DCT_SIZE * DCT_SIZE * sizeof(dct_data_t));
row_outbuf0 = (dct_data_t *)malloc(SFN * DCT_SIZE * DCT_SIZE * sizeof(dct_data_t));
row_outbuf1 = (dct_data_t *)malloc(SFN * DCT_SIZE * DCT_SIZE * sizeof(dct_data_t));
col_outbuf0 = (dct_data_t *)malloc(SFN * DCT_SIZE * DCT_SIZE * sizeof(dct_data_t));
col_outbuf1 = (dct_data_t *)malloc(SFN * DCT_SIZE * DCT_SIZE * sizeof(dct_data_t));
col_inbuf0 = (dct_data_t *)malloc(SFN * DCT_SIZE * DCT_SIZE * sizeof(dct_data_t));
col_inbuf1 = (dct_data_t *)malloc(SFN * DCT_SIZE * DCT_SIZE * sizeof(dct_data_t));
thread_args[1].buf_2d_in = buf_2d_in1;
thread_args[1].row_outbuf = row_outbuf1;
thread_args[1].col_inbuf = col_inbuf1;
thread_args[1].nii_block = col_inbuf0;
tp0_thread_args.col_inbuf = col_inbuf0;
tp0_thread_args.col_outbuf = col_outbuf0;
tp0_thread_args.buf_2d_out = buf_2d_out0;
tp0_thread_args.nii_block = buf_2d_in1;
tp0_thread_args.input = input;
tp0_thread_args.output = output;
// pre operations
read_data(input + 0 * SFN * N, buf_2d_in0);
dct_2d(buf_2d_in0, row_outbuf0);
transpose(row_outbuf0, col_inbuf0);
read_data(input + 1 * SFN * N, buf_2d_in1);
pthread_mutex_init(&thread_counter_mutex, NULL);
pthread_cond_init(&thread_counter_cv, NULL);
thread_counter = 0; // used in sync_threads()
pthread_create(&thread_id[1], NULL, &half_dct_2d_pth_1, &thread_args[1]);
pthread_create(&thread_id[0], NULL, &half_dct_2d_pth_0, &tp0_thread_args);
pthread_join(thread_id[1], NULL);
pthread_join(thread_id[0], NULL);
#ifdef FPGA
close(fdr);
close(fdw);
#endif
//post operations
dct_2d(col_inbuf1, col_outbuf1);
transpose(col_outbuf1, buf_2d_out1);
write_data(buf_2d_out1, output + (DW - 1 * SFN) * N);
free(buf_2d_in0);
free(buf_2d_in1);
free(buf_2d_out0);
free(buf_2d_out1);
free(row_outbuf0);
free(row_outbuf1);
free(col_outbuf0);
free(col_outbuf1);
free(col_inbuf0);
free(col_inbuf1);
}
